From nobody Thu Nov 28 15:31:35 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C4751C2DA5; Tue, 1 Oct 2024 12:51:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727787071; cv=none; b=q5v2XzSnb/EddxZVgyODXTmdi5i5fhcNEf+UXGV5QUzyaZgaw/D4bCuQsD1z8KY3f4jI4+VoFS7EgM/qVKqSX6z2rK7C97bb8Ci0qeX58kTqYYoW6gIX7Mu/GcJEMaN39pkvvTuhbS42jEzwlaJSL8ILh/+NLBeklgvbOPXE6Jw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727787071; c=relaxed/simple; bh=n14DOMLu+tTkfzWSwxnagK5nwZFIdud0kYQvc+s8lB8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pWPlsxscsETbmbhhz36anqyOKl7WeXA4tO4buze4IVmlnpDfHk6YbBmRIMtdWd4c5JrobjtGNl5c7OpWJQFdk1rlYtrBit27v21fTczAo26s6vkpDybc+OMqzbNZXj1P7f+4tKueAwpFHplckhyRDIs6KuW5HP0AIUTDOlPzTyA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PldLBLov; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PldLBLov" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9BEDC4AF09; Tue, 1 Oct 2024 12:51:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727787071; bh=n14DOMLu+tTkfzWSwxnagK5nwZFIdud0kYQvc+s8lB8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PldLBLovX7GBq3jtWtaU6FGiLT2Y7EHjBoiqflV2PS7A+Slg9aWx/vLHSAsijLuVP ZN0tOvLV+90AmtaUVSy6BtK48xgm5+h9THowTpJbOGbQHSWTCnHteCPSb/n4ZXlbSS 09w+UD7dAFeEp0qWxnzBnYdvODGeEmBvOwwOdqkow0sJL5QNhr3lxSnqESGxj3wATX uhVVs96kvodNNynt8TZ/g/HxSSxgnUGtl2+6wc6ZGPtPx8FDF+39MpXR5NM7XSALEx slm0Tt4q6t/KqGroHvNOy9yk6eAI165o7fXzSMZoPd5V1TSKp+We3ualJ0xpJ2TqUv f6oTllHogg2Jg== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1svcLP-000000002mK-0sJo; Tue, 01 Oct 2024 14:51:11 +0200 From: Johan Hovold To: Greg Kroah-Hartman Cc: Jiri Slaby , Bjorn Andersson , Konrad Dybcio , Douglas Anderson , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Johan Hovold , stable@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 4/7] serial: qcom-geni: fix receiver enable Date: Tue, 1 Oct 2024 14:50:30 +0200 Message-ID: <20241001125033.10625-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001125033.10625-1-johan+linaro@kernel.org> References: <20241001125033.10625-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The receiver should be enabled in the startup() callback and there is no need to stop it on every termios update. Since commit 6f3c3cafb115 ("serial: qcom-geni: disable interrupts during console writes") the calls to manipulate the secondary interrupts, which were done without holding the port lock, can lead to the receiver being left disabled when set_termios() races with the console code (e.g. when init opens the tty during boot). The calls to stop and start rx in set_termios() can similarly race with DMA completion and, for example, cause the DMA buffer to be unmapped twice or the mapping to be leaked. Fixes: 6f3c3cafb115 ("serial: qcom-geni: disable interrupts during console = writes") Fixes: 2aaa43c70778 ("tty: serial: qcom-geni-serial: add support for serial= engine DMA") Fixes: c4f528795d1a ("tty: serial: msm_geni_serial: Add serial driver suppo= rt for GENI based QUP") Cc: stable@vger.kernel.org # 6.3 Cc: Bartosz Golaszewski Signed-off-by: Johan Hovold --- drivers/tty/serial/qcom_geni_serial.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qco= m_geni_serial.c index dea688db0d7c..5b6c5388efee 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1179,6 +1179,11 @@ static int qcom_geni_serial_startup(struct uart_port= *uport) if (ret) return ret; } + + uart_port_lock_irq(uport); + qcom_geni_serial_start_rx(uport); + uart_port_unlock_irq(uport); + enable_irq(uport->irq); =20 return 0; @@ -1264,7 +1269,6 @@ static void qcom_geni_serial_set_termios(struct uart_= port *uport, unsigned int avg_bw_core; unsigned long timeout; =20 - qcom_geni_serial_stop_rx(uport); /* baud rate */ baud =3D uart_get_baud_rate(uport, termios, old, 300, 4000000); =20 @@ -1280,7 +1284,7 @@ static void qcom_geni_serial_set_termios(struct uart_= port *uport, dev_err(port->se.dev, "Couldn't find suitable clock rate for %u\n", baud * sampling_rate); - goto out_restart_rx; + return; } =20 dev_dbg(port->se.dev, "desired_rate =3D %u, clk_rate =3D %lu, clk_div =3D= %u\n", @@ -1371,8 +1375,6 @@ static void qcom_geni_serial_set_termios(struct uart_= port *uport, writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN); writel(ser_clk_cfg, uport->membase + GENI_SER_M_CLK_CFG); writel(ser_clk_cfg, uport->membase + GENI_SER_S_CLK_CFG); -out_restart_rx: - qcom_geni_serial_start_rx(uport); } =20 #ifdef CONFIG_SERIAL_QCOM_GENI_CONSOLE --=20 2.45.2