From nobody Thu Nov 28 15:53:49 2024 Received: from mail-pg1-f179.google.com (mail-pg1-f179.google.com [209.85.215.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 519E61CF293 for ; Tue, 1 Oct 2024 16:07:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727798862; cv=none; b=QZniivgzjy0NuaMXsoBtu0iYrzzKJrtvkI+tDRda2iOjXXXFM3nTYdBZNvU7wycGmhbvc6o77PgsllHTLFKcZZr99EIDkRUdUMBXkvnsh7SF+5SJUpZVQ1LPfN1ACU98cpSMyOgUIWJO+ttAWhSD3pjoHpr7ZmTvHHpAZUj5JoI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727798862; c=relaxed/simple; bh=bDgSjz+mH4V3y2EvoGQcC6UYwLiWwjV9Qkfsz6uQLj4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jyMx0Byhs5LYa1IgBt8BLFuh3A9WFmG0sPukDZ512xovUwv7OIVv8AYwSwa4irBvShMsVmy0bUbS4IlG2CCTSRaI50Zf12PTWarg7PM6f2lN7fs6xuS1ejJ6VSoEVatEs81OJWZ2HFYcBjRfMdzCGiCXUehUCo+XwE/BRiSwUdA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=s5rCsnZj; arc=none smtp.client-ip=209.85.215.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="s5rCsnZj" Received: by mail-pg1-f179.google.com with SMTP id 41be03b00d2f7-7d916b6a73aso3652480a12.1 for ; Tue, 01 Oct 2024 09:07:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1727798861; x=1728403661; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LWmoBhDbyT20ZDpyj0YkBJbSnr4cmq0kZF5LWUGKIyA=; b=s5rCsnZjapKYGq2uQN2U26BKhtCPv3paAsA5jMMDCxHiQZ8dHOkUMaqikVOvGTEfh0 DBEGkuIrUVabk8FA5BzxyOPnQqXgDb5PUV46du1XKVjBayw71sLC/cF8En2MDOFTRKf4 m618z1ZaD1gXvRJ3oPZ65Ql0mU3M9aYzG6auczh3irIV8Uirvo8LsjYOWuna5Izhf7SH WcqYlknnjBhLxxXRpmrnlAZUPMVfDrfc+IIzIjVX4JNr8fjxkgvSieUp2mFEJt1O/IkD jF+eSNNgTxPpKlwmtlYWdh+jhBf2aICEMdbEhSPoBNPkeZIGizYXVIwu4sqvNglSHa2c ASHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727798861; x=1728403661; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LWmoBhDbyT20ZDpyj0YkBJbSnr4cmq0kZF5LWUGKIyA=; b=blQJw+1cL8+EQqhTW8b8pfpOA1aWRs8g2b45M2i7Rj9Now+Q8YQ09LfMesfsPqs7oC 34oSXvnvbd23Nfg7iaB/Ca3l6+HQ8n4vDpXCS0dbxTHc87b2sI41KatFlYHXkCzlomt/ ETX261KZZpIEQGxQuZ4GviDKXX+rJCJxk099g/esHO1vLHRRnmkTfSmcR3fHeMTWjt8H BSlLYO5cQObm52qpvNO1gNC1SB1YXSy6jDKZwkg6b5di1SGA+U/yUNu/pEpT7FzDE3lv eMrmEvtvXGE51pa+v+b8A38DZcK1KTmAOJDQ+V0l55UYK7BXZTeXR5zGNPcK0p+euOG/ 7sMA== X-Gm-Message-State: AOJu0YwPupxIyl/0dAIbCPPH+Oq9lh/R34IsBS8yjARFGG0MKRfHH8Rq bvY7PBhW3AgMEyzttIOk5cpMkSLivjio41XeXwPbRXdcVYJ71TMJSsKdqH0hi5I= X-Google-Smtp-Source: AGHT+IF+DXMbQc9ATxScjl/51BoN0NDApnEeX0Qfv6KL8hdZd/y/ejK0opPN008FSUmQa/7I/9Jl0Q== X-Received: by 2002:a17:90a:88d:b0:2da:9490:900c with SMTP id 98e67ed59e1d1-2e1846aff5bmr230162a91.21.1727798860600; Tue, 01 Oct 2024 09:07:40 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d7d47sm13843973a91.28.2024.10.01.09.07.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 09:07:40 -0700 (PDT) From: Deepak Gupta Date: Tue, 01 Oct 2024 09:06:20 -0700 Subject: [PATCH 15/33] riscv/mm: Implement map_shadow_stack() syscall Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241001-v5_user_cfi_series-v1-15-3ba65b6e550f@rivosinc.com> References: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> In-Reply-To: <20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 As discussed extensively in the changelog for the addition of this syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the existing mmap() and madvise() syscalls do not map entirely well onto the security requirements for shadow stack memory since they lead to windows where memory is allocated but not yet protected or stacks which are not properly and safely initialised. Instead a new syscall map_shadow_stack() has been defined which allocates and initialises a shadow stack page. This patch implements this syscall for riscv. riscv doesn't require token to be setup by kernel because user mode can do that by itself. However to provide compatibility and portability with other architectues, user mode can specify token set flag. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/usercfi.c | 145 ++++++++++++++++++++++++++++++++++++= ++++ include/uapi/asm-generic/mman.h | 4 ++ 3 files changed, 151 insertions(+) diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 7f88cc4931f5..eb2c94dd0a9d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -117,3 +117,5 @@ obj-$(CONFIG_COMPAT) +=3D compat_vdso/ obj-$(CONFIG_64BIT) +=3D pi/ obj-$(CONFIG_ACPI) +=3D acpi.o obj-$(CONFIG_ACPI_NUMA) +=3D acpi_numa.o + +obj-$(CONFIG_RISCV_USER_CFI) +=3D usercfi.o diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c new file mode 100644 index 000000000000..ce002eabbdc1 --- /dev/null +++ b/arch/riscv/kernel/usercfi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SHSTK_ENTRY_SIZE sizeof(void *) + +/* + * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` = can happen + * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` t= akes pointer to + * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform = writes on shadow + * stack. + */ +static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned= long val) +{ + /* + * Never expect -1 on shadow stack. Expect return addresses and zero + */ + unsigned long swap =3D -1; + + __enable_user_access(); + asm goto( + ".option push\n" + ".option arch, +zicfiss\n" + "1: ssamoswap.d %[swap], %[val], %[addr]\n" + _ASM_EXTABLE(1b, %l[fault]) + RISCV_ACQUIRE_BARRIER + ".option pop\n" + : [swap] "=3Dr" (swap), [addr] "+A" (*addr) + : [val] "r" (val) + : "memory" + : fault + ); + __disable_user_access(); + return swap; +fault: + __disable_user_access(); + return -1; +} + +/* + * Create a restore token on the shadow stack. A token is always XLEN wide + * and aligned to XLEN. + */ +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) +{ + unsigned long addr; + + /* Token must be aligned */ + if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE)) + return -EINVAL; + + /* On RISC-V we're constructing token to be function of address itself */ + addr =3D ssp - SHSTK_ENTRY_SIZE; + + if (amo_user_shstk((unsigned long __user *)addr, (unsigned long) ssp) =3D= =3D -1) + return -EFAULT; + + if (token_addr) + *token_addr =3D addr; + + return 0; +} + +static unsigned long allocate_shadow_stack(unsigned long addr, unsigned lo= ng size, + unsigned long token_offset, + bool set_tok) +{ + int flags =3D MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm =3D current->mm; + unsigned long populate, tok_loc =3D 0; + + if (addr) + flags |=3D MAP_FIXED_NOREPLACE; + + mmap_write_lock(mm); + addr =3D do_mmap(NULL, addr, size, PROT_READ, flags, + VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL); + mmap_write_unlock(mm); + + if (!set_tok || IS_ERR_VALUE(addr)) + goto out; + + if (create_rstor_token(addr + token_offset, &tok_loc)) { + vm_munmap(addr, size); + return -EINVAL; + } + + addr =3D tok_loc; + +out: + return addr; +} + +SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size= , unsigned int, flags) +{ + bool set_tok =3D flags & SHADOW_STACK_SET_TOKEN; + unsigned long aligned_size =3D 0; + + if (!cpu_supports_shadow_stack()) + return -EOPNOTSUPP; + + /* Anything other than set token should result in invalid param */ + if (flags & ~SHADOW_STACK_SET_TOKEN) + return -EINVAL; + + /* + * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP = and is available + * CSR in all modes. CSR accesses are performed using 12bit index program= med in instruction + * itself. This provides static property on register programming and writ= es to CSR can't + * be unintentional from programmer's perspective. As long as programmer = has guarded areas + * which perform writes to CSR_SSP properly, shadow stack pivoting is not= possible. Since + * CSR_SSP is writeable by user mode, it itself can setup a shadow stack = token subsequent + * to allocation. Although in order to provide portablity with other arch= itecture (because + * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expec= tation of a token + * flag in flags and if provided in flags, setup a token at the base. + */ + + /* If there isn't space for a token */ + if (set_tok && size < SHSTK_ENTRY_SIZE) + return -ENOSPC; + + if (addr && (addr & (PAGE_SIZE - 1))) + return -EINVAL; + + aligned_size =3D PAGE_ALIGN(size); + if (aligned_size < size) + return -EOVERFLOW; + + return allocate_shadow_stack(addr, aligned_size, size, set_tok); +} diff --git a/include/uapi/asm-generic/mman.h b/include/uapi/asm-generic/mma= n.h index 57e8195d0b53..9cfb3c1e337d 100644 --- a/include/uapi/asm-generic/mman.h +++ b/include/uapi/asm-generic/mman.h @@ -19,4 +19,8 @@ #define MCL_FUTURE 2 /* lock all future mappings */ #define MCL_ONFAULT 4 /* lock all pages that are faulted in */ =20 +/* Set up a restore token in the shadow stack */ +#define SHADOW_STACK_SET_TOKEN (1ULL << 0) +/* Set up a top of stack marker in the shadow stack */ +#define SHADOW_STACK_SET_MARKER (1ULL << 1) #endif /* __ASM_GENERIC_MMAN_H */ --=20 2.45.0