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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5389fd53a02sm1549026e87.31.2024.10.01.03.43.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 03:43:00 -0700 (PDT) From: Marcus Folkesson Date: Tue, 01 Oct 2024 12:42:27 +0200 Subject: [PATCH 2/2] dt-bindings: mtd: davinci: add support for on-die ECC engine type Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241001-ondie-v1-2-a3daae15c89d@gmail.com> References: <20241001-ondie-v1-0-a3daae15c89d@gmail.com> In-Reply-To: <20241001-ondie-v1-0-a3daae15c89d@gmail.com> To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Marcus Folkesson X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=850; i=marcus.folkesson@gmail.com; h=from:subject:message-id; bh=DIJd3A+pL3pwCvVpZYZHLv8qgZCCLKHcPaV5BNsBVZk=; b=owEBbQKS/ZANAwAIAYiATm9ZXVIyAcsmYgBm+9InEINnOwjIHtlMxxzHGWORqR+nk3f8q/rL8 0qVC7qXfzqJAjMEAAEIAB0WIQQFUaLotmy1TWTBLGWIgE5vWV1SMgUCZvvSJwAKCRCIgE5vWV1S MvuKD/0bJQJF5QZD7y7FYMLNQFq8G5Hv0kKNNl6Lcvtglhj638zTGcP+Gr0sSYK8vfY3aFZKt2G 2OWmJW+3v7c2EscvBkvAASkpA5nr2lRmREjXZ3muAB9iSRLj6tohbH/Y9RvxDUuB9VkEpim4XaE hO0pYLGx+LdcuxAKRL6Ma/11wxHSylgMeReeWTElr+RK1dv/5B/PCV+a+EyA0THAGPEAC5gkZe2 iqJ3u1H8+Q01v3hQ38ZOFcQChUS5EKdmI2BSnXWTGJ2Jb/siIWuqhgp9lvpxOuWZejqMyZdlnR/ 1r8KQPfZJdGdwBVF16YsKYP6d69jesXT3aB+hzBAJA1+k3P56JJEc+M2wT6Bz/MjWLsaOEGAoX9 9EjYwNxE4qCuKxpQYcgJ4+ltx6Ptt1ZvM5WtYV2FuOX5yDHCTvHD5b82TM11fUHWyMT7BC9Z8PD HpXP22b18gYGOByVvEK17MtB4DHfOgPY5nJJmhAVZ/ddUnHjT0fpHkIRBqR1cE01uTx2UiAIaNh V+4ZYUg6LPjvmV78Ju/3SYBEsII9gfRuu2ge8RT2if8A3MSWjtSLbmu2ES14LtDDqirZb5x02SH YKBp4gB64ZQjkOcUmDkazt7IATGcRjImYM3Gxd1tWDt9oJ2+bPPf/rnjqendWs2IN/1STmgdLJl /jgofbW5aCEE1zQ== X-Developer-Key: i=marcus.folkesson@gmail.com; a=openpgp; fpr=AB91D46C7E0F6E6FB2AB640EC0FE25D598F6C127 Some chips, e.g. Micron MT29F1G08ABBFAH4, has a mandatory on-die ECC. Add "on-die" as ECC engine type in order to be compatible with those. Signed-off-by: Marcus Folkesson --- Documentation/devicetree/bindings/mtd/davinci-nand.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/davinci-nand.txt b/Docum= entation/devicetree/bindings/mtd/davinci-nand.txt index eb8e2ff4dbd2901b3c396f2e66c1f590a32dcf67..9afda5cd956494c6b3171bdbaec= aeb289acd64ea 100644 --- a/Documentation/devicetree/bindings/mtd/davinci-nand.txt +++ b/Documentation/devicetree/bindings/mtd/davinci-nand.txt @@ -44,6 +44,7 @@ Recommended properties : - "none" - "soft" - "hw" + - "on-die" =20 - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4. =20 --=20 2.46.0