From nobody Thu Nov 28 17:36:30 2024 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DC547192599; Mon, 30 Sep 2024 14:53:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727708008; cv=none; b=LDK+YD6hKoHvrki+B7NEYJLsGmrDE726EA+IZBj5Vsw0g0Lwq8wN7gpmccrOoTfnFqSNoMHhU5fGDF85BTcwVWdhVAwsN79sBAL0zQpjCoXhA0/ocJFN7H2lQMoeMJBV9qerUZ1FAAUMTtjzI6tFaG1IDeLP1/5t3wuNdseFoe8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727708008; c=relaxed/simple; bh=skhX5iggBsH2GvmQkeGyNH4KLXmlyqwdCB2pLRX3xUg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LkWqUIzQpawDb4F4e3ML5BbHq510cU0P3HqwNPI/vTB+vlVPxHLIMAInqfaFSxKGyuMmRTDJuoYpvMnZsBJYjW7OF292ePndM45SYHDq2jGU+OYXdzVhv20IDv6W6f/WwScjvcDmIxKU6aQcKv2+4TplrlUERqF8aOi0YMBLZlo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-IronPort-AV: E=Sophos;i="6.11,165,1725289200"; d="scan'208";a="224342622" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 30 Sep 2024 23:53:25 +0900 Received: from mulinux.home (unknown [10.226.92.226]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 1E6C24204B8B; Mon, 30 Sep 2024 23:53:14 +0900 (JST) From: Fabrizio Castro To: Michael Turquette , Stephen Boyd , Geert Uytterhoeven Cc: Fabrizio Castro , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Paterson , Biju Das , Lad Prabhakar Subject: [PATCH v2 3/5] clk: renesas: r9a09g057: Add clock and reset entries for ICU Date: Mon, 30 Sep 2024 15:52:42 +0100 Message-Id: <20240930145244.356565-4-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240930145244.356565-1-fabrizio.castro.jz@renesas.com> References: <20240930145244.356565-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add clock and reset entries for the Renesas RZ/V2H(P) ICU IP block. Signed-off-by: Lad Prabhakar Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven --- v1->v2: * No change drivers/clk/renesas/r9a09g057-cpg.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a0= 9g057-cpg.c index 3ee32db5c0af..b82fee006d65 100644 --- a/drivers/clk/renesas/r9a09g057-cpg.c +++ b/drivers/clk/renesas/r9a09g057-cpg.c @@ -78,6 +78,7 @@ static const struct cpg_core_clk r9a09g057_core_clks[] __= initconst =3D { }; =20 static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst =3D { + DEF_MOD_CRITICAL("icu_0_pclk_i", CLK_PLLCM33_DIV16, 0, 5, 0, 5), DEF_MOD("gtm_0_pclk", CLK_PLLCM33_DIV16, 4, 3, 2, 3), DEF_MOD("gtm_1_pclk", CLK_PLLCM33_DIV16, 4, 4, 2, 4), DEF_MOD("gtm_2_pclk", CLK_PLLCLN_DIV16, 4, 5, 2, 5), @@ -119,6 +120,7 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] = __initconst =3D { }; =20 static const struct rzv2h_reset r9a09g057_resets[] __initconst =3D { + DEF_RST(3, 6, 1, 7), /* ICU_0_PRESETN_I */ DEF_RST(6, 13, 2, 30), /* GTM_0_PRESETZ */ DEF_RST(6, 14, 2, 31), /* GTM_1_PRESETZ */ DEF_RST(6, 15, 3, 0), /* GTM_2_PRESETZ */ --=20 2.34.1