From nobody Thu Nov 28 18:39:44 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C43218F2DD; Mon, 30 Sep 2024 12:16:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698574; cv=none; b=OlqGuq2bvGOL487OPRCtBa5M3bRXpr/TG/YGwRGCsaZEziVBnjpzs8p6uZ4Zr7S1X2f+ka9ttNuvHsrQ6JhnW0hrHj8ssv015g+EjX8IYvZ/91IVMNc0p7WrN0leLBo7MuqjMuHtwKim5FmWkHeqFmo5WJbYk2j544aupzfHZ0w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698574; c=relaxed/simple; bh=Rr5pYzPzILVGLFfUKpS1kwrZ9OqlvXpyVlGyV3RDDoo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PCxQqSDosYo3kz/hqop/P4DngrVIkBgYuuD8Wf8Xjwy9ahgc7t8FhsEbHyweJz+2M5rdRobDcxKtfPuNtrnwZeLjKsUJye3sv6QHvjIU+tF3pUYzCDfRBLvuI1x6hZbmngrX1bwhELWdI35npB3bzqVIXrAB8Gtyc11PyxnyZqE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=iPyFyaZB; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="iPyFyaZB" Received: by mail.gandi.net (Postfix) with ESMTPA id 0AA661C000C; Mon, 30 Sep 2024 12:16:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698570; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=iIUXvhb/6k8yqNTOTdXI2a7OI1BOudVjy0G7Tj0oLuI=; b=iPyFyaZBRSQHcfBM6plb3imzKRhhMZ4pFC5Ep0FBPNoxVtqEe8QOoJoGX7g31p359cFOs+ PtJyHi7tDuUeGPzmfM7TCUBL59DNMosUcny6kK2gtQAfO1KGKEhj96Z1jvR0z8pRIwDy/+ rp750AIK/2X+TicfiPuwSresKuFoqlwDrbZ0rq/UV95Kwj+J3xP4VJiRMLqc0YSS03xv0w k/CNAMqIi75Irf6cpzqzIjUCSoUK04+o/CmFn+YDm9O+V/WuhfA8NNsj0TPZ/CFNyKUOCg Cb8Edr4NGRYkfH01GAA+EC9sx9aAqtq+r1MMhy8b2Sf+nxi1+765dDeVYmGQZg== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v6 1/7] dt-bindings: reset: microchip,rst: Allow to replace cpu-syscon by an additional reg item Date: Mon, 30 Sep 2024 14:15:41 +0200 Message-ID: <20240930121601.172216-2-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" In the LAN966x PCI device use case, syscon cannot be used as syscon devices do not support removal [1]. A syscon device is a core "system" device and not a device available in some addon boards and so, it is not supposed to be removed. In order to remove the syscon device usage, allow the reset controller to have a direct access to the address range it needs to use. Link: https://lore.kernel.org/all/20240923100741.11277439@bootlin.com/ [1] Signed-off-by: Herve Codina --- .../bindings/reset/microchip,rst.yaml | 35 ++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/D= ocumentation/devicetree/bindings/reset/microchip,rst.yaml index f2da0693b05a..5164239a372c 100644 --- a/Documentation/devicetree/bindings/reset/microchip,rst.yaml +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml @@ -25,12 +25,16 @@ properties: - microchip,lan966x-switch-reset =20 reg: + minItems: 1 items: - description: global control block registers + - description: cpu system block registers =20 reg-names: + minItems: 1 items: - const: gcb + - const: cpu =20 "#reset-cells": const: 1 @@ -39,12 +43,29 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: syscon used to access CPU reset =20 +allOf: + # Allow to use the second reg item instead of cpu-syscon + - if: + required: + - cpu-syscon + then: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + else: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + required: - compatible - reg - reg-names - "#reset-cells" - - cpu-syscon =20 additionalProperties: false =20 @@ -57,3 +78,15 @@ examples: #reset-cells =3D <1>; cpu-syscon =3D <&cpu_ctrl>; }; + + /* + * The following construction can be used if the cpu-syscon device is = not + * present. This is the case when the LAN966x is used as a PCI device. + */ + reset-controller@22010008 { + compatible =3D "microchip,lan966x-switch-reset"; + reg =3D <0xe200400c 0x4>, + <0xe00c0000 0xa8>; + reg-names =3D "gcb", "cpu"; + #reset-cells =3D <1>; + }; --=20 2.46.1