From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C43218F2DD; Mon, 30 Sep 2024 12:16:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698574; cv=none; b=OlqGuq2bvGOL487OPRCtBa5M3bRXpr/TG/YGwRGCsaZEziVBnjpzs8p6uZ4Zr7S1X2f+ka9ttNuvHsrQ6JhnW0hrHj8ssv015g+EjX8IYvZ/91IVMNc0p7WrN0leLBo7MuqjMuHtwKim5FmWkHeqFmo5WJbYk2j544aupzfHZ0w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698574; c=relaxed/simple; bh=Rr5pYzPzILVGLFfUKpS1kwrZ9OqlvXpyVlGyV3RDDoo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PCxQqSDosYo3kz/hqop/P4DngrVIkBgYuuD8Wf8Xjwy9ahgc7t8FhsEbHyweJz+2M5rdRobDcxKtfPuNtrnwZeLjKsUJye3sv6QHvjIU+tF3pUYzCDfRBLvuI1x6hZbmngrX1bwhELWdI35npB3bzqVIXrAB8Gtyc11PyxnyZqE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=iPyFyaZB; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="iPyFyaZB" Received: by mail.gandi.net (Postfix) with ESMTPA id 0AA661C000C; Mon, 30 Sep 2024 12:16:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698570; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=iIUXvhb/6k8yqNTOTdXI2a7OI1BOudVjy0G7Tj0oLuI=; b=iPyFyaZBRSQHcfBM6plb3imzKRhhMZ4pFC5Ep0FBPNoxVtqEe8QOoJoGX7g31p359cFOs+ PtJyHi7tDuUeGPzmfM7TCUBL59DNMosUcny6kK2gtQAfO1KGKEhj96Z1jvR0z8pRIwDy/+ rp750AIK/2X+TicfiPuwSresKuFoqlwDrbZ0rq/UV95Kwj+J3xP4VJiRMLqc0YSS03xv0w k/CNAMqIi75Irf6cpzqzIjUCSoUK04+o/CmFn+YDm9O+V/WuhfA8NNsj0TPZ/CFNyKUOCg Cb8Edr4NGRYkfH01GAA+EC9sx9aAqtq+r1MMhy8b2Sf+nxi1+765dDeVYmGQZg== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v6 1/7] dt-bindings: reset: microchip,rst: Allow to replace cpu-syscon by an additional reg item Date: Mon, 30 Sep 2024 14:15:41 +0200 Message-ID: <20240930121601.172216-2-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" In the LAN966x PCI device use case, syscon cannot be used as syscon devices do not support removal [1]. A syscon device is a core "system" device and not a device available in some addon boards and so, it is not supposed to be removed. In order to remove the syscon device usage, allow the reset controller to have a direct access to the address range it needs to use. Link: https://lore.kernel.org/all/20240923100741.11277439@bootlin.com/ [1] Signed-off-by: Herve Codina --- .../bindings/reset/microchip,rst.yaml | 35 ++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/D= ocumentation/devicetree/bindings/reset/microchip,rst.yaml index f2da0693b05a..5164239a372c 100644 --- a/Documentation/devicetree/bindings/reset/microchip,rst.yaml +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml @@ -25,12 +25,16 @@ properties: - microchip,lan966x-switch-reset =20 reg: + minItems: 1 items: - description: global control block registers + - description: cpu system block registers =20 reg-names: + minItems: 1 items: - const: gcb + - const: cpu =20 "#reset-cells": const: 1 @@ -39,12 +43,29 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: syscon used to access CPU reset =20 +allOf: + # Allow to use the second reg item instead of cpu-syscon + - if: + required: + - cpu-syscon + then: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + else: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + required: - compatible - reg - reg-names - "#reset-cells" - - cpu-syscon =20 additionalProperties: false =20 @@ -57,3 +78,15 @@ examples: #reset-cells =3D <1>; cpu-syscon =3D <&cpu_ctrl>; }; + + /* + * The following construction can be used if the cpu-syscon device is = not + * present. This is the case when the LAN966x is used as a PCI device. + */ + reset-controller@22010008 { + compatible =3D "microchip,lan966x-switch-reset"; + reg =3D <0xe200400c 0x4>, + <0xe00c0000 0xa8>; + reg-names =3D "gcb", "cpu"; + #reset-cells =3D <1>; + }; --=20 2.46.1 From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEB0218EFDC; Mon, 30 Sep 2024 12:16:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698576; cv=none; b=Nc1sUFR0TdYgw7X5PW0jUScYXm+IDz4G6pmc+tkRqyyB95uGN3W7cJoA+GuM2J8xyO3kdqh9k2mN9lbxcZGPNC4+Z++7gCvH9+5nIJSszpWxcX0ryyXgVpU9a8HU+QOcronNIoS0mXNM9mLHfMZNDjc4UXGObcOHfqkGELi4a6E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698576; c=relaxed/simple; bh=y1h4hhHoRe7G8lecZ58inUZ7WynZOxZHzgFrr6trPZg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BL2yBrcf/K3U10rT4huBYZIJavMZv/jb9+6JQMiVsq7A3weZxhDwPdeq92/8ah1v3s/qb9DPdOsIeslSkpyYNA3LZ7oTewNugPFWGf+FMolR7eoGJ6IyIBupXRpp+vplbHxxrUhIOc4xTuuRerb70ft2KLQ6kymPMLdSSdGHba0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SL/jQ8hy; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SL/jQ8hy" Received: by mail.gandi.net (Postfix) with ESMTPA id A92421C000E; Mon, 30 Sep 2024 12:16:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698572; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=H75kKm8YWb4wMHVGvZX4AtY6DIz/y+0Eo67GzMZxTeo=; b=SL/jQ8hy+sdq1J4IGu4jIz6hcaZlN9zy6u/VrUxQHo1AI/mHTo/ElX0/uxRhemRaEHnPqz OlZRLQrGxRnHvUrzO6wDDSAJ81n238mFIwKRN/0IrWfNTth2zDZvRpMDzWly/jy/gn2Z5B JwwqMTZa+Sf+bw1VV23P6mDLw0CS+VuXlPkLKUfdjkQUFAR1YR5ZUv2/bBJfIFMiuTTCcA rIOsGlqk4UKVCPvhsUj83whRpVa4sLKHKeDDEIrrfMl9gjmI+o0sDaqgL6DbhGdhmq3wRm A4AykhT0T+Mt7JFYXBAZy8WBYhkwCKR8eM7dmsDgDnkShOvn/Y8P5+NkPPiHUg== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v6 2/7] reset: mchp: sparx5: Use the second reg item when cpu-syscon is not present Date: Mon, 30 Sep 2024 14:15:42 +0200 Message-ID: <20240930121601.172216-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" In the LAN966x PCI device use case, syscon cannot be used as syscon devices do not support removal [1]. A syscon device is a core "system" device and not a device available in some addon boards and so, it is not supposed to be removed. In order to remove the syscon usage, use a local mapping of a reg address range when cpu-syscon is not present. Link: https://lore.kernel.org/all/20240923100741.11277439@bootlin.com/ [1] Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/reset-microchip-sparx5.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-m= icrochip-sparx5.c index 636e85c388b0..1c095fa41d69 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -114,8 +114,22 @@ static int mchp_sparx5_reset_probe(struct platform_dev= ice *pdev) return -ENOMEM; =20 err =3D mchp_sparx5_map_syscon(pdev, "cpu-syscon", &ctx->cpu_ctrl); - if (err) + switch (err) { + case 0: + break; + case -ENODEV: + /* + * The cpu-syscon device is not available. + * Fall back with IO mapping (i.e. mapping from reg property). + */ + err =3D mchp_sparx5_map_io(pdev, 1, &ctx->cpu_ctrl); + if (err) + return err; + break; + default: return err; + } + err =3D mchp_sparx5_map_io(pdev, 0, &ctx->gcb_ctrl); if (err) return err; --=20 2.46.1 From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF0D8192D80; Mon, 30 Sep 2024 12:16:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698578; cv=none; b=VxF+z5r33CRftgry5PmMoyF7AVx8hwGx+4SMIa28HClapigAjyvdD/fhsRvMydApg4NWFsS1ZWZunSdlKnBo+YEzuGQpPUDeWH4DMvTEcNkK/nOx89fzhbNavgriMANW95MNv6c+LnxlF9nmf+52b5V9fK1ejYPvU6b8ujC44y4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698578; c=relaxed/simple; bh=akpAtVD1MfcObTd1j7w05mcnW3+ri1RrbLDuIil7i6s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=svLO6CsMF6tziUNPU95OdzpZGP3YrXJmENj/E3Mhhsr2fAsYlOZDi+0sKY9kBx1fT5Up6GBsUSsWqiJOEVcWS10shGUr4krUGS3qF+tVVnnrV+BqXMSTCQd1qN/kZy1KPpZoli3pd2CRXyozWP+NXC4ZIHfrSgOZwA9Upy0sKeg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=O4bpn9h8; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="O4bpn9h8" Received: by mail.gandi.net (Postfix) with ESMTPA id 609131C0004; Mon, 30 Sep 2024 12:16:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698573; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SQsU8KDT0ka39UJvrtg2yjnzLUu6BhvWZaPM8VyryKs=; b=O4bpn9h8cYSlwmpfHilQktR5SeSXk9bZD+6EV1XyxZF4OGKxFcTomYSEy5mrtVBtvZBjuZ VvZaCrh+Xy9Mjc/GPYhSDman2tDGnjp6Tb3JhscSvp4VNr3Mgzul86YSvPSEYSklvEHici YivXaUvDQvHZS9n+oWVjxc9WQNxQ4rK4OPVsOu5O15FNTSjZhuzkhQWRgSJ4GccCPyWu8f GdGAqpezq8nX+l+kAIMBvmpTF4ejlsMO12+QexvbildT4vcG3vh1fTvlF/c3CQ2FLhcqID AEPeQNN6Gzkt5Nz9f+jDc9+ziELRwE/NfPDgVVptF524n6n/u558U/VUFsiyPg== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v6 3/7] misc: Add support for LAN966x PCI device Date: Mon, 30 Sep 2024 14:15:43 +0200 Message-ID: <20240930121601.172216-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Add a PCI driver that handles the LAN966x PCI device using a device-tree overlay. This overlay is applied to the PCI device DT node and allows to describe components that are present in the device. The memory from the device-tree is remapped to the BAR memory thanks to "ranges" properties computed at runtime by the PCI core during the PCI enumeration. The PCI device itself acts as an interrupt controller and is used as the parent of the internal LAN966x interrupt controller to route the interrupts to the assigned PCI INTx interrupt. Signed-off-by: Herve Codina Acked-by: Greg Kroah-Hartman --- drivers/misc/Kconfig | 24 ++++ drivers/misc/Makefile | 3 + drivers/misc/lan966x_pci.c | 215 ++++++++++++++++++++++++++++++++++ drivers/misc/lan966x_pci.dtso | 161 +++++++++++++++++++++++++ drivers/pci/quirks.c | 1 + 5 files changed, 404 insertions(+) create mode 100644 drivers/misc/lan966x_pci.c create mode 100644 drivers/misc/lan966x_pci.dtso diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 3fe7e2a9bd29..8e5b06ac9b6f 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -610,6 +610,30 @@ config MARVELL_CN10K_DPI To compile this driver as a module, choose M here: the module will be called mrvl_cn10k_dpi. =20 +config MCHP_LAN966X_PCI + tristate "Microchip LAN966x PCIe Support" + depends on PCI + select OF + select OF_OVERLAY + select IRQ_DOMAIN + help + This enables the support for the LAN966x PCIe device. + This is used to drive the LAN966x PCIe device from the host system + to which it is connected. + + This driver uses an overlay to load other drivers to support for + LAN966x internal components. + Even if this driver does not depend on these other drivers, in order + to have a fully functional board, the following drivers are needed: + - fixed-clock (COMMON_CLK) + - lan966x-oic (LAN966X_OIC) + - lan966x-cpu-syscon (MFD_SYSCON) + - lan966x-switch-reset (RESET_MCHP_SPARX5) + - lan966x-pinctrl (PINCTRL_OCELOT) + - lan966x-serdes (PHY_LAN966X_SERDES) + - lan966x-miim (MDIO_MSCC_MIIM) + - lan966x-switch (LAN966X_SWITCH) + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index a9f94525e181..885b22989580 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -71,4 +71,7 @@ obj-$(CONFIG_TPS6594_ESM) +=3D tps6594-esm.o obj-$(CONFIG_TPS6594_PFSM) +=3D tps6594-pfsm.o obj-$(CONFIG_NSM) +=3D nsm.o obj-$(CONFIG_MARVELL_CN10K_DPI) +=3D mrvl_cn10k_dpi.o +lan966x-pci-objs :=3D lan966x_pci.o +lan966x-pci-objs +=3D lan966x_pci.dtbo.o +obj-$(CONFIG_MCHP_LAN966X_PCI) +=3D lan966x-pci.o obj-y +=3D keba/ diff --git a/drivers/misc/lan966x_pci.c b/drivers/misc/lan966x_pci.c new file mode 100644 index 000000000000..9c79b58137e5 --- /dev/null +++ b/drivers/misc/lan966x_pci.c @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Microchip LAN966x PCI driver + * + * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries. + * + * Authors: + * Cl=C3=A9ment L=C3=A9ger + * Herv=C3=A9 Codina + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Embedded dtbo symbols created by cmd_wrap_S_dtb in scripts/Makefile.lib= */ +extern char __dtbo_lan966x_pci_begin[]; +extern char __dtbo_lan966x_pci_end[]; + +struct pci_dev_intr_ctrl { + struct pci_dev *pci_dev; + struct irq_domain *irq_domain; + int irq; +}; + +static int pci_dev_irq_domain_map(struct irq_domain *d, unsigned int virq,= irq_hw_number_t hw) +{ + irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq); + return 0; +} + +static const struct irq_domain_ops pci_dev_irq_domain_ops =3D { + .map =3D pci_dev_irq_domain_map, + .xlate =3D irq_domain_xlate_onecell, +}; + +static irqreturn_t pci_dev_irq_handler(int irq, void *data) +{ + struct pci_dev_intr_ctrl *intr_ctrl =3D data; + int ret; + + ret =3D generic_handle_domain_irq(intr_ctrl->irq_domain, 0); + return ret ? IRQ_NONE : IRQ_HANDLED; +} + +static struct pci_dev_intr_ctrl *pci_dev_create_intr_ctrl(struct pci_dev *= pdev) +{ + struct pci_dev_intr_ctrl *intr_ctrl __free(kfree) =3D NULL; + struct fwnode_handle *fwnode; + int ret; + + fwnode =3D dev_fwnode(&pdev->dev); + if (!fwnode) + return ERR_PTR(-ENODEV); + + intr_ctrl =3D kmalloc(sizeof(*intr_ctrl), GFP_KERNEL); + if (!intr_ctrl) + return ERR_PTR(-ENOMEM); + + intr_ctrl->pci_dev =3D pdev; + + intr_ctrl->irq_domain =3D irq_domain_create_linear(fwnode, 1, &pci_dev_ir= q_domain_ops, + intr_ctrl); + if (!intr_ctrl->irq_domain) { + pci_err(pdev, "Failed to create irqdomain\n"); + return ERR_PTR(-ENOMEM); + } + + ret =3D pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_INTX); + if (ret < 0) { + pci_err(pdev, "Unable alloc irq vector (%d)\n", ret); + goto err_remove_domain; + } + intr_ctrl->irq =3D pci_irq_vector(pdev, 0); + ret =3D request_irq(intr_ctrl->irq, pci_dev_irq_handler, IRQF_SHARED, + pci_name(pdev), intr_ctrl); + if (ret) { + pci_err(pdev, "Unable to request irq %d (%d)\n", intr_ctrl->irq, ret); + goto err_free_irq_vector; + } + + return_ptr(intr_ctrl); + +err_free_irq_vector: + pci_free_irq_vectors(pdev); +err_remove_domain: + irq_domain_remove(intr_ctrl->irq_domain); + return ERR_PTR(ret); +} + +static void pci_dev_remove_intr_ctrl(struct pci_dev_intr_ctrl *intr_ctrl) +{ + free_irq(intr_ctrl->irq, intr_ctrl); + pci_free_irq_vectors(intr_ctrl->pci_dev); + irq_dispose_mapping(irq_find_mapping(intr_ctrl->irq_domain, 0)); + irq_domain_remove(intr_ctrl->irq_domain); + kfree(intr_ctrl); +} + +static void devm_pci_dev_remove_intr_ctrl(void *intr_ctrl) +{ + pci_dev_remove_intr_ctrl(intr_ctrl); +} + +static int devm_pci_dev_create_intr_ctrl(struct pci_dev *pdev) +{ + struct pci_dev_intr_ctrl *intr_ctrl; + + intr_ctrl =3D pci_dev_create_intr_ctrl(pdev); + if (IS_ERR(intr_ctrl)) + return PTR_ERR(intr_ctrl); + + return devm_add_action_or_reset(&pdev->dev, devm_pci_dev_remove_intr_ctrl= , intr_ctrl); +} + +struct lan966x_pci { + struct device *dev; + int ovcs_id; +}; + +static int lan966x_pci_load_overlay(struct lan966x_pci *data) +{ + u32 dtbo_size =3D __dtbo_lan966x_pci_end - __dtbo_lan966x_pci_begin; + void *dtbo_start =3D __dtbo_lan966x_pci_begin; + + return of_overlay_fdt_apply(dtbo_start, dtbo_size, &data->ovcs_id, dev_of= _node(data->dev)); +} + +static void lan966x_pci_unload_overlay(struct lan966x_pci *data) +{ + of_overlay_remove(&data->ovcs_id); +} + +static int lan966x_pci_probe(struct pci_dev *pdev, const struct pci_device= _id *id) +{ + struct device *dev =3D &pdev->dev; + struct lan966x_pci *data; + int ret; + + /* + * On ACPI system, fwnode can point to the ACPI node. + * This driver needs an of_node to be used as the device-tree overlay + * target. This of_node should be set by the PCI core if it succeeds in + * creating it (CONFIG_PCI_DYNAMIC_OF_NODES feature). + * Check here for the validity of this of_node. + */ + if (!dev_of_node(dev)) + return dev_err_probe(dev, -EINVAL, "Missing of_node for device\n"); + + /* Need to be done before devm_pci_dev_create_intr_ctrl. + * It allocates an IRQ and so pdev->irq is updated. + */ + ret =3D pcim_enable_device(pdev); + if (ret) + return ret; + + ret =3D devm_pci_dev_create_intr_ctrl(pdev); + if (ret) + return ret; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + pci_set_drvdata(pdev, data); + data->dev =3D dev; + + ret =3D lan966x_pci_load_overlay(data); + if (ret) + return ret; + + pci_set_master(pdev); + + ret =3D of_platform_default_populate(dev_of_node(dev), NULL, dev); + if (ret) + goto err_unload_overlay; + + return 0; + +err_unload_overlay: + lan966x_pci_unload_overlay(data); + return ret; +} + +static void lan966x_pci_remove(struct pci_dev *pdev) +{ + struct lan966x_pci *data =3D pci_get_drvdata(pdev); + + of_platform_depopulate(data->dev); + + lan966x_pci_unload_overlay(data); +} + +static struct pci_device_id lan966x_pci_ids[] =3D { + { PCI_DEVICE(PCI_VENDOR_ID_EFAR, 0x9660) }, + { } +}; +MODULE_DEVICE_TABLE(pci, lan966x_pci_ids); + +static struct pci_driver lan966x_pci_driver =3D { + .name =3D "mchp_lan966x_pci", + .id_table =3D lan966x_pci_ids, + .probe =3D lan966x_pci_probe, + .remove =3D lan966x_pci_remove, +}; +module_pci_driver(lan966x_pci_driver); + +MODULE_AUTHOR("Herve Codina "); +MODULE_DESCRIPTION("Microchip LAN966x PCI driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/misc/lan966x_pci.dtso b/drivers/misc/lan966x_pci.dtso new file mode 100644 index 000000000000..db57b3a43fe9 --- /dev/null +++ b/drivers/misc/lan966x_pci.dtso @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Microchip UNG + */ + +#include +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target-path=3D""; + __overlay__ { + #address-cells =3D <3>; + #size-cells =3D <2>; + + pci-ep-bus@0 { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + /* + * map @0xe2000000 (32MB) to BAR0 (CPU) + * map @0xe0000000 (16MB) to BAR1 (AMBA) + */ + ranges =3D <0xe2000000 0x00 0x00 0x00 0x2000000 + 0xe0000000 0x01 0x00 0x00 0x1000000>; + + oic: oic@e00c0120 { + compatible =3D "microchip,lan966x-oic"; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts =3D <0>; /* PCI INTx assigned interrupt */ + reg =3D <0xe00c0120 0x190>; + }; + + cpu_clk: cpu_clk { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <600000000>; // CPU clock =3D 600MHz + }; + + ddr_clk: ddr_clk { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <30000000>; // Fabric clock =3D 30MHz + }; + + sys_clk: sys_clk { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <15625000>; // System clock =3D 15.625MHz + }; + + reset: reset@e200400c { + compatible =3D "microchip,lan966x-switch-reset"; + reg =3D <0xe200400c 0x4>, <0xe00c0000 0xa8>; + reg-names =3D "gcb","cpu"; + #reset-cells =3D <1>; + }; + + gpio: pinctrl@e2004064 { + compatible =3D "microchip,lan966x-pinctrl"; + reg =3D <0xe2004064 0xb4>, + <0xe2010024 0x138>; + resets =3D <&reset 0>; + reset-names =3D "switch"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&gpio 0 0 78>; + interrupt-parent =3D <&oic>; + interrupt-controller; + interrupts =3D <17 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells =3D <2>; + + tod_pins: tod_pins { + pins =3D "GPIO_36"; + function =3D "ptpsync_1"; + }; + + fc0_a_pins: fcb4-i2c-pins { + /* RXD, TXD */ + pins =3D "GPIO_9", "GPIO_10"; + function =3D "fc0_a"; + }; + + }; + + serdes: serdes@e202c000 { + compatible =3D "microchip,lan966x-serdes"; + reg =3D <0xe202c000 0x9c>, + <0xe2004010 0x4>; + #phy-cells =3D <2>; + }; + + mdio1: mdio@e200413c { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "microchip,lan966x-miim"; + reg =3D <0xe200413c 0x24>, + <0xe2010020 0x4>; + + resets =3D <&reset 0>; + reset-names =3D "switch"; + + lan966x_phy0: ethernet-lan966x_phy@1 { + reg =3D <1>; + }; + + lan966x_phy1: ethernet-lan966x_phy@2 { + reg =3D <2>; + }; + }; + + switch: switch@e0000000 { + compatible =3D "microchip,lan966x-switch"; + reg =3D <0xe0000000 0x0100000>, + <0xe2000000 0x0800000>; + reg-names =3D "cpu", "gcb"; + + interrupt-parent =3D <&oic>; + interrupts =3D <12 IRQ_TYPE_LEVEL_HIGH>, + <9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "xtr", "ana"; + + resets =3D <&reset 0>; + reset-names =3D "switch"; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&tod_pins>; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port0: port@0 { + phy-handle =3D <&lan966x_phy0>; + + reg =3D <0>; + phy-mode =3D "gmii"; + phys =3D <&serdes 0 CU(0)>; + }; + + port1: port@1 { + phy-handle =3D <&lan966x_phy1>; + + reg =3D <1>; + phy-mode =3D "gmii"; + phys =3D <&serdes 1 CU(1)>; + }; + }; + }; + }; + }; + }; +}; diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index dccb60c1d9cc..41dec625ed7b 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6266,6 +6266,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa76e,= dpc_log_size); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node= ); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node= ); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REDHAT, 0x0005, of_pci_make_dev_node= ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, 0x9660, of_pci_make_dev_node); =20 /* * Devices known to require a longer delay before first config space access --=20 2.46.1 From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55A4B194083; Mon, 30 Sep 2024 12:16:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698579; cv=none; b=fEcCF0s00c55IrCDlfixzRalmfVKN5xXdrN0Cft3O0e6YLpdJgKD8nyqjXNoZY8JBTiAQ3CAamMR0pB84h0ZzX478rII1PeHJG+ZuSEIbBNJ6iGu9CRWp63ZN/jEAhJnw+jVLNEAwk5oXOFZtlIk5Nv3Bv0BXVAm1DXcJL7WNhU= ARC-Message-Signature: i=1; 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Mon, 30 Sep 2024 12:16:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698575; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+ecYTblGNB4SAWjXRGVXCM0U29fxnWCzO4ZD+D2D6aw=; b=cpVDn1WT0ki+peliJ6XlQHCejURb2hIxFCiFDQbR22LMwpOi50o3AJ9IujBT5UPbQimRj4 0866azh/9GBUocZCmuVQdWF2fqoxfdAvrmcF7WRkfEBxEVUIyVsQznR6l9ED+mwzTfaSoP BPBnBC2VAqSH5/czObjcNPWG7z68brRzEzU2EDK6dR3qydLY2NRV0cPQ80MR8TCzr1zQIb G/uqe2fGLDJsS3aJ8AUDM4nG41HTqbvp65BeJDsSPlMiwsbAZVX53wYxKNUEK3JO+6B5BU wseU7zBa2RZeJRuxnIJ2u6TSrebCbvUzBe+IE5+vbg9ifSgWNLob2GkXUchYVw== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v6 4/7] MAINTAINERS: Add the Microchip LAN966x PCI driver entry Date: Mon, 30 Sep 2024 14:15:44 +0200 Message-ID: <20240930121601.172216-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" After contributing the driver, add myself as the maintainer for the Microchip LAN966x PCI driver. Signed-off-by: Herve Codina --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c27f3190737f..79125b6f7814 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15184,6 +15184,12 @@ S: Maintained F: Documentation/devicetree/bindings/interrupt-controller/microchip,lan966= x-oic.yaml F: drivers/irqchip/irq-lan966x-oic.c =20 +MICROCHIP LAN966X PCI DRIVER +M: Herve Codina +S: Maintained +F: drivers/misc/lan966x_pci.c +F: drivers/misc/lan966x_pci.dtso + MICROCHIP LCDFB DRIVER M: Nicolas Ferre L: linux-fbdev@vger.kernel.org --=20 2.46.1 From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9F92194C85; Mon, 30 Sep 2024 12:16:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698581; cv=none; b=Y18O43cpkv3d4OJm9wI1BbNhEt0YsM2/RS2Jc1f7XuXEjZ1isEqPYaafWML1tjDQjrpIi4jvOagoxocdr6p7q+gUNHjCV/BsbHLXfcu8Djdqr9HxvqT8E1klQFOjgtWpZUoHLFtdwg/E+kxOXzszNT93PXVgBFLLGtkMcegCTTE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698581; c=relaxed/simple; bh=Yv6trJDcY8dRr9upr/+22Oz6O6qPvicMhYtUiKecTIM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HwsudiQdzfW9unTlG90BRTmpdybPtDObVqc6MmLEz5nNNa1gvbp5rnZhNhOZHTKTNCbIAfQ0j3hOvch76+JjubK9Z7ex+IsTCxVwkhv6rUxD0jgpV7x+mRKHttZuqh5TivjTPXqfTziSZYXlGOoPUTgLw08XmW+k3g3xOdIfz98= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=a0psuk3x; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="a0psuk3x" Received: by mail.gandi.net (Postfix) with ESMTPA id DBDDE1C0011; Mon, 30 Sep 2024 12:16:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698577; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hhvovnJI7ARZ4teDGL2XIqgm4wnhHdz7ckK46wOUTTk=; b=a0psuk3xjGgjVKzkbhUEk0AL5gPxlzD4emxRTCq4NAkbhgsfHPGCJa8aM3+tPimLoW1gqe 8AB0qT3o0JjuAN2c+f0yVEq+c/i5pHDeUwrfiS0xJ56DxKhnCYUHWkwY0CPM7uG24oZsGP Dkj1ZIQND2g2v9fXioDbG5oHCVHvgrMLGTtEYZDSU0JDdl7+5bp69MLDiWUDmwDe1bX0Ou NlqqDzCYqE3f/Lr+RHuDKLJFNSzhj/f9FGfNacodmqoZqZWbl8TR9OVwYqfrNGWNzetNuK qFZ3X+rRfHWh170A9/qalD+IBZh/i97qcD3PxokJDKTtwOy0YDcwlSgefykDbA== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v6 5/7] reset: mchp: sparx5: Add MCHP_LAN966X_PCI dependency Date: Mon, 30 Sep 2024 14:15:45 +0200 Message-ID: <20240930121601.172216-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available when the LAN966x PCI device is enabled. Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5484a65f66b9..86a5504950cb 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -147,7 +147,7 @@ config RESET_LPC18XX =20 config RESET_MCHP_SPARX5 bool "Microchip Sparx5 reset driver" - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST + depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON help --=20 2.46.1 From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 963B919882F; Mon, 30 Sep 2024 12:16:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698582; cv=none; b=cKuSDoQFqcJ2mZ+juoBrM0P6hhA5ERX4gLF/c9odl81HHJscGCi6RQNiVNjOoXghY89Ddy3JEIZWm+NqO/X2AVvOvr/kylPiKBugjA5f+qhkhr1iDNkBfr0W7eU+J4y+HwSrLKbETh5sK2QRMKHEsjr7RGb9bAwMUY9VOMxFq8A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698582; c=relaxed/simple; bh=ZsJFdgHp+HZP9DhJrj15mKunAjdGK+2li3ZVx1o7hH8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Uu2KsyMGKaIlj9L9aIQUHc/PFJvnf+eHMANsvTlqdd3eSadbIVF9MQ1p2Lek6E8mmQ/+KuiqW2q7urZWRXtXnejoxygTxD50nwELrquPh43v8r36ctrwJp/E0ZFSZ3NqMSUOXA1QQ6NITMkTVZ7Nfv7jnQJJe/fW1R5kQAGhRnU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=F+z2WJbD; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="F+z2WJbD" Received: by mail.gandi.net (Postfix) with ESMTPA id 7B4CF1C0002; Mon, 30 Sep 2024 12:16:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698579; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7fgJbfC9lyOKcqApbOxdnR9Zy8/QdynHN0Bvf0ShEr4=; b=F+z2WJbDjw9D8UQs/DwL0c/gOqEM5Ms7PLZ2NvI12Gu9RWYHwc+GUwbC519/yzALAadZ4e zfdB+3gx6DaMyQ456Sxmswogt0VOll5PaBBQbMRJc8QqzQTOqtGzDP5doIn81AQ39AucOX FfiCaWq2uEGIFfu9usxrQu745ksalqZZcNGUw3Bux1C2sLHO1PTVg9fVug+VCqrUV4Ur8i Rrfw+IWcecSO7JZmTmpia1wfNu3uKArzm3tJ4tjiUcdFC+H3aJmlYr68cMABEp/ETmFU8m v7SL95Km1h9RTQka0u1XM1zkcJbccmQJUemh7D9TBxxRmcyYqUy93racIiXXIA== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= Subject: [PATCH v6 6/7] reset: mchp: sparx5: Allow building as a module Date: Mon, 30 Sep 2024 14:15:46 +0200 Message-ID: <20240930121601.172216-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com From: Cl=C3=A9ment L=C3=A9ger This reset controller can be used by the LAN966x PCI device. The LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Cl=C3=A9ment L=C3=A9ger Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 86a5504950cb..93cddbe8609b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -146,7 +146,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. =20 config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" + tristate "Microchip Sparx5 reset driver" depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-m= icrochip-sparx5.c index 1c095fa41d69..8b931af67383 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -172,6 +172,7 @@ static const struct of_device_id mchp_sparx5_reset_of_m= atch[] =3D { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); =20 static struct platform_driver mchp_sparx5_reset_driver =3D { .probe =3D mchp_sparx5_reset_probe, @@ -194,3 +195,4 @@ postcore_initcall(mchp_sparx5_reset_init); =20 MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL"); --=20 2.46.1 From nobody Thu Nov 28 16:40:20 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 460D11990AE; Mon, 30 Sep 2024 12:16:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698584; cv=none; b=dLUpDR60LW+5qK9MpHk4otb6R6hBZSwVCH4efKQrEyJ65rpWfeXXkQsB8Jl3dOBcQG+x7EjV2MmndihV+QkRbt4o1RaU9uzmz8++Nl/QY0BamB4J9d8w12LjcZi6Wl36Po8xmUWp0uM9RTju3miODvHqKKJksn2xbSuSpF5SfQo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727698584; c=relaxed/simple; bh=YqkT5IGi9UJunH2tshNXA2e24IZtms2Ugwn6KtSdJ+M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bHq17zFnv5b2wLf5OTFSReuyONgSI3QaE5LU4lrzstLQVUc/n227XIlBDzcPsEgFfm1l2VS/4ldRKIQJG+wFx5QSN0q5ChbhjB8psHi3nxmMdNkX8WtLxZUR6ZzCN+F25qKK4yeRlkAYMfBBLwYhDo46T4JagVkLvWBdGKUqXck= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=cS0L1nBd; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="cS0L1nBd" Received: by mail.gandi.net (Postfix) with ESMTPA id 37F091C000C; Mon, 30 Sep 2024 12:16:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727698580; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YjuDwokkG7OF/4ROPKeyv/vcxKhZ7wMvKgFy1WdBHx4=; b=cS0L1nBdhie2Hf5FoT9Y7d67EIfa0ezwe3WrbEWmrMBAlZz5DMWnyvGlyOkV7Kse8J3dS6 PK+8+L5lvYOrhrRNxbt9HgajRA56P1k+w73q7A0mj2rih1OgjqamOUe60b5VtBxN0fITRf SxmpKtRAUw7xn9hutrm34X4bOdtcuYKLl5pQRL7zRalRAtb41vR7xry7kWg51WLz/lMGN/ Kv/aW+jvNMCqQWKY3AwDPFNVdfRE76sV1n5E1WtYwlNXynbNTmP+SNe2Mckeyy1UwD0MBs 73chAvpNUWm5m1wyl1ZsiMDpt9Y/N6w2YyETZrugaBk2dS2zpj249+Da4mhXTg== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= Subject: [PATCH v6 7/7] reset: mchp: sparx5: set the dev member of the reset controller Date: Mon, 30 Sep 2024 14:15:47 +0200 Message-ID: <20240930121601.172216-8-herve.codina@bootlin.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240930121601.172216-1-herve.codina@bootlin.com> References: <20240930121601.172216-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com From: Cl=C3=A9ment L=C3=A9ger In order to guarantee the device will not be deleted by the reset controller consumer, set the dev member of the reset controller. Signed-off-by: Cl=C3=A9ment L=C3=A9ger Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/reset-microchip-sparx5.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-m= icrochip-sparx5.c index 8b931af67383..6bcc3669b71a 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -135,6 +135,7 @@ static int mchp_sparx5_reset_probe(struct platform_devi= ce *pdev) return err; =20 ctx->rcdev.owner =3D THIS_MODULE; + ctx->rcdev.dev =3D &pdev->dev; ctx->rcdev.nr_resets =3D 1; ctx->rcdev.ops =3D &sparx5_reset_ops; ctx->rcdev.of_node =3D dn; --=20 2.46.1