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Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by GV1PR04MB10536.eurprd04.prod.outlook.com (2603:10a6:150:208::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8005.26; Mon, 30 Sep 2024 05:29:36 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%4]) with mapi id 15.20.8005.024; Mon, 30 Sep 2024 05:29:36 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, quic_bjorande@quicinc.com, geert+renesas@glider.be, dmitry.baryshkov@linaro.org, arnd@arndb.de, nfraprado@collabora.com, o.rempel@pengutronix.de, y.moog@phytec.de Subject: [PATCH 5/8] dt-bindings: display: bridge: Add ITE IT6263 LVDS to HDMI converter Date: Mon, 30 Sep 2024 13:29:00 +0800 Message-Id: <20240930052903.168881-6-victor.liu@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240930052903.168881-1-victor.liu@nxp.com> References: <20240930052903.168881-1-victor.liu@nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SI2PR06CA0015.apcprd06.prod.outlook.com (2603:1096:4:186::7) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|GV1PR04MB10536:EE_ X-MS-Office365-Filtering-Correlation-Id: 8a0678ad-9385-45ed-8a33-08dce110df0b X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|52116014|7416014|376014|38350700014; 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charset="utf-8" Document ITE IT6263 LVDS to HDMI converter. Product link: https://www.ite.com.tw/en/product/cate1/IT6263 Signed-off-by: Liu Ying --- .../bindings/display/bridge/ite,it6263.yaml | 310 ++++++++++++++++++ 1 file changed, 310 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ite,it= 6263.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6263.ya= ml b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml new file mode 100644 index 000000000000..97fb81e5bc4a --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6263.yaml @@ -0,0 +1,310 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/ite,it6263.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ITE IT6263 LVDS to HDMI converter + +maintainers: + - Liu Ying + +description: | + The IT6263 is a high-performance single-chip De-SSC(De-Spread Spectrum) = LVDS + to HDMI converter. Combined with LVDS receiver and HDMI 1.4a transmitte= r, + the IT6263 supports LVDS input and HDMI 1.4 output by conversion functio= n. + The built-in LVDS receiver can support single-link and dual-link LVDS in= puts, + and the built-in HDMI transmitter is fully compliant with HDMI 1.4a/3D, = HDCP + 1.2 and backward compatible with DVI 1.0 specification. + + The IT6263 also encodes and transmits up to 8 channels of I2S digital au= dio, + with sampling rate up to 192KHz and sample size up to 24 bits. In additi= on, + an S/PDIF input port takes in compressed audio of up to 192KHz frame rat= e. + + The newly supported High-Bit Rate(HBR) audio by HDMI specifications v1.3= is + provided by the IT6263 in two interfaces: the four I2S input ports or the + S/PDIF input port. With both interfaces the highest possible HBR frame = rate + is supported at up to 768KHz. + +properties: + compatible: + const: ite,it6263 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: audio master clock + + clock-names: + const: mclk + + reset-gpios: + maxItems: 1 + + ivdd-supply: + description: 1.8V digital logic power + + ovdd-supply: + description: 3.3V I/O pin power + + txavcc18-supply: + description: 1.8V HDMI analog frontend power + + txavcc33-supply: + description: 3.3V HDMI analog frontend power + + pvcc1-supply: + description: 1.8V HDMI frontend core PLL power + + pvcc2-supply: + description: 1.8V HDMI frontend filter PLL power + + avcc-supply: + description: 3.3V LVDS frontend power + + anvdd-supply: + description: 1.8V LVDS frontend analog power + + apvdd-supply: + description: 1.8V LVDS frontend PLL power + + "#sound-dai-cells": + const: 0 + + ite,i2s-audio-fifo-sources: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + items: + enum: [0, 1, 2, 3] + description: + Each array element indicates the pin number of an I2S serial data in= put + line which is connected to an audio FIFO, from audio FIFO0 to FIFO3. + + ite,rl-channel-swap-audio-sources: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + uniqueItems: true + items: + enum: [0, 1, 2, 3] + description: + Each array element indicates an audio source whose right channel and= left + channel are swapped by this converter. For I2S, the element is the p= in + number of an I2S serial data input line. For S/PDIF, the element is = always + 0. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + oneOf: + - properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: the first LVDS input link + + port@1: false + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: video port for the HDMI output + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: sound input port + + required: + - port@0 + - port@2 + + - properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: the first LVDS input link + + properties: + dual-lvds-odd-pixels: + type: boolean + description: the first sink port for odd pixels + + dual-lvds-even-pixels: + type: boolean + description: the first sink port for even pixels + + oneOf: + - required: [dual-lvds-odd-pixels] + - required: [dual-lvds-even-pixels] + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: the second LVDS input link + + properties: + dual-lvds-even-pixels: + type: boolean + description: the second sink port for even pixels + + dual-lvds-odd-pixels: + type: boolean + description: the second sink port for odd pixels + + oneOf: + - required: [dual-lvds-even-pixels] + - required: [dual-lvds-odd-pixels] + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: video port for the HDMI output + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: sound input port + + required: + - port@0 + - port@1 + - port@2 + + allOf: + - if: + properties: + port@0: + required: + - dual-lvds-odd-pixels + then: + properties: + port@1: + properties: + dual-lvds-odd-pixels: false + + - if: + properties: + port@0: + required: + - dual-lvds-even-pixels + then: + properties: + port@1: + properties: + dual-lvds-even-pixels: false + +required: + - compatible + - reg + - ivdd-supply + - ovdd-supply + - txavcc18-supply + - txavcc33-supply + - pvcc1-supply + - pvcc2-supply + - avcc-supply + - anvdd-supply + - apvdd-supply + - ports + +additionalProperties: false + +examples: + - | + /* single-link LVDS input */ + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + hdmi@4c { + compatible =3D "ite,it6263"; + reg =3D <0x4c>; + reset-gpios =3D <&gpio1 10 GPIO_ACTIVE_LOW>; + ivdd-supply =3D <®_buck5>; + ovdd-supply =3D <®_vext_3v3>; + txavcc18-supply =3D <®_buck5>; + txavcc33-supply =3D <®_vext_3v3>; + pvcc1-supply =3D <®_buck5>; + pvcc2-supply =3D <®_buck5>; + avcc-supply =3D <®_vext_3v3>; + anvdd-supply =3D <®_buck5>; + apvdd-supply =3D <®_buck5>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + it6263_lvds_link1: endpoint { + remote-endpoint =3D <&ldb_lvds_ch0>; + }; + }; + + port@2 { + reg =3D <2>; + + it6263_out: endpoint { + remote-endpoint =3D <&hdmi_in>; + }; + }; + }; + }; + }; + + - | + /* dual-link LVDS input */ + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + hdmi@4c { + compatible =3D "ite,it6263"; + reg =3D <0x4c>; + reset-gpios =3D <&gpio1 10 GPIO_ACTIVE_LOW>; + ivdd-supply =3D <®_buck5>; + ovdd-supply =3D <®_vext_3v3>; + txavcc18-supply =3D <®_buck5>; + txavcc33-supply =3D <®_vext_3v3>; + pvcc1-supply =3D <®_buck5>; + pvcc2-supply =3D <®_buck5>; + avcc-supply =3D <®_vext_3v3>; + anvdd-supply =3D <®_buck5>; + apvdd-supply =3D <®_buck5>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dual-lvds-odd-pixels; + + it6263_lvds_link1_dual: endpoint { + remote-endpoint =3D <&ldb_lvds_ch0>; + }; + }; + + port@1 { + reg =3D <1>; + dual-lvds-even-pixels; + + it6263_lvds_link2_dual: endpoint { + remote-endpoint =3D <&ldb_lvds_ch1>; + }; + }; + + port@2 { + reg =3D <2>; + + it6263_out_dual: endpoint { + remote-endpoint =3D <&hdmi_in>; + }; + }; + }; + }; + }; --=20 2.34.1