From nobody Thu Nov 28 17:28:54 2024 Received: from mail-pf1-f178.google.com (mail-pf1-f178.google.com [209.85.210.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E28D219DFBF for ; Mon, 30 Sep 2024 19:51:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727725875; cv=none; b=A89sQP2fb3DDN3gGpwICj1QEvvrNXNkv21O8UzdRPV0I0xj74STq9HUufJZrKd1NgRoEfhd9G2qJBiZEU51fzhMtAWBdMgRf7luFBoqFQgnwKgA/9pd2fwZB8RWjw4w7MKGfa2Bd2Jtc0rmB31Br3w0VssmKt/nitUJxLXJjzWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727725875; c=relaxed/simple; bh=l+Ypqn0dlhLhW9HNOVh4gcs6qF6z+H/h6FqVvdjvd38=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UvU1R4ZRkvGIA1+26wN8fc6ZdQyvDrm4K8RWj/u2r1ssKkkwlh60r9hws6dAPiJY8ejExax516W5EpMd2j/C+NupQRTe7CtXASgmDf/I+dT3GHBnK7tClItXesiRpCRhE9WljUQyjxmWPiu0fbD+AmMcXBW0DvIP+Lhs8cBEQaU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=tenstorrent.com; spf=pass smtp.mailfrom=tenstorrent.com; dkim=pass (2048-bit key) header.d=tenstorrent.com header.i=@tenstorrent.com header.b=aZt4JsIy; arc=none smtp.client-ip=209.85.210.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=tenstorrent.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tenstorrent.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tenstorrent.com header.i=@tenstorrent.com header.b="aZt4JsIy" Received: by mail-pf1-f178.google.com with SMTP id d2e1a72fcca58-718d606726cso3391998b3a.3 for ; Mon, 30 Sep 2024 12:51:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tenstorrent.com; s=google; t=1727725872; x=1728330672; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pb8tfbu64/On1UxzwSS9CrWdl/1ZDeU8nCpDLHNsKh4=; b=aZt4JsIyUpj4xqkij4b9F+Cht7906UrxAa05nHr4xmrJqwg1opi4G2OF12No+ievzS /ioXgRjWcYiNWPBi/nHu2VwiOkh+au6UDzamaSoN07zX1Cibwwg3dFp2Dv3I/qWZGiUY t9PxDPmO8rVFpy5uxzZEwqFvyJ8vi6HCEDVq/CQYP2WH/9+oRnStWWwVrWvDImV3o3TR FTj8tzKX7t7bXtAERHflpK2QwB+CEp3CidwQOMSlmW+iyD+wOHGSO50xFOfkzdxw1R2L gURJ+nlu4eBxjS4FRRzAWZxux2h+j6YtnSRqXJRGX4SLDkGHfAYAqPVG8P4L6hwlhfm7 AcDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727725872; x=1728330672; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pb8tfbu64/On1UxzwSS9CrWdl/1ZDeU8nCpDLHNsKh4=; b=tkK0/YquLWciyQ/EQ/uCzzHnxrN9kNOMwF3ha9h5oX79cJJflgljYh1GEkiyC2wYZ3 7tF2AU3q7qD4do3KAmdxsNIIsdYE/fT3e1WQIXXXSqGc6CSJitMwys0o1Yt3VN8Af7hh VhuCJJXBNxt4q2RRo45wqqQnoBAqNYV0x+zK96RIoOtT8MvSlTjrgbUSh2mg14PJFDx9 Tic/phIYzE398hrvul5Rqv2rT7IPIajxRI5cxWuboVXXz/vmUSyorvgnpiRPa/EhcRP2 6hId+K4s/w8jD+5PesUNG6gsMvFhVojbVhsonFS6NpXqZd7x8p/ZrwOXPS93KMtkPuhS VSMQ== X-Forwarded-Encrypted: i=1; AJvYcCUvnnKik6WaxCjpf3HSryavke5i57iZoUm1r2PJ4bb9MVE0ggMXAHzsCMEulLIYaVkdoK1xoCdnS29lbPU=@vger.kernel.org X-Gm-Message-State: AOJu0YyQAlNH09N7Upn2rCW+Z3DKzJ7Xm/7ptbgtAEH/ZJRwxI0dqYoY Y0+bPpuuYZ402cjNHgRclOnlHjsUctJtPqRWGTOjXp/Oi7zFr6Qag9Yi73L+kR4= X-Google-Smtp-Source: AGHT+IEvIJ7D/aUvZ+9vEAI0YrMixoJz4WZLNIF2aIlPc8dw5n72OBrlOfSqh0CQ3uWdR8dQBW+5AA== X-Received: by 2002:a05:6a00:23d5:b0:718:dd89:a1db with SMTP id d2e1a72fcca58-71b260a7b7bmr19231655b3a.28.1727725872212; Mon, 30 Sep 2024 12:51:12 -0700 (PDT) Received: from [127.0.1.1] (71-34-69-82.ptld.qwest.net. [71.34.69.82]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71b26529d4bsm6630213b3a.158.2024.09.30.12.51.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2024 12:51:11 -0700 (PDT) From: Drew Fustini Date: Mon, 30 Sep 2024 12:50:55 -0700 Subject: [PATCH v3 5/8] riscv: dts: thead: Adjust TH1520 GPIO labels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240930-th1520-pinctrl-v3-5-32cea2bdbecb@tenstorrent.com> References: <20240930-th1520-pinctrl-v3-0-32cea2bdbecb@tenstorrent.com> In-Reply-To: <20240930-th1520-pinctrl-v3-0-32cea2bdbecb@tenstorrent.com> To: Drew Fustini , Guo Ren , Fu Wei , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Emil Renner Berthing , Thomas Bonnefille Cc: linux-riscv@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Drew Fustini X-Mailer: b4 0.14.1 From: Emil Renner Berthing Adjust labels for the TH1520 GPIO controllers such that GPIOs can be referenced by the names used by the documentation. Eg. GPIO0_X -> <&gpio0 X Y> GPIO1_X -> <&gpio1 X Y> GPIO2_X -> <&gpio2 X Y> GPIO3_X -> <&gpio3 X Y> GPIO4_X -> <&gpio4 X Y> AOGPIO_X -> <&aogpio X Y> Remove labels for the parent GPIO devices that shouldn't need to be referenced. Tested-by: Thomas Bonnefille Signed-off-by: Emil Renner Berthing Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 2 ++ arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 2 ++ arch/riscv/boot/dts/thead/th1520.dtsi | 24 +++++++++++-------= ---- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index e88b4fce755e..69f82e7afd0b 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -17,6 +17,8 @@ aliases { gpio1 =3D &gpio1; gpio2 =3D &gpio2; gpio3 =3D &gpio3; + gpio4 =3D &gpio4; + gpio5 =3D &aogpio; serial0 =3D &uart0; serial1 =3D &uart1; serial2 =3D &uart2; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv= /boot/dts/thead/th1520-lichee-pi-4a.dts index 7738d2895c5a..58ad381fc1c3 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -14,6 +14,8 @@ aliases { gpio1 =3D &gpio1; gpio2 =3D &gpio2; gpio3 =3D &gpio3; + gpio4 =3D &gpio4; + gpio5 =3D &aogpio; serial0 =3D &uart0; serial1 =3D &uart1; serial2 =3D &uart2; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/th= ead/th1520.dtsi index 7dcc250ee1d1..b958f249930e 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -322,14 +322,14 @@ uart3: serial@ffe7f04000 { status =3D "disabled"; }; =20 - gpio2: gpio@ffe7f34000 { + gpio@ffe7f34000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xe7f34000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO2>; =20 - portc: gpio-controller@0 { + gpio2: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -342,14 +342,14 @@ portc: gpio-controller@0 { }; }; =20 - gpio3: gpio@ffe7f38000 { + gpio@ffe7f38000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xe7f38000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO3>; =20 - portd: gpio-controller@0 { + gpio3: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -369,14 +369,14 @@ padctrl1_apsys: pinctrl@ffe7f3c000 { thead,pad-group =3D <2>; }; =20 - gpio0: gpio@ffec005000 { + gpio@ffec005000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xec005000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO0>; =20 - porta: gpio-controller@0 { + gpio0: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -389,14 +389,14 @@ porta: gpio-controller@0 { }; }; =20 - gpio1: gpio@ffec006000 { + gpio@ffec006000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xec006000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; clocks =3D <&clk CLK_GPIO1>; =20 - portb: gpio-controller@0 { + gpio1: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -544,13 +544,13 @@ timer7: timer@ffffc3303c { status =3D "disabled"; }; =20 - ao_gpio0: gpio@fffff41000 { + gpio@fffff41000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xfff41000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; =20 - porte: gpio-controller@0 { + aogpio: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; @@ -570,13 +570,13 @@ padctrl_aosys: pinctrl@fffff4a000 { clocks =3D <&aonsys_clk>; }; =20 - ao_gpio1: gpio@fffff52000 { + gpio@fffff52000 { compatible =3D "snps,dw-apb-gpio"; reg =3D <0xff 0xfff52000 0x0 0x1000>; #address-cells =3D <1>; #size-cells =3D <0>; =20 - portf: gpio-controller@0 { + gpio4: gpio-controller@0 { compatible =3D "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells =3D <2>; --=20 2.34.1