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Sat, 28 Sep 2024 05:05:01 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 48S54vH1005864; Sat, 28 Sep 2024 05:04:57 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 41xavk85mk-1; Sat, 28 Sep 2024 05:04:57 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 48S514Sx002720; Sat, 28 Sep 2024 05:04:57 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-spuppala-hyd.qualcomm.com [10.213.108.54]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 48S54uOn005859; Sat, 28 Sep 2024 05:04:57 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 4137148) id 57B1E5001B7; Sat, 28 Sep 2024 10:34:56 +0530 (+0530) From: Seshu Madhavi Puppala To: Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_rampraka@quicinc.com, quic_nitirawa@quicinc.com, quic_bhaskarv@quicinc.com, quic_neersoni@quicinc.com, quic_gaurkash@quicinc.com Subject: [PATCH] qcom: ice: Remove ice probe Date: Sat, 28 Sep 2024 10:34:56 +0530 Message-Id: <20240928050456.27577-1-quic_spuppala@quicinc.com> X-Mailer: git-send-email 2.17.1 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: mBUuJg3wLtnlJHFI2Oasj2u-9NECCCOE X-Proofpoint-ORIG-GUID: mBUuJg3wLtnlJHFI2Oasj2u-9NECCCOE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 malwarescore=0 bulkscore=0 spamscore=0 phishscore=0 suspectscore=0 priorityscore=1501 mlxlogscore=999 impostorscore=0 mlxscore=0 lowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409280033 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Under JEDEC specification ICE IP is tightly coupled with Storage. Qualcomm vendor HW implementation also ties the clock and power supply for ICE to corresponding storage clock and supplies. For a SoC supporting multiple storage types like UFS and eMMC the ICE physical address space is not shared and is always part of corresponding storage physical address space hence there is no need to independently probe ICE. Cleanup commit 2afbf43a4aec ("soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver") to remove dedicated ICE probe since there is no dedicated ICE IP block shared between UFS and SDCC as mentioned in 2afbf43a4aec. Storage probe will check for the corresponding ICE node by using of_qcom_ice_get to get ICE instance. Additional support added to of_qcom_ice_get to support ICE instance creation with new approach. Backward compatibility with old style device tree approach is untouched. Signed-off-by: Seshu Madhavi Puppala --- drivers/soc/qcom/ice.c | 44 +++++++----------------------------------- 1 file changed, 7 insertions(+), 37 deletions(-) diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c index fbab7fe5c652..47f1b668dc86 100644 --- a/drivers/soc/qcom/ice.c +++ b/drivers/soc/qcom/ice.c @@ -303,7 +303,13 @@ struct qcom_ice *of_qcom_ice_get(struct device *dev) goto out; } =20 - ice =3D platform_get_drvdata(pdev); + base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) { + dev_warn(&pdev->dev, "ICE registers not found\n"); + return PTR_ERR(base); + } + + ice =3D qcom_ice_create(&pdev->dev, base); if (!ice) { dev_err(dev, "Cannot get ice instance from %s\n", dev_name(&pdev->dev)); @@ -328,41 +334,5 @@ struct qcom_ice *of_qcom_ice_get(struct device *dev) } EXPORT_SYMBOL_GPL(of_qcom_ice_get); =20 -static int qcom_ice_probe(struct platform_device *pdev) -{ - struct qcom_ice *engine; - void __iomem *base; - - base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) { - dev_warn(&pdev->dev, "ICE registers not found\n"); - return PTR_ERR(base); - } - - engine =3D qcom_ice_create(&pdev->dev, base); - if (IS_ERR(engine)) - return PTR_ERR(engine); - - platform_set_drvdata(pdev, engine); - - return 0; -} - -static const struct of_device_id qcom_ice_of_match_table[] =3D { - { .compatible =3D "qcom,inline-crypto-engine" }, - { }, -}; -MODULE_DEVICE_TABLE(of, qcom_ice_of_match_table); - -static struct platform_driver qcom_ice_driver =3D { - .probe =3D qcom_ice_probe, - .driver =3D { - .name =3D "qcom-ice", - .of_match_table =3D qcom_ice_of_match_table, - }, -}; - -module_platform_driver(qcom_ice_driver); - MODULE_DESCRIPTION("Qualcomm Inline Crypto Engine driver"); MODULE_LICENSE("GPL"); --=20 2.17.1