From nobody Thu Nov 28 19:59:10 2024 Received: from out-173.mta1.migadu.com (out-173.mta1.migadu.com [95.215.58.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6777E1C2DB1 for ; Fri, 27 Sep 2024 20:13:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727468014; cv=none; b=TnOd63H73YscaRZlnYsDES9YEsCH6fJVnCh30+DvdwMMQnOc0gsbU7XJCbau22Y/n6CyhvW5YayUuLccDFCXx8/5SeeERzl9E9oKRE1YLW5a2t/W7GS/jOIPqYHOSQn4TaDMbYRPEm+lpY41O46/XRfDZ3X8tIGNlnMzZG68nPg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727468014; c=relaxed/simple; bh=eaYlc4OHUIisBto2qbGbRBiSqBUNHOD90bMGJzAh8QY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uymD43KqDQSYhrQzJZ9ZxdaH3jukEJN2ziXMnQQ1nbWdWGTRq89scuLCdNhwE2jbqrA++EblCrs3HGSlOnzr6cqDJIJG9Hi+kU6izaXuRBblvUEU9J3LB4W/Nl/J0Bk9EA1RArjPeH/SHSzNrgds3eGnIYmNfMSoSKzTEXOKCAw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Mgid25Bv; arc=none smtp.client-ip=95.215.58.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Mgid25Bv" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1727468009; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EtNjTwBLUZhf4+CdFGDYc6vbt+NFBvdBfVqHF0SsxBU=; b=Mgid25BvSpZbPoFHxy/+OLdlSdd6zKRB/5cbVYo9NsA4wyfSZ64NPsynF60yhg0tkWdNT5 TqdHILreLJh6UIo6NSv86BIciJ3yO8S5OASJ+f34e4Nd/nyD82mUxJu+HVPrX3bi+JRuA+ IZFrvnReIDGhgQXdRoM/U/u6D/5xZO8= From: Sean Anderson To: Arnd Bergmann , Olof Johansson , linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , Rob Herring , devicetree@vger.kernel.org, Magnus Damm , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Conor Dooley , Adam Ford , Sean Anderson Subject: [PATCH 1/3] arm64: dts: renesas: salvator-x: Add SD/OE pin properties Date: Fri, 27 Sep 2024 16:13:11 -0400 Message-Id: <20240927201313.624762-2-sean.anderson@linux.dev> In-Reply-To: <20240927201313.624762-1-sean.anderson@linux.dev> References: <20240927201313.624762-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add SD/OE pin properties to the devicetree so that Linux can configure the pin without relying on the OTP. This matches the register configuration reported by Geert [1] as well as his analysis of the schematic. [1] https://lore.kernel.org/linux-arm-kernel/CAMuHMdUmf=3DBYrVWGDp4kjLGK=3D= 66HSMJbHuMvne-xGLkTYnGv2g@mail.gmail.com/ Signed-off-by: Sean Anderson Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/salvator-x.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/salvator-x.dtsi b/arch/arm64/boot/= dts/renesas/salvator-x.dtsi index ddee50e64632..5920932cbc2f 100644 --- a/arch/arm64/boot/dts/renesas/salvator-x.dtsi +++ b/arch/arm64/boot/dts/renesas/salvator-x.dtsi @@ -25,5 +25,7 @@ versaclock5: clock-generator@6a { #clock-cells =3D <1>; clocks =3D <&x23_clk>; clock-names =3D "xin"; + idt,shutdown =3D <0>; + idt,output-enable-active =3D <1>; }; }; --=20 2.35.1.1320.gc452695387.dirty From nobody Thu Nov 28 19:59:10 2024 Received: from out-181.mta1.migadu.com (out-181.mta1.migadu.com [95.215.58.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 571651C2DCC; Fri, 27 Sep 2024 20:13:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727468015; cv=none; b=CuosqRw4z0gP3XlLnBVtXaaslD5Q0I55DCswApMt970cm/8QWJ+P1kMMutpFRwqIDTFTcN6NndnwgT6dcddOcMEuLpzF3RMxu4ModVw9tXbDEfEo1F/PTGTB8a6wGNFhsGaUO0cz/E2IMO0WoWG/9cwIY/5sAqAGqx5qo1EQ8Ek= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727468015; c=relaxed/simple; bh=OYlpggxcIKhEZG6OUwarmtV6b8eMoZMubnmGsW0X1F0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EoOAkn+tEcyLRKNsrFToFpApreL5Jd72RINWqHZ8UDe9CHAa1x+bJ/XA7FDpvBWFtn4cIx2dcT44JF0nzwilC7Gobu+woZMql64fm5drqCp+5gx2oYGryNc4fzRlb8jmEBts96lH0TLIx6ZsJFWFIfW3CSPyu43gH8+CY/NK2UA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=TAaacyuA; arc=none smtp.client-ip=95.215.58.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="TAaacyuA" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1727468012; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O2En2LUWhEsQHsqEJNOotoHkKE7KQmkeHw7ybLj3Q3A=; b=TAaacyuAZ2phbSPNJBSf2hQIc73wP9BJuK/+QPeAuC9Y0+1Eb36NCx/XCa2/OHHEyHd2xB VFMHpzd33Qn0aAGBWM5e/yDzIevb6MbwM1QEOR0eYC9EfMLULQVY5ALVC99Ko3PZYKHE9b 2iT21C3wxeBVfh9jF2I+bMLcBHR3IjY= From: Sean Anderson To: Arnd Bergmann , Olof Johansson , linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , Rob Herring , devicetree@vger.kernel.org, Magnus Damm , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Conor Dooley , Adam Ford , Sean Anderson Subject: [PATCH 2/3] arm64: dts: renesas: hihope: Add SD/OE pin properties Date: Fri, 27 Sep 2024 16:13:12 -0400 Message-Id: <20240927201313.624762-3-sean.anderson@linux.dev> In-Reply-To: <20240927201313.624762-1-sean.anderson@linux.dev> References: <20240927201313.624762-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add SD/OE pin properties to the devicetree so that Linux can configure the pin without relying on the OTP. This is based on Geert's analysis of the schematic [1]. [1] https://lore.kernel.org/linux-arm-kernel/CAMuHMdUmf=3DBYrVWGDp4kjLGK=3D= 66HSMJbHuMvne-xGLkTYnGv2g@mail.gmail.com/ Signed-off-by: Sean Anderson Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/hihope-common.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/bo= ot/dts/renesas/hihope-common.dtsi index 83104af2813e..6abe094fc253 100644 --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi @@ -198,6 +198,8 @@ versaclock5: clock-generator@6a { #clock-cells =3D <1>; clocks =3D <&x304_clk>; clock-names =3D "xin"; + idt,shutdown =3D <0>; + idt,output-enable-active =3D <1>; }; }; =20 --=20 2.35.1.1320.gc452695387.dirty From nobody Thu Nov 28 19:59:10 2024 Received: from out-185.mta1.migadu.com (out-185.mta1.migadu.com [95.215.58.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0397A1C32FA for ; Fri, 27 Sep 2024 20:13:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.185 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727468018; cv=none; b=cWr+O64ZA9GmwEQaSr4BZU62QJ09PaKO0A1UGpkr6ZNMtmV43g7yKf14+eZStZaEVmaWQT3A63COStm8G2wrdv7ZYnuo95hhK47Sy9Uobo+0e3QUruLwZ3WeALBVIgfixKZhASGT2jPhgj0Ss//FvjzU0u1FI8x292enrRdhhY4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727468018; c=relaxed/simple; bh=neR70FWeqdxs0yYwmEFhXqtSf0MZQGryaX6gVOWU4kk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=HY3gqS+x1Hp5PRWhIvAQK16WP+JXAHKHuAs4qs2+bbVf3jAdU+1Wjl8RaW8RHArOZ2EnENafSr/EGFw/2BCJqWbv7nGsbit1y2HfOjUkUjCIDq+e/t/l1dVZDT7+GI0zRSufTnUpYwsxytlLwxJ52YBx26to56AORAVovA7ndZ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=rcxxiKrg; arc=none smtp.client-ip=95.215.58.185 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="rcxxiKrg" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1727468015; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9/xNhc8+PZj0WTaGQ0MRXNuLuruFyK61DR8gHEBRuys=; b=rcxxiKrgGAE5h+oeQSAHFT7DjCxxTCQWZt3lrCGpZJftAAAtk3SKtsw1o1lwyCK6oCUHjb oW/77VnRtIwOkTBTjE2KEU1ABBCJg3LOf1oGljmSq5ftyK1F6y3SViQEKoxq/11YPLdNvG StEUj03XkItYIAbEmq9JNcC6QkokF7w= From: Sean Anderson To: Arnd Bergmann , Olof Johansson , linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , Rob Herring , devicetree@vger.kernel.org, Magnus Damm , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Conor Dooley , Adam Ford , Sean Anderson Subject: [PATCH 3/3] arm64: dts: renesas: beacon: Add SD/OE pin properties Date: Fri, 27 Sep 2024 16:13:13 -0400 Message-Id: <20240927201313.624762-4-sean.anderson@linux.dev> In-Reply-To: <20240927201313.624762-1-sean.anderson@linux.dev> References: <20240927201313.624762-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add SD/OE pin properties to the devicetree so that Linux can configure the pin without relying on the OTP. This matches the register configuration reported by Adam [1] as well as his analysis of the schematic. [1] https://lore.kernel.org/linux-arm-kernel/CAHCN7x+tcvih1-kmUs8tVLCAk0Gnj= 11t0yEZLPWk3UBNyad7Jg@mail.gmail.com/ Signed-off-by: Sean Anderson Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 2 ++ arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/ar= ch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 5a14f116f7a1..a258ba0d6b4f 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -364,6 +364,8 @@ versaclock6_bb: clock-controller@6a { #clock-cells =3D <1>; clocks =3D <&x304_clk>; clock-names =3D "xin"; + idt,shutdown =3D <0>; + idt,output-enable-active =3D <0>; =20 assigned-clocks =3D <&versaclock6_bb 1>, <&versaclock6_bb 2>, <&versaclock6_bb 3>, <&versaclock6_bb 4>; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm= 64/boot/dts/renesas/beacon-renesom-som.dtsi index 68b04e56ae56..06ad9db420d6 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -166,6 +166,8 @@ versaclock5: versaclock_som@6a { #clock-cells =3D <1>; clocks =3D <&x304_clk>; clock-names =3D "xin"; + idt,shutdown =3D <0>; + idt,output-enable-active =3D <0>; /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */ assigned-clocks =3D <&versaclock5 1>, <&versaclock5 2>, --=20 2.35.1.1320.gc452695387.dirty