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charset="utf-8" Adds qcom,shared-se flag usage. Use this when particular I2C serial controller needs to be shared between two subsystems. SE =3D Serial Engine, meant for I2C controller here. TRE =3D Transfer Ring Element, refers to Queued Descriptor. SS =3D Subsystems (APPS processor, Modem, TZ, ADSP etc). Example : Two clients from different SS can share an I2C SE for same slave device OR their owned slave devices. Assume I2C Slave EEPROM device connected with I2C controller. Each client from ADSP SS and APPS Linux SS can perform i2c transactions. This gets serialized by lock TRE + DMA Transfers + Unlock TRE at HW level. Signed-off-by: Mukesh Kumar Savaliya --- Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml = b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml index 9f66a3bb1f80..3b9b20a0edff 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -60,6 +60,10 @@ properties: power-domains: maxItems: 1 =20 + qcom,shared-se: + description: True if I2C needs to be shared between two or more subsys= tems(SS). + type: boolean + reg: maxItems: 1 =20 --=20 2.25.1 From nobody Thu Nov 28 22:54:18 2024 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F1C817A590; Fri, 27 Sep 2024 06:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" GSI DMA provides specific TREs namely Lock and Unlock TRE, which provides mutual exclusive access to SE from any of the subsystem (E.g. Apps, TZ, ADSP etc). Lock prevents other subsystems from concurrently performing DMA transfers and avoids disturbance to data path. Basically for shared SE usecase, lock the SE for particular subsystem, complete the transfer, unlock the SE. Apply Lock TRE for the first transfer of shared SE and Apply Unlock TRE for the last transfer. Also change MAX_TRE macro to 5 from 3 because of the two additional TREs. TRE =3D Transfer Ring Element, refers to the queued descriptor. SE =3D Serial Engine SS =3D Subsystems (Apps processor, TZ, ADSP, Modem) Signed-off-by: Mukesh Kumar Savaliya --- drivers/dma/qcom/gpi.c | 37 +++++++++++++++++++++++++++++++- include/linux/dma/qcom-gpi-dma.h | 6 ++++++ 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index 52a7c8f2498f..120d91234442 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2020, Linaro Limited + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ =20 #include @@ -65,6 +66,14 @@ /* DMA TRE */ #define TRE_DMA_LEN GENMASK(23, 0) =20 +/* Lock TRE */ +#define TRE_I2C_LOCK BIT(0) +#define TRE_MINOR_TYPE GENMASK(19, 16) +#define TRE_MAJOR_TYPE GENMASK(23, 20) + +/* Unlock TRE */ +#define TRE_I2C_UNLOCK BIT(8) + /* Register offsets from gpi-top */ #define GPII_n_CH_k_CNTXT_0_OFFS(n, k) (0x20000 + (0x4000 * (n)) + (0x80 *= (k))) #define GPII_n_CH_k_CNTXT_0_EL_SIZE GENMASK(31, 24) @@ -516,7 +525,7 @@ struct gpii { bool ieob_set; }; =20 -#define MAX_TRE 3 +#define MAX_TRE 5 =20 struct gpi_desc { struct virt_dma_desc vd; @@ -1637,6 +1646,19 @@ static int gpi_create_i2c_tre(struct gchan *chan, st= ruct gpi_desc *desc, struct gpi_tre *tre; unsigned int i; =20 + /* create lock tre for first tranfser */ + if (i2c->shared_se && i2c->first_msg) { + tre =3D &desc->tre[tre_idx]; + tre_idx++; + + tre->dword[0] =3D 0; + tre->dword[1] =3D 0; + tre->dword[2] =3D 0; + tre->dword[3] =3D u32_encode_bits(1, TRE_I2C_LOCK); + tre->dword[3] |=3D u32_encode_bits(0, TRE_MINOR_TYPE); + tre->dword[3] |=3D u32_encode_bits(3, TRE_MAJOR_TYPE); + } + /* first create config tre if applicable */ if (i2c->set_config) { tre =3D &desc->tre[tre_idx]; @@ -1695,6 +1717,19 @@ static int gpi_create_i2c_tre(struct gchan *chan, st= ruct gpi_desc *desc, tre->dword[3] |=3D u32_encode_bits(1, TRE_FLAGS_IEOT); } =20 + /* Unlock tre for last transfer */ + if (i2c->shared_se && i2c->last_msg && i2c->op !=3D I2C_READ) { + tre =3D &desc->tre[tre_idx]; + tre_idx++; + + tre->dword[0] =3D 0; + tre->dword[1] =3D 0; + tre->dword[2] =3D 0; + tre->dword[3] =3D u32_encode_bits(1, TRE_I2C_UNLOCK); + tre->dword[3] |=3D u32_encode_bits(1, TRE_MINOR_TYPE); + tre->dword[3] |=3D u32_encode_bits(3, TRE_MAJOR_TYPE); + } + for (i =3D 0; i < tre_idx; i++) dev_dbg(dev, "TRE:%d %x:%x:%x:%x\n", i, desc->tre[i].dword[0], desc->tre[i].dword[1], desc->tre[i].dword[2], desc->tre[i].dword[3]); diff --git a/include/linux/dma/qcom-gpi-dma.h b/include/linux/dma/qcom-gpi-= dma.h index 6680dd1a43c6..8589c711afae 100644 --- a/include/linux/dma/qcom-gpi-dma.h +++ b/include/linux/dma/qcom-gpi-dma.h @@ -65,6 +65,9 @@ enum i2c_op { * @rx_len: receive length for buffer * @op: i2c cmd * @muli-msg: is part of multi i2c r-w msgs + * @shared_se: bus is shared between subsystems + * @bool first_msg: use it for tracking multimessage xfer + * @bool last_msg: use it for tracking multimessage xfer */ struct gpi_i2c_config { u8 set_config; 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charset="utf-8" Currently the driver provides a function called geni_serial_resources_off() to turn off resources like clocks and pinctrl. For shared SE between two SS, we don't need to keep pinctrl to sleep state as other SS may be actively transferring data over SE. Hence,bypass keeping pinctrl to sleep state conditionally using shared_geni_se flag. Signed-off-by: Mukesh Kumar Savaliya --- drivers/soc/qcom/qcom-geni-se.c | 14 ++++++++++---- include/linux/soc/qcom/geni-se.h | 3 +++ 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-s= e.c index 2e8f24d5da80..89cf18699336 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +// Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. =20 /* Disable MMIO tracing to prevent excessive logging of unwanted MMIO trac= es */ #define __DISABLE_TRACE_MMIO__ @@ -503,10 +504,15 @@ int geni_se_resources_off(struct geni_se *se) =20 if (has_acpi_companion(se->dev)) return 0; - - ret =3D pinctrl_pm_select_sleep_state(se->dev); - if (ret) - return ret; + /* Keep pinctrl to sleep state only for regular usecase. + * Do not sleep pinctrl for shared SE because other SS(subsystems) + * may continueto perform transfer. + */ + if (se->shared_geni_se =3D=3D false) { + ret =3D pinctrl_pm_select_sleep_state(se->dev); + if (ret) + return ret; + } =20 geni_se_clks_off(se); return 0; diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni= -se.h index c3bca9c0bf2c..359041c64ad8 100644 --- a/include/linux/soc/qcom/geni-se.h +++ b/include/linux/soc/qcom/geni-se.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2017-2018, The Linux Foundation. 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charset="utf-8" Add support to share I2C SE by two Subsystems in a mutually exclusive way. Use "qcom,shared-se" flag in a particular i2c instance node if the usecase requires i2c controller to be shared. Sharing of SE(Serial engine) is possible only for GSI mode as each subsystem(SS) can queue transfers over its own GPII Channel. For non GSI mode, we should force disable this feature even if set by user from DT by mistake. I2C driver just need to mark first_msg and last_msg flag to help indicate GPI driver to take lock and unlock TRE there by protecting from concurrent access from other EE or Subsystem. gpi_create_i2c_tre() function at gpi.c will take care of adding Lock and Unlock TRE for the respective transfer operations. Since the GPIOs are also shared between two SS, do not unconfigure them during runtime suspend. This will allow other SS to continue to transfer the data without any disturbance over the IO lines. Signed-off-by: Mukesh Kumar Savaliya --- drivers/i2c/busses/i2c-qcom-geni.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 212336f724a6..479fa8e1c33f 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +// Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. =20 #include #include @@ -602,6 +603,7 @@ static int geni_i2c_gpi_xfer(struct geni_i2c_dev *gi2c,= struct i2c_msg msgs[], i peripheral.clk_div =3D itr->clk_div; peripheral.set_config =3D 1; peripheral.multi_msg =3D false; + peripheral.shared_se =3D gi2c->se.shared_geni_se; =20 for (i =3D 0; i < num; i++) { gi2c->cur =3D &msgs[i]; @@ -612,6 +614,8 @@ static int geni_i2c_gpi_xfer(struct geni_i2c_dev *gi2c,= struct i2c_msg msgs[], i if (i < num - 1) peripheral.stretch =3D 1; =20 + peripheral.first_msg =3D (i =3D=3D 0); + peripheral.last_msg =3D (i =3D=3D num - 1); peripheral.addr =3D msgs[i].addr; =20 ret =3D geni_i2c_gpi(gi2c, &msgs[i], &config, @@ -631,8 +635,11 @@ static int geni_i2c_gpi_xfer(struct geni_i2c_dev *gi2c= , struct i2c_msg msgs[], i dma_async_issue_pending(gi2c->tx_c); =20 time_left =3D wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT); - if (!time_left) + if (!time_left) { + dev_dbg(gi2c->se.dev, "I2C timeout gpi flags:%d addr:0x%x\n", + gi2c->cur->flags, gi2c->cur->addr); gi2c->err =3D -ETIMEDOUT; + } =20 if (gi2c->err) { ret =3D gi2c->err; @@ -800,6 +807,11 @@ static int geni_i2c_probe(struct platform_device *pdev) gi2c->clk_freq_out =3D KHZ(100); } =20 + if (of_property_read_bool(pdev->dev.of_node, "qcom,shared-se")) { + gi2c->se.shared_geni_se =3D true; + dev_dbg(&pdev->dev, "I2C is shared between subsystems\n"); + } + if (has_acpi_companion(dev)) ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(dev)); =20 @@ -870,8 +882,10 @@ static int geni_i2c_probe(struct platform_device *pdev) else fifo_disable =3D readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIF= O_IF_DISABLE; =20 - if (fifo_disable) { - /* FIFO is disabled, so we can only use GPI DMA */ + if (fifo_disable || gi2c->se.shared_geni_se) { + /* FIFO is disabled, so we can only use GPI DMA. + * SE can be shared in GSI mode between subsystems, each SS owns a GPII. + **/ gi2c->gpi_mode =3D true; ret =3D setup_gpi_dma(gi2c); if (ret) { @@ -883,6 +897,9 @@ static int geni_i2c_probe(struct platform_device *pdev) dev_dbg(dev, "Using GPI DMA mode for I2C\n"); } else { gi2c->gpi_mode =3D false; + + /* Force disable shared SE case for non GSI mode */ + gi2c->se.shared_geni_se =3D false; tx_depth =3D geni_se_get_tx_fifo_depth(&gi2c->se); =20 /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */ @@ -964,7 +981,6 @@ static int __maybe_unused geni_i2c_runtime_suspend(stru= ct device *dev) if (ret) { enable_irq(gi2c->irq); return ret; - } else { gi2c->suspended =3D 1; } --=20 2.25.1