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charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240926145336epcas5p123c980bfd70e9ec84509fd041b339707 References: <20240926145132.1763-1-v.pavani@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Fix checkpatch giving warnings on driver files related to comment style. WARNING: Block comments should align the * on each line which is Signed-off-by: Varada Pavani --- drivers/clk/samsung/clk-exynos-audss.c | 2 +- drivers/clk/samsung/clk-exynos4.c | 2 +- drivers/clk/samsung/clk-exynos4412-isp.c | 2 +- drivers/clk/samsung/clk-exynos5250.c | 2 +- drivers/clk/samsung/clk-exynos5410.c | 2 +- drivers/clk/samsung/clk-exynos5420.c | 2 +- drivers/clk/samsung/clk-exynos7.c | 2 +- drivers/clk/samsung/clk-s3c64xx.c | 2 +- drivers/clk/samsung/clk-s5pv210-audss.c | 2 +- drivers/clk/samsung/clk.c | 2 +- 10 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/c= lk-exynos-audss.c index e44b172d7255..166ee7728307 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -4,7 +4,7 @@ * Author: Padmavathi Venna * * Common Clock Framework support for Audio Subsystem Clock Controller. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-ex= ynos4.c index 31cb85330549..ca5036ba45b9 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -5,7 +5,7 @@ * Author: Thomas Abraham * * Common Clock Framework support for all Exynos4 SoCs. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-exynos4412-isp.c b/drivers/clk/samsung= /clk-exynos4412-isp.c index a70c2b06a61a..29c5644f0593 100644 --- a/drivers/clk/samsung/clk-exynos4412-isp.c +++ b/drivers/clk/samsung/clk-exynos4412-isp.c @@ -4,7 +4,7 @@ * Author: Marek Szyprowski * * Common Clock Framework support for Exynos4412 ISP module. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk= -exynos5250.c index e02e7c013f3d..47e9ac2275ee 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -5,7 +5,7 @@ * Author: Thomas Abraham * * Common Clock Framework support for Exynos5250 SoC. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk= -exynos5410.c index 2654077211e7..99b1bb4539fd 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -4,7 +4,7 @@ * Author: Tarek Dakhran * * Common Clock Framework support for Exynos5410 SoC. -*/ + */ =20 #include =20 diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk= -exynos5420.c index c630135c686b..a4864ea0d0d2 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -5,7 +5,7 @@ * Chander Kashyap * * Common Clock Framework support for Exynos5420 SoC. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-ex= ynos7.c index 4a5d2a914bd6..e6c938effa29 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2014 Samsung Electronics Co., Ltd. * Author: Naveen Krishna Ch -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3= c64xx.c index d27a1f73f077..e2ec8fe32e39 100644 --- a/drivers/clk/samsung/clk-s3c64xx.c +++ b/drivers/clk/samsung/clk-s3c64xx.c @@ -3,7 +3,7 @@ * Copyright (c) 2013 Tomasz Figa * * Common Clock Framework support for all S3C64xx SoCs. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/= clk-s5pv210-audss.c index b31c00ea331f..d19a3d9fd452 100644 --- a/drivers/clk/samsung/clk-s5pv210-audss.c +++ b/drivers/clk/samsung/clk-s5pv210-audss.c @@ -8,7 +8,7 @@ * Author: Padmavathi Venna * * Driver for Audio Subsystem Clock Controller of S5PV210-compatible SoCs. -*/ + */ =20 #include #include diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index afa5760ed3a1..283c523763e6 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -6,7 +6,7 @@ * * This file includes utility functions to register clocks to common * clock framework for Samsung platforms. -*/ + */ =20 #include #include --=20 2.17.1 From nobody Thu Nov 28 22:51:41 2024 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4EA31459F6 for ; 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Thu, 26 Sep 2024 23:53:43 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240926145341epsmtip1865da3ecb351ec43e4815776a1b1e1ec~40vhZstqk2105721057epsmtip1g; Thu, 26 Sep 2024 14:53:41 +0000 (GMT) From: Varada Pavani To: krzk@kernel.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, alim.akhtar@samsung.com, mturquette@baylibre.com, sboyd@kernel.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: aswani.reddy@samsung.com, pankaj.dubey@samsung.com, gost.dev@samsung.com, Varada Pavani Subject: [PATCH 2/2] clk: samsung: Fix errors reported by checkpatch Date: Thu, 26 Sep 2024 20:21:32 +0530 Message-Id: <20240926145132.1763-3-v.pavani@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240926145132.1763-1-v.pavani@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpik+LIzCtJLcpLzFFi42LZdlhTXfdC3dc0g7arehYP5m1jszi0eSu7 xfUvz1ktbh7YyWRx/vwGdotNj6+xWnzsucdqcXnXHDaLGef3MVlcPOVqsWjrF3aLw2/aWS3+ XdvIYrGh9xW7A5/H+xut7B6bVnWyeWxeUu/Rt2UVo8fnTXIBrFHZNhmpiSmpRQqpecn5KZl5 6bZK3sHxzvGmZgaGuoaWFuZKCnmJuam2Si4+AbpumTlAdyoplCXmlAKFAhKLi5X07WyK8ktL UhUy8otLbJVSC1JyCkwK9IoTc4tL89L18lJLrAwNDIxMgQoTsjOaz21kKpgrUbFg5wW2BsYZ ol2MnBwSAiYSEz7NYO9i5OIQEtjNKLHn6BEo5xOjxI23z5khnG+MEr9fnGGDadl6+DZU1V5G iQOne6CqWpkkls/azQpSxSagJbF66nJWkISIQB+TxN0TE5hAEswCJRL/P70GKxIWcJHYv+Mh O4jNIqAq8XHKU7AaXgELiakz3jBBrJOXWL3hADOIzSlgKfFxz2EWkKESAo0cEue/bmWHKHKR OL/tIQuELSzx6vgWqLiUxMv+NiCbA8hOlmj/xA0RzpG4tHsV1Hx7iQNX5rCAlDALaEqs36UP EZaVmHpqHdTJfBK9v59AlfNK7JgHYytJ7NwxAcqWkHi6eg00hDwkjk68BQ2UHkaJz6umMU9g lJuFsGIBI+MqRsnUguLc9NRi0wLDvNRyeLQl5+duYgQnRi3PHYx3H3zQO8TIxMF4iFGCg1lJ hHfSzY9pQrwpiZVVqUX58UWlOanFhxhNgeE3kVlKNDkfmJrzSuINTSwNTMzMzEwsjc0MlcR5 X7fOTRESSE8sSc1OTS1ILYLpY+LglGpgUjzzgGXpP3OdX05FuWe+8Ku0fHD8OiX/l82n7pDK k0nai2fI7d7S/nrC1htKO/Q9y/t2tX2f2K9XnhlWcWM2X9t249VLewrkn6+3WP+x5j7XKbXM 1WdCjvPc9Vtrddxvn/aOJ5Nz6z49WlNX2Hy4Y2P0oqvrD/Q+Nfu/KHAdZ+yPs/nfvCMEjny7 ZeP8tfbSt99/WNMEuH6mlF6Z9znwZmv/2fim0xHzPn6TTBbs7lllrFPy4xjz/uKwrNal6q+Y DsRkBXXenymYxFd/rcPpX9Q/z9jle6xiz22xEOHTuiRzWJMlLTFd3GmZ/LIHwj9mCm++9knv 6EyZhr4JD3Tq5c/tlPuy9fTRnAcb3h08fV+JpTgj0VCLuag4EQAz7pS8FQQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOLMWRmVeSWpSXmKPExsWy7bCSnG556dc0g+vPOC0ezNvGZnFo81Z2 i+tfnrNa3Dywk8ni/PkN7BabHl9jtfjYc4/V4vKuOWwWM87vY7K4eMrVYtHWL+wWh9+0s1r8 u7aRxWJD7yt2Bz6P9zda2T02repk89i8pN6jb8sqRo/Pm+QCWKO4bFJSczLLUov07RK4MprP bWQqmCtRsWDnBbYGxhmiXYycHBICJhJbD99m72Lk4hAS2M0oceX3NlaIhITEzm+tzBC2sMTK f8+hipqZJBbd2MIIkmAT0JJYPXU5K0hCRGAWk8TcJR9Yuhg5OJgFKiTm/DcGqREWcJHYv+Mh O4jNIqAq8XHKUyYQm1fAQmLqjDdMEAvkJVZvOAC2jFPAUuLjnsNgY4SAaq7MZJ/AyLeAkWEV o2RqQXFuem6xYYFRXmq5XnFibnFpXrpecn7uJkZw2Gpp7WDcs+qD3iFGJg7GQ4wSHMxKIryT bn5ME+JNSaysSi3Kjy8qzUktPsQozcGiJM777XVvipBAemJJanZqakFqEUyWiYNTqoHpiOTv j7bGx5M5N3iqOPBOzbmafXeH/Kqk+oo5kTqSC+VubPU5ZXXGNSHm/9zzD94dvZDUcvzpxz0H q87fVJ3C+n/Z61XJpofecXxrqtt+pSvk0gSZhw2id90kCma9PBav/2cb87TXpQ8dHrB8S7sT 3X0rhMvm05zPxSLMwVkhBbE/FkxLc2irnnpV4eJ6LcMXm96vuLh/9VN1JtPZ8awR8YIXr9ya KHjgvcQ1ppwy5w1Bmo0VG67FaLysXfeh6OOmOXM7PjyUehv+Pbkv68jie5v6Yu7lNTG6TIhd IqJ2IPuuVKUuZ77Z684vrZ2fJmzpDn0/L89TOfyX5fauV1v8U+ZPPO1u1PnxzfR029+T/iqx FGckGmoxFxUnAgDG0QlDygIAAA== X-CMS-MailID: 20240926145343epcas5p2bef73ed8d3e36e95c05bd8d96a2e5de8 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240926145343epcas5p2bef73ed8d3e36e95c05bd8d96a2e5de8 References: <20240926145132.1763-1-v.pavani@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Fix checkpatch errors from clock drivers. ERROR: space prohibited before that ',' ERROR: space required after that ',' Signed-off-by: Varada Pavani --- drivers/clk/samsung/clk-exynos3250.c | 2 +- drivers/clk/samsung/clk-exynos5260.c | 4 ++-- drivers/clk/samsung/clk-exynos5420.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk= -exynos3250.c index cd4fec323a42..aec4d18c1f9e 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -260,7 +260,7 @@ static const struct samsung_mux_clock mux_clks[] __init= const =3D { =20 /* SRC_TOP0 */ MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1), - MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p,SRC_TOP0, 24= , 1), + MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p, SRC_TOP0, 2= 4, 1), MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 2= 0, 1), MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 1= 6, 1), MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, = 14, 1), diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk= -exynos5260.c index 16da6ef5ca0c..fd0520d204dc 100644 --- a/drivers/clk/samsung/clk-exynos5260.c +++ b/drivers/clk/samsung/clk-exynos5260.c @@ -1458,7 +1458,7 @@ static const struct samsung_fixed_rate_clock fixed_ra= te_clks[] __initconst =3D { FRATE(PHYCLK_HDMI_LINK_O_TMDS_CLKHI, "phyclk_hdmi_link_o_tmds_clkhi", NULL, 0, 125000000), FRATE(PHYCLK_MIPI_DPHY_4L_M_TXBYTECLKHS, - "phyclk_mipi_dphy_4l_m_txbyte_clkhs" , NULL, + "phyclk_mipi_dphy_4l_m_txbyte_clkhs", NULL, 0, 187500000), FRATE(PHYCLK_DPTX_PHY_O_REF_CLK_24M, "phyclk_dptx_phy_o_ref_clk_24m", NULL, 0, 24000000), @@ -1629,7 +1629,7 @@ static const struct samsung_mux_clock top_mux_clks[] = __initconst =3D { mout_isp1_media_400_p, MUX_SEL_TOP_ISP10, 4, 1), MUX(TOP_MOUT_ACLK_ISP1_400, "mout_aclk_isp1_400", mout_aclk_isp1_400_p, - MUX_SEL_TOP_ISP10, 8 , 1), + MUX_SEL_TOP_ISP10, 8, 1), MUX(TOP_MOUT_ISP1_MEDIA_266, "mout_isp1_media_266", mout_isp1_media_266_p, MUX_SEL_TOP_ISP10, 16, 1), diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk= -exynos5420.c index a4864ea0d0d2..333c52fda17f 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -295,8 +295,8 @@ static const struct samsung_clk_reg_dump exynos5420_set= _clksrc[] =3D { /* list of all parent clocks */ PNAME(mout_mspll_cpu_p) =3D {"mout_sclk_cpll", "mout_sclk_dpll", "mout_sclk_mpll", "mout_sclk_spll"}; -PNAME(mout_cpu_p) =3D {"mout_apll" , "mout_mspll_cpu"}; -PNAME(mout_kfc_p) =3D {"mout_kpll" , "mout_mspll_kfc"}; +PNAME(mout_cpu_p) =3D {"mout_apll", "mout_mspll_cpu"}; +PNAME(mout_kfc_p) =3D {"mout_kpll", "mout_mspll_kfc"}; PNAME(mout_apll_p) =3D {"fin_pll", "fout_apll"}; PNAME(mout_bpll_p) =3D {"fin_pll", "fout_bpll"}; PNAME(mout_cpll_p) =3D {"fin_pll", "fout_cpll"}; --=20 2.17.1