From nobody Fri Nov 29 00:48:32 2024 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DFF7170A3A for ; Thu, 26 Sep 2024 03:23:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727320999; cv=none; b=hp/gkStj8KEG7J3Xp/mSBPQgXuazG0l0FE86Gn8AdgbhM1eNwC1/6nwpUvCvQzyqbIY5rXot4xnzXBsFr+8JTqnVhCusQGIg+7pqHVfWpbO3zFXMaduL/4W//MJzp6os93aaqGTFjvnXJ6TO//JMIH43dUC5UfurN66T6eTe5Zs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727320999; c=relaxed/simple; bh=hoBmpJX/k+/y8Mvi9dseWa6KwUJolOVVIYw5Z72BIaY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IiAvFaT2DuXWSm/6Y6JWzmOjxl0D5G4h6DUd1siZtgbSSafQkqTFTYo5a8m94qZ+FvcobocKf0wk81H5PIjBxZpRq9XKdDBoF2Ue8TwKRma9ZqRoe20sBWNXPQxGtxBdynctNM7vdLwpe7Kn+sA+4/JjcSv65KtwSQpwUS22pAc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=ABrLzieY; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ABrLzieY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1727320996; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=J7+hyoxMPs/6YsZ4hAk6EhlN0QJa+uQdbWMbmUd1Kbw=; b=ABrLzieY5to9BV0x9T3VEJ1Q/cTf3J1ED9MfWGNhQzB/AukXzdC8OONmM8cBpuB8rE2ebW bS8zB/4zfxjckox5ToanEqbipLZY4T5Bjl4OhrnYfD+vh9KzLEz9k+em554GFnKVOZAWzK 0zql47F+vdaRWu+uTjaBuSiWE27kFfg= Received: from mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-27-xppY4uQsN_OCBX0c_obmhw-1; Wed, 25 Sep 2024 23:23:13 -0400 X-MC-Unique: xppY4uQsN_OCBX0c_obmhw-1 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (unknown [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 717E819772DE; Thu, 26 Sep 2024 03:23:11 +0000 (UTC) Received: from virt-mtcollins-01.lab.eng.rdu2.redhat.com (unknown [10.8.1.196]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1CA1D19560A3; Thu, 26 Sep 2024 03:23:09 +0000 (UTC) From: Shaoqin Huang To: Oliver Upton , Marc Zyngier , kvmarm@lists.linux.dev Cc: Eric Auger , Sebastian Ott , Cornelia Huck , Shaoqin Huang , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Fuad Tabba , Mark Brown , Joey Gouly , Kristina Martsenko , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 1/2] KVM: arm64: Use kvm_has_feat() to check if FEAT_RAS is advertised to the guest Date: Wed, 25 Sep 2024 23:22:39 -0400 Message-Id: <20240926032244.3666579-2-shahuang@redhat.com> In-Reply-To: <20240926032244.3666579-1-shahuang@redhat.com> References: <20240926032244.3666579-1-shahuang@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Content-Type: text/plain; charset="utf-8" Use kvm_has_feat() to check if FEAT_RAS is advertised to the guest, this is useful when FEAT_RAS is writable. Signed-off-by: Shaoqin Huang --- arch/arm64/kvm/guest.c | 4 ++-- arch/arm64/kvm/handle_exit.c | 2 +- arch/arm64/kvm/hyp/include/hyp/switch.h | 2 +- arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 7 +++++-- arch/arm64/kvm/sys_regs.c | 2 +- 5 files changed, 10 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 11098eb7eb44..938e3cd05d1e 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -819,7 +819,7 @@ int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, struct kvm_vcpu_events *events) { events->exception.serror_pending =3D !!(vcpu->arch.hcr_el2 & HCR_VSE); - events->exception.serror_has_esr =3D cpus_have_final_cap(ARM64_HAS_RAS_EX= TN); + events->exception.serror_has_esr =3D kvm_has_feat(vcpu->kvm, ID_AA64PFR0_= EL1, RAS, IMP); =20 if (events->exception.serror_pending && events->exception.serror_has_esr) events->exception.serror_esr =3D vcpu_get_vsesr(vcpu); @@ -841,7 +841,7 @@ int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, bool ext_dabt_pending =3D events->exception.ext_dabt_pending; =20 if (serror_pending && has_esr) { - if (!cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) + if (!kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, RAS, IMP)) return -EINVAL; =20 if (!((events->exception.serror_esr) & ~ESR_ELx_ISS_MASK)) diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c index d7c2990e7c9e..99f256629ead 100644 --- a/arch/arm64/kvm/handle_exit.c +++ b/arch/arm64/kvm/handle_exit.c @@ -405,7 +405,7 @@ int handle_exit(struct kvm_vcpu *vcpu, int exception_in= dex) void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index) { if (ARM_SERROR_PENDING(exception_index)) { - if (this_cpu_has_cap(ARM64_HAS_RAS_EXTN)) { + if (kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, RAS, IMP)) { u64 disr =3D kvm_vcpu_get_disr(vcpu); =20 kvm_handle_guest_serror(vcpu, disr_to_esr(disr)); diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/i= nclude/hyp/switch.h index 37ff87d782b6..bf176a3cc594 100644 --- a/arch/arm64/kvm/hyp/include/hyp/switch.h +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h @@ -272,7 +272,7 @@ static inline void ___activate_traps(struct kvm_vcpu *v= cpu, u64 hcr) =20 write_sysreg(hcr, hcr_el2); =20 - if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) + if (kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, RAS, IMP) && (hcr & HCR_VSE)) write_sysreg_s(vcpu->arch.vsesr_el2, SYS_VSESR_EL2); } =20 diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hy= p/include/hyp/sysreg-sr.h index 4c0fdabaf8ae..98526556d4e5 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -105,6 +105,8 @@ static inline void __sysreg_save_el1_state(struct kvm_c= pu_context *ctxt) =20 static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *= ctxt) { + struct kvm_vcpu *vcpu =3D ctxt_to_vcpu(ctxt); + ctxt->regs.pc =3D read_sysreg_el2(SYS_ELR); /* * Guest PSTATE gets saved at guest fixup time in all @@ -113,7 +115,7 @@ static inline void __sysreg_save_el2_return_state(struc= t kvm_cpu_context *ctxt) if (!has_vhe() && ctxt->__hyp_running_vcpu) ctxt->regs.pstate =3D read_sysreg_el2(SYS_SPSR); =20 - if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) + if (kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, RAS, IMP)) ctxt_sys_reg(ctxt, DISR_EL1) =3D read_sysreg_s(SYS_VDISR_EL2); } =20 @@ -220,6 +222,7 @@ static inline void __sysreg_restore_el2_return_state(st= ruct kvm_cpu_context *ctx { u64 pstate =3D to_hw_pstate(ctxt); u64 mode =3D pstate & PSR_AA32_MODE_MASK; + struct kvm_vcpu *vcpu =3D ctxt_to_vcpu(ctxt); =20 /* * Safety check to ensure we're setting the CPU up to enter the guest @@ -238,7 +241,7 @@ static inline void __sysreg_restore_el2_return_state(st= ruct kvm_cpu_context *ctx write_sysreg_el2(ctxt->regs.pc, SYS_ELR); write_sysreg_el2(pstate, SYS_SPSR); =20 - if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) + if (kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, RAS, IMP)) write_sysreg_s(ctxt_sys_reg(ctxt, DISR_EL1), SYS_VDISR_EL2); } =20 diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 31e49da867ff..b09f8ba3525b 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -4513,7 +4513,7 @@ static void vcpu_set_hcr(struct kvm_vcpu *vcpu) =20 if (has_vhe() || has_hvhe()) vcpu->arch.hcr_el2 |=3D HCR_E2H; - if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) { + if (kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) { /* route synchronous external abort exceptions to EL2 */ vcpu->arch.hcr_el2 |=3D HCR_TEA; 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Wed, 25 Sep 2024 23:23:16 -0400 X-MC-Unique: 7yAz8LruPE6dXZbcRoFGBw-1 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (unknown [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id B8B8E19373E5; Thu, 26 Sep 2024 03:23:14 +0000 (UTC) Received: from virt-mtcollins-01.lab.eng.rdu2.redhat.com (unknown [10.8.1.196]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1217A19560A3; Thu, 26 Sep 2024 03:23:11 +0000 (UTC) From: Shaoqin Huang To: Oliver Upton , Marc Zyngier , kvmarm@lists.linux.dev Cc: Eric Auger , Sebastian Ott , Cornelia Huck , Shaoqin Huang , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Paolo Bonzini , Shuah Khan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [RFC PATCH v1 2/2] KVM: arm64: Allow the RAS feature bit in ID_AA64PFR0_EL1 writable from userspace Date: Wed, 25 Sep 2024 23:22:40 -0400 Message-Id: <20240926032244.3666579-3-shahuang@redhat.com> In-Reply-To: <20240926032244.3666579-1-shahuang@redhat.com> References: <20240926032244.3666579-1-shahuang@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Content-Type: text/plain; charset="utf-8" Currently FEAT_RAS is not writable, this makes migration fail between systems where this feature differ. Allow the FEAT_RAS writable in ID_AA64PFR0_EL1 to let the migration possible when the RAS is differ between two machines. Also update the kselftest to test the RAS field. Signed-off-by: Shaoqin Huang --- arch/arm64/kvm/sys_regs.c | 1 - tools/testing/selftests/kvm/aarch64/set_id_regs.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index b09f8ba3525b..51ff66a11793 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2364,7 +2364,6 @@ static const struct sys_reg_desc sys_reg_descs[] =3D { .val =3D ~(ID_AA64PFR0_EL1_AMU | ID_AA64PFR0_EL1_MPAM | ID_AA64PFR0_EL1_SVE | - ID_AA64PFR0_EL1_RAS | ID_AA64PFR0_EL1_GIC | ID_AA64PFR0_EL1_AdvSIMD | ID_AA64PFR0_EL1_FP), }, diff --git a/tools/testing/selftests/kvm/aarch64/set_id_regs.c b/tools/test= ing/selftests/kvm/aarch64/set_id_regs.c index d20981663831..d2dd78ce0e02 100644 --- a/tools/testing/selftests/kvm/aarch64/set_id_regs.c +++ b/tools/testing/selftests/kvm/aarch64/set_id_regs.c @@ -126,6 +126,7 @@ static const struct reg_ftr_bits ftr_id_aa64pfr0_el1[] = =3D { REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, CSV2, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, DIT, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, SEL2, 0), + REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, RAS, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL3, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL2, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL1, 0), --=20 2.40.1