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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d3e79sm2662906a91.27.2024.09.26.00.14.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2024 00:14:03 -0700 (PDT) From: Potin Lai Date: Thu, 26 Sep 2024 15:10:44 +0800 Subject: [PATCH v2 1/3] ARM: dts: aspeed: catalina: move hdd board i2c mux bus to i2c5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240926-catalina-evt-dvt-system-modify-v2-1-a861daeba059@gmail.com> References: <20240926-catalina-evt-dvt-system-modify-v2-0-a861daeba059@gmail.com> In-Reply-To: <20240926-catalina-evt-dvt-system-modify-v2-0-a861daeba059@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Patrick Williams Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Potin Lai , Potin Lai X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1727334839; l=4559; i=potin.lai.pt@gmail.com; s=20240724; h=from:subject:message-id; bh=bVHCPsMjz6la14pOQHSDdWP8VOORoHkUheYAAgbPX2g=; b=jFN+8gsBzVgcOwW0viNvRHj9cunW7PBxpzL8bSdIfiZIhjeAe7cw9Kia+Gk829Txp1vVUUdSs emHkvv+vd5eA2c1EnETLQKtLyxhQfFqqPVMUZ9cV1z+mpmwqbVUZ82E X-Developer-Key: i=potin.lai.pt@gmail.com; a=ed25519; pk=6Z4H4V4fJwLteH/WzIXSsx6TkuY5FOcBBP+4OflJ5gM= From: Potin Lai Due to EVT hardware changes, move HDD board i2c mux bus from i2c30 to i2c5. Signed-off-by: Potin Lai --- .../dts/aspeed/aspeed-bmc-facebook-catalina.dts | 165 +++++++++++------= ---- 1 file changed, 83 insertions(+), 82 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts b/ar= ch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts index fa0921a4afe2..eac6e33e98f4 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts @@ -50,14 +50,14 @@ aliases { i2c45 =3D &i2c0mux5ch1; i2c46 =3D &i2c0mux5ch2; i2c47 =3D &i2c0mux5ch3; - i2c48 =3D &i2c30mux0ch0; - i2c49 =3D &i2c30mux0ch1; - i2c50 =3D &i2c30mux0ch2; - i2c51 =3D &i2c30mux0ch3; - i2c52 =3D &i2c30mux0ch4; - i2c53 =3D &i2c30mux0ch5; - i2c54 =3D &i2c30mux0ch6; - i2c55 =3D &i2c30mux0ch7; + i2c48 =3D &i2c5mux0ch0; + i2c49 =3D &i2c5mux0ch1; + i2c50 =3D &i2c5mux0ch2; + i2c51 =3D &i2c5mux0ch3; + i2c52 =3D &i2c5mux0ch4; + i2c53 =3D &i2c5mux0ch5; + i2c54 =3D &i2c5mux0ch6; + i2c55 =3D &i2c5mux0ch7; }; =20 chosen { @@ -244,80 +244,6 @@ i2c0mux1ch2: i2c@2 { #address-cells =3D <1>; #size-cells =3D <0>; reg =3D <2>; - i2c-mux@70 { - compatible =3D "nxp,pca9548"; - reg =3D <0x70>; - #address-cells =3D <1>; - #size-cells =3D <0>; - i2c-mux-idle-disconnect; - - i2c30mux0ch0: i2c@0 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0>; - }; - i2c30mux0ch1: i2c@1 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <1>; - }; - i2c30mux0ch2: i2c@2 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <2>; - }; - i2c30mux0ch3: i2c@3 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <3>; - }; - i2c30mux0ch4: i2c@4 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <4>; - }; - i2c30mux0ch5: i2c@5 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <5>; - }; - i2c30mux0ch6: i2c@6 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <6>; - // HDD FRU EEPROM - eeprom@52 { - compatible =3D "atmel,24c64"; - reg =3D <0x52>; - }; - }; - i2c30mux0ch7: i2c@7 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <7>; - - power-sensor@40 { - compatible =3D "ti,ina230"; - reg =3D <0x40>; - shunt-resistor =3D <2000>; - }; - power-sensor@41 { - compatible =3D "ti,ina230"; - reg =3D <0x41>; - shunt-resistor =3D <2000>; - }; - power-sensor@44 { - compatible =3D "ti,ina230"; - reg =3D <0x44>; - shunt-resistor =3D <2000>; - }; - power-sensor@45 { - compatible =3D "ti,ina230"; - reg =3D <0x45>; - shunt-resistor =3D <2000>; - }; - }; - }; }; i2c0mux1ch3: i2c@3 { #address-cells =3D <1>; @@ -647,6 +573,81 @@ &i2c4 { =20 &i2c5 { status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9548"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-mux-idle-disconnect; + + i2c5mux0ch0: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + }; + i2c5mux0ch1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + }; + i2c5mux0ch2: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + }; + i2c5mux0ch3: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; 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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e06e1d3e79sm2662906a91.27.2024.09.26.00.14.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2024 00:14:08 -0700 (PDT) From: Potin Lai Date: Thu, 26 Sep 2024 15:10:46 +0800 Subject: [PATCH v2 3/3] ARM: dts: aspeed: catalina: update NIC1 fru address Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240926-catalina-evt-dvt-system-modify-v2-3-a861daeba059@gmail.com> References: <20240926-catalina-evt-dvt-system-modify-v2-0-a861daeba059@gmail.com> In-Reply-To: <20240926-catalina-evt-dvt-system-modify-v2-0-a861daeba059@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Patrick Williams Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Potin Lai , Potin Lai X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1727334839; l=751; i=potin.lai.pt@gmail.com; s=20240724; h=from:subject:message-id; bh=0V6FLE+281a37oceNMtY2U44AQDVLVbnwlBShqJIfHk=; b=/KusJNCpvze1qMVWT1zgxWylSTjPwplzIUaPlkXMWaDr2lQP2HQOs/1jhHwb4x8ay9eDIiVQD pnpOYdPA/uCC6FEH9mid+pbfr67O+F3ICVhSoKYZxVvTCE2G9IlFgJo X-Developer-Key: i=potin.lai.pt@gmail.com; a=ed25519; pk=6Z4H4V4fJwLteH/WzIXSsx6TkuY5FOcBBP+4OflJ5gM= Update NIC1 FRU EEPROM address to 0x52 based on EVT changes. Signed-off-by: Potin Lai --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts b/ar= ch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts index 9502d483e738..ac3e57e9c99e 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts @@ -849,9 +849,9 @@ temperature-sensor@1f { }; =20 // OCP NIC1 FRU EEPROM - eeprom@50 { + eeprom@52 { compatible =3D "atmel,24c64"; - reg =3D <0x50>; + reg =3D <0x52>; }; }; =20 --=20 2.31.1