From nobody Fri Nov 29 00:48:34 2024 Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06A321D5AD5 for ; Wed, 25 Sep 2024 22:06:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=85.214.62.61 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727301968; cv=none; b=mX6qvftz569Zi3zvGcB85guHJ+C0HN9qukz9BTwLPRit9ETlTzTej8KH69KBUedr/TVyHvvI5RUgl40uAeCLI/Qylzv1CvFoe/aTEK+SiTkRvobODSN11xgcVFKsRaEhnlnRE9mu/EOAEGU+U4ejd9EOqjaLyNYketqMfEzKqgc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727301968; c=relaxed/simple; bh=+MO9HGvZEmSbAOH+oLFRm8+PdtCoK5Y1UI3uPht4OL4=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=SnljQDmJdOaJeEue6HuDV/quhGMFzMS3vczKX1q7gfcCZAks//81Zh4wDA77EkG6jrf7IHynFfoKi0UjxOlvI2uZ1Uoli13rwRL2AV/KCEKBbuhJk/cKQP9kIEOHh+nSrg2msrlt4BwEuqqAb9x8xYzbrA0tBchlQW4wRdJiU0A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=denx.de; spf=pass smtp.mailfrom=denx.de; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.b=MUo1T09z; arc=none smtp.client-ip=85.214.62.61 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=denx.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=denx.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.b="MUo1T09z" Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 805F088BC2; Thu, 26 Sep 2024 00:06:03 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1727301964; bh=iT0+1DdEgc8DqY5p9VNB9w5GWKBf/wL+H5zqp/TASYY=; h=From:To:Cc:Subject:Date:From; b=MUo1T09zAVz8Qzr0LrJ4wsWTYwhmo5pshaAYCDxJGawlx+yTSapof/kyZrRiqsTjl ylsrol9vCnhFpF0MtH8WUsRvyk00B33xtoeIB/ilmwiZ5DeejZEq2j/kfJOf/eMbf8 83DnqzVQ4Zh/9kW3K+qwsl2MaMMcVD6T9L/ZZQvfaSZRSxazATLUXJzUPwgXG/3XJC 4B5EvW45pm2XrPj0dpglxolpt/HXbkZ3L/fM+LMhFXokfUpQFPGx25QUjj6zt98sR5 ox1wD4orEX8uEIM9In6CCVgCUVNg8tuJxQ5dzbcsiNrEbzKRPKZPPTMLFv+R8pVxe4 upIRNaM1fgSJg== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: kernel@dh-electronics.com, Marek Vasut , AngeloGioacchino Del Regno , Arnd Bergmann , Fabio Estevam , Jeff Johnson , Neil Armstrong , Pengutronix Kernel Team , Saravana Kannan , Sascha Hauer , Shawn Guo , imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2] soc: imx8m: Probe the SoC driver as platform driver Date: Thu, 26 Sep 2024 00:04:54 +0200 Message-ID: <20240925220552.149551-1-marex@denx.de> X-Mailer: git-send-email 2.45.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Content-Type: text/plain; charset="utf-8" With driver_async_probe=3D* on kernel command line, the following trace is produced because on i.MX8M Plus hardware because the soc-imx8m.c driver calls of_clk_get_by_name() which returns -EPROBE_DEFER because the clock driver is not yet probed. This was not detected during regular testing without driver_async_probe. Convert the SoC code to platform driver and instantiate a platform device in its current device_initcall() to probe the platform driver. Rework .soc_revision callback to always return valid error code and return SoC revision via parameter. This way, if anything in the .soc_revision callback return -EPROBE_DEFER, it gets propagated to .probe and the .probe will get retried later. " ------------[ cut here ]------------ WARNING: CPU: 1 PID: 1 at drivers/soc/imx/soc-imx8m.c:115 imx8mm_soc_revisi= on+0xdc/0x180 CPU: 1 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0-next-20240924-00002= -g2062bb554dea #603 Hardware name: DH electronics i.MX8M Plus DHCOM Premium Developer Kit (3) (= DT) pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=3D--) pc : imx8mm_soc_revision+0xdc/0x180 lr : imx8mm_soc_revision+0xd0/0x180 sp : ffff8000821fbcc0 x29: ffff8000821fbce0 x28: 0000000000000000 x27: ffff800081810120 x26: ffff8000818a9970 x25: 0000000000000006 x24: 0000000000824311 x23: ffff8000817f42c8 x22: ffff0000df8be210 x21: fffffffffffffdfb x20: ffff800082780000 x19: 0000000000000001 x18: ffffffffffffffff x17: ffff800081fff418 x16: ffff8000823e1000 x15: ffff0000c03b65e8 x14: ffff0000c00051b0 x13: ffff800082790000 x12: 0000000000000801 x11: ffff80008278ffff x10: ffff80008209d3a6 x9 : ffff80008062e95c x8 : ffff8000821fb9a0 x7 : 0000000000000000 x6 : 00000000000080e3 x5 : ffff0000df8c03d8 x4 : 0000000000000000 x3 : 0000000000000000 x2 : 0000000000000000 x1 : fffffffffffffdfb x0 : fffffffffffffdfb Call trace: imx8mm_soc_revision+0xdc/0x180 imx8_soc_init+0xb0/0x1e0 do_one_initcall+0x94/0x1a8 kernel_init_freeable+0x240/0x2a8 kernel_init+0x28/0x140 ret_from_fork+0x10/0x20 ---[ end trace 0000000000000000 ]--- SoC: i.MX8MP revision 1.1 " Signed-off-by: Marek Vasut --- Cc: AngeloGioacchino Del Regno Cc: Arnd Bergmann Cc: Fabio Estevam Cc: Jeff Johnson Cc: Neil Armstrong Cc: Pengutronix Kernel Team Cc: Saravana Kannan Cc: Sascha Hauer Cc: Shawn Guo Cc: imx@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- V2: Use the platform device approach instead of late_initcall --- drivers/soc/imx/soc-imx8m.c | 92 ++++++++++++++++++++++++++++--------- 1 file changed, 70 insertions(+), 22 deletions(-) diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c index fe111bae38c8e..170970d4955c6 100644 --- a/drivers/soc/imx/soc-imx8m.c +++ b/drivers/soc/imx/soc-imx8m.c @@ -30,7 +30,7 @@ =20 struct imx8_soc_data { char *name; - u32 (*soc_revision)(void); + int (*soc_revision)(u32 *socrev); }; =20 static u64 soc_uid; @@ -51,24 +51,29 @@ static u32 imx8mq_soc_revision_from_atf(void) static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; #endif =20 -static u32 __init imx8mq_soc_revision(void) +static int imx8mq_soc_revision(u32 *socrev) { struct device_node *np; void __iomem *ocotp_base; u32 magic; u32 rev; struct clk *clk; + int ret; =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); if (!np) - return 0; + return -EINVAL; =20 ocotp_base =3D of_iomap(np, 0); - WARN_ON(!ocotp_base); + if (!ocotp_base) { + ret =3D -EINVAL; + goto err_iomap; + } + clk =3D of_clk_get_by_name(np, NULL); if (IS_ERR(clk)) { - WARN_ON(IS_ERR(clk)); - return 0; + ret =3D PTR_ERR(clk); + goto err_clk; } =20 clk_prepare_enable(clk); @@ -88,32 +93,45 @@ static u32 __init imx8mq_soc_revision(void) soc_uid <<=3D 32; soc_uid |=3D readl_relaxed(ocotp_base + OCOTP_UID_LOW); =20 + *socrev =3D rev; + clk_disable_unprepare(clk); clk_put(clk); iounmap(ocotp_base); of_node_put(np); =20 - return rev; + return 0; + +err_clk: + iounmap(ocotp_base); +err_iomap: + of_node_put(np); + return ret; } =20 -static void __init imx8mm_soc_uid(void) +static int imx8mm_soc_uid(void) { void __iomem *ocotp_base; struct device_node *np; struct clk *clk; + int ret =3D 0; u32 offset =3D of_machine_is_compatible("fsl,imx8mp") ? IMX8MP_OCOTP_UID_OFFSET : 0; =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp"); if (!np) - return; + return -EINVAL; =20 ocotp_base =3D of_iomap(np, 0); - WARN_ON(!ocotp_base); + if (!ocotp_base) { + ret =3D -EINVAL; + goto err_iomap; + } + clk =3D of_clk_get_by_name(np, NULL); if (IS_ERR(clk)) { - WARN_ON(IS_ERR(clk)); - return; + ret =3D PTR_ERR(clk); + goto err_clk; } =20 clk_prepare_enable(clk); @@ -124,31 +142,41 @@ static void __init imx8mm_soc_uid(void) =20 clk_disable_unprepare(clk); clk_put(clk); + +err_clk: iounmap(ocotp_base); +err_iomap: of_node_put(np); + + return ret; } =20 -static u32 __init imx8mm_soc_revision(void) +static int imx8mm_soc_revision(u32 *socrev) { struct device_node *np; void __iomem *anatop_base; - u32 rev; + int ret; =20 np =3D of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); if (!np) - return 0; + return -EINVAL; =20 anatop_base =3D of_iomap(np, 0); - WARN_ON(!anatop_base); + if (!anatop_base) { + ret =3D -EINVAL; + goto err_iomap; + } =20 - rev =3D readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); + *socrev =3D readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); =20 iounmap(anatop_base); of_node_put(np); =20 - imx8mm_soc_uid(); + return imx8mm_soc_uid(); =20 - return rev; +err_iomap: + of_node_put(np); + return ret; } =20 static const struct imx8_soc_data imx8mq_soc_data =3D { @@ -184,7 +212,7 @@ static __maybe_unused const struct of_device_id imx8_so= c_match[] =3D { kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ "unknown" =20 -static int __init imx8_soc_init(void) +static int imx8m_soc_probe(struct platform_device *pdev) { struct soc_device_attribute *soc_dev_attr; struct soc_device *soc_dev; @@ -212,8 +240,11 @@ static int __init imx8_soc_init(void) data =3D id->data; if (data) { soc_dev_attr->soc_id =3D data->name; - if (data->soc_revision) - soc_rev =3D data->soc_revision(); + if (data->soc_revision) { + ret =3D data->soc_revision(&soc_rev); + if (ret) + goto free_soc; + } } =20 soc_dev_attr->revision =3D imx8_revision(soc_rev); @@ -251,6 +282,23 @@ static int __init imx8_soc_init(void) kfree(soc_dev_attr); return ret; } + +static struct platform_driver imx8m_soc_driver =3D { + .probe =3D imx8m_soc_probe, + .driver =3D { + .name =3D "imx8m-soc", + }, +}; +module_platform_driver(imx8m_soc_driver); + +static int __init imx8_soc_init(void) +{ + struct platform_device *pdev; + + pdev =3D platform_device_register_simple("imx8m-soc", -1, NULL, 0); + + return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; +} device_initcall(imx8_soc_init); MODULE_DESCRIPTION("NXP i.MX8M SoC driver"); MODULE_LICENSE("GPL"); --=20 2.45.2