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The pin is routed to a GPIO0_A1 through a diode. Q7 specification describes the PWRBTN# pin as a Power Button signal. Configure the pin as KEY_POWER, so it can function as power button and trigger device shutdown. Add the pin definition to RK3399 Puma dts, so it can be reused by derived platforms, but keep it disabled by default. Enable the power button input on Haikou development board. Signed-off-by: Daniel Semkowicz Tested-by: Quentin Schulz --- .../boot/dts/rockchip/rk3399-puma-haikou.dts | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 22 +++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3399-puma-haikou.dts index f6f15946579e..0999026b16d0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts @@ -143,6 +143,10 @@ vddd_codec: vddd-codec { }; }; =20 +&gpio_key_power { + status =3D "okay"; +}; + &hdmi { ddc-i2c-bus =3D <&i2c3>; status =3D "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3399-puma.dtsi index 650b1ba9c192..389ffe604e74 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH */ =20 +#include #include #include "rk3399.dtsi" =20 @@ -39,6 +40,19 @@ clkin_gmac: external-gmac-clock { #clock-cells =3D <0>; }; =20 + gpio_key_power: gpio-key-power { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&pwrbtn_pin>; + pinctrl-names =3D "default"; + status =3D "disabled"; + + button-pwrbtn-n { + gpios =3D <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>; + label =3D "PWRBTN#"; + linux,code =3D ; + }; + }; + vcc1v2_phy: vcc1v2-phy { compatible =3D "regulator-fixed"; regulator-name =3D "vcc1v2_phy"; @@ -475,6 +489,14 @@ &pinctrl { pinctrl-names =3D "default"; pinctrl-0 =3D <&q7_thermal_pin &bios_disable_override_hog_pin>; =20 + buttons { + pwrbtn_pin: pwrbtn-pin { + rockchip,pins =3D + /* PWRBTN# */ + <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + gpios { bios_disable_override_hog_pin: bios-disable-override-hog-pin { rockchip,pins =3D --=20 2.46.1