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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20af1821f33sm10678895ad.219.2024.09.24.07.04.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Sep 2024 07:04:29 -0700 (PDT) From: Yang Chen To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, patrick@stwcx.xyz, amithash@meta.com Cc: Jerry.Lin@quantatw.com, yangchen.openbmc@gmail.com Subject: [PATCH v1 3/3] ARM: dts: aspeed: minerva: add fru device for other blades Date: Tue, 24 Sep 2024 22:02:15 +0800 Message-Id: <20240924140215.2484170-4-yangchen.openbmc@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> References: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Minerva platform has 16 compute blades and 6 network blades, each with an EEPROM that can be operated by the CMM. This commit adds support for each FRU. Signed-off-by: Yang Chen --- .../aspeed/aspeed-bmc-facebook-minerva.dts | 334 ++++++++++++++++++ 1 file changed, 334 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arc= h/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index c915db28a806..468a33f50ef2 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -23,6 +23,32 @@ aliases { i2c19 =3D &imux19; i2c20 =3D &imux20; i2c21 =3D &imux21; + i2c22 =3D &imux22; + i2c23 =3D &imux23; + i2c24 =3D &imux24; + i2c25 =3D &imux25; + i2c26 =3D &imux26; + i2c27 =3D &imux27; + i2c28 =3D &imux28; + i2c29 =3D &imux29; + i2c30 =3D &imux30; + i2c31 =3D &imux31; + i2c32 =3D &imux32; + i2c33 =3D &imux33; + i2c34 =3D &imux34; + i2c35 =3D &imux35; + i2c36 =3D &imux36; + i2c37 =3D &imux37; + i2c38 =3D &imux38; + i2c39 =3D &imux39; + i2c40 =3D &imux40; + i2c41 =3D &imux41; + i2c42 =3D &imux42; + i2c43 =3D &imux43; + i2c44 =3D &imux44; + i2c45 =3D &imux45; + i2c46 =3D &imux46; + i2c47 =3D &imux47; =20 spi1 =3D &spi_gpio; }; @@ -493,23 +519,239 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; + + imux22: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + }; + + imux23: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + }; }; }; =20 &i2c3 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux24: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux25: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux26: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux27: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c4 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux28: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux29: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux30: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux31: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c5 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux32: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux33: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux34: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux35: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c6 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux36: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux37: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux38: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux39: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c7 { @@ -536,10 +778,102 @@ rtc@51 { =20 &i2c12 { status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9545"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux40: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux41: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux42: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux43: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + }; + }; }; =20 &i2c13 { status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9545"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux44: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux45: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux46: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux47: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + }; + }; }; =20 &i2c14 { --=20 2.34.1