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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20af1821f33sm10678895ad.219.2024.09.24.07.04.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Sep 2024 07:04:23 -0700 (PDT) From: Yang Chen To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, patrick@stwcx.xyz, amithash@meta.com Cc: Jerry.Lin@quantatw.com, yangchen.openbmc@gmail.com Subject: [PATCH v1 1/3] ARM: dts: aspeed: minerva: Revise the SGPIO line name Date: Tue, 24 Sep 2024 22:02:13 +0800 Message-Id: <20240924140215.2484170-2-yangchen.openbmc@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> References: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Modify the SGPIO line names sent from the CMM CPLD in the DVT version and map the blade and FCB numbers to match the silkscreen labels on the rack as follows: 1. Change the compute blade numbering from 0-15 to 1-16. 2. Change the network blade numbering from 0-5 to 1-6. 3. Update the FCB numbering from TOP0/1, MID0/1, and BOT0/1 to FCB1-6. 4. Revise the SGPIO line name for DVT changed. Signed-off-by: Yang Chen --- .../aspeed/aspeed-bmc-facebook-minerva.dts | 110 +++++++++--------- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arc= h/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 41e2246cfbd1..38eb42aaa98b 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -627,7 +627,6 @@ &sgpiom0 { gpio-line-names =3D /*"input pin","output pin"*/ /*A0 - A7*/ - "PRSNT_MTIA_BLADE0_N","PWREN_MTIA_BLADE0_EN_N", "PRSNT_MTIA_BLADE1_N","PWREN_MTIA_BLADE1_EN_N", "PRSNT_MTIA_BLADE2_N","PWREN_MTIA_BLADE2_EN_N", "PRSNT_MTIA_BLADE3_N","PWREN_MTIA_BLADE3_EN_N", @@ -635,8 +634,8 @@ &sgpiom0 { "PRSNT_MTIA_BLADE5_N","PWREN_MTIA_BLADE5_EN_N", "PRSNT_MTIA_BLADE6_N","PWREN_MTIA_BLADE6_EN_N", "PRSNT_MTIA_BLADE7_N","PWREN_MTIA_BLADE7_EN_N", - /*B0 - B7*/ "PRSNT_MTIA_BLADE8_N","PWREN_MTIA_BLADE8_EN_N", + /*B0 - B7*/ "PRSNT_MTIA_BLADE9_N","PWREN_MTIA_BLADE9_EN_N", "PRSNT_MTIA_BLADE10_N","PWREN_MTIA_BLADE10_EN_N", "PRSNT_MTIA_BLADE11_N","PWREN_MTIA_BLADE11_EN_N", @@ -644,80 +643,80 @@ &sgpiom0 { "PRSNT_MTIA_BLADE13_N","PWREN_MTIA_BLADE13_EN_N", "PRSNT_MTIA_BLADE14_N","PWREN_MTIA_BLADE14_EN_N", "PRSNT_MTIA_BLADE15_N","PWREN_MTIA_BLADE15_EN_N", + "PRSNT_MTIA_BLADE16_N","PWREN_MTIA_BLADE16_EN_N", /*C0 - C7*/ - "PRSNT_NW_BLADE0_N","PWREN_NW_BLADE0_EN_N", "PRSNT_NW_BLADE1_N","PWREN_NW_BLADE1_EN_N", "PRSNT_NW_BLADE2_N","PWREN_NW_BLADE2_EN_N", "PRSNT_NW_BLADE3_N","PWREN_NW_BLADE3_EN_N", "PRSNT_NW_BLADE4_N","PWREN_NW_BLADE4_EN_N", "PRSNT_NW_BLADE5_N","PWREN_NW_BLADE5_EN_N", - "PRSNT_FCB_TOP_0_N","PWREN_MTIA_BLADE0_HSC_EN_N", - "PRSNT_FCB_TOP_1_N","PWREN_MTIA_BLADE1_HSC_EN_N", + "PRSNT_NW_BLADE6_N","PWREN_NW_BLADE6_EN_N", + "PRSNT_FCB_1_N","PWREN_MTIA_BLADE1_HSC_EN_N", + "PRSNT_FCB_2_N","PWREN_MTIA_BLADE2_HSC_EN_N", /*D0 - D7*/ - "PRSNT_FCB_MIDDLE_0_N","PWREN_MTIA_BLADE2_HSC_EN_N", - "PRSNT_FCB_MIDDLE_1_N","PWREN_MTIA_BLADE3_HSC_EN_N", - "PRSNT_FCB_BOTTOM_1_N","PWREN_MTIA_BLADE4_HSC_EN_N", - "PRSNT_FCB_BOTTOM_0_N","PWREN_MTIA_BLADE5_HSC_EN_N", - "PWRGD_MTIA_BLADE0_PWROK_N","PWREN_MTIA_BLADE6_HSC_EN_N", + "PRSNT_FCB_3_N","PWREN_MTIA_BLADE3_HSC_EN_N", + "PRSNT_FCB_4_N","PWREN_MTIA_BLADE4_HSC_EN_N", + "PRSNT_FCB_6_N","PWREN_MTIA_BLADE5_HSC_EN_N", + "PRSNT_FCB_5_N","PWREN_MTIA_BLADE6_HSC_EN_N", "PWRGD_MTIA_BLADE1_PWROK_N","PWREN_MTIA_BLADE7_HSC_EN_N", "PWRGD_MTIA_BLADE2_PWROK_N","PWREN_MTIA_BLADE8_HSC_EN_N", "PWRGD_MTIA_BLADE3_PWROK_N","PWREN_MTIA_BLADE9_HSC_EN_N", - /*E0 - E7*/ "PWRGD_MTIA_BLADE4_PWROK_N","PWREN_MTIA_BLADE10_HSC_EN_N", + /*E0 - E7*/ "PWRGD_MTIA_BLADE5_PWROK_N","PWREN_MTIA_BLADE11_HSC_EN_N", "PWRGD_MTIA_BLADE6_PWROK_N","PWREN_MTIA_BLADE12_HSC_EN_N", "PWRGD_MTIA_BLADE7_PWROK_N","PWREN_MTIA_BLADE13_HSC_EN_N", "PWRGD_MTIA_BLADE8_PWROK_N","PWREN_MTIA_BLADE14_HSC_EN_N", "PWRGD_MTIA_BLADE9_PWROK_N","PWREN_MTIA_BLADE15_HSC_EN_N", - "PWRGD_MTIA_BLADE10_PWROK_N","PWREN_NW_BLADE0_HSC_EN_N", + "PWRGD_MTIA_BLADE10_PWROK_N","PWREN_MTIA_BLADE16_HSC_EN_N", "PWRGD_MTIA_BLADE11_PWROK_N","PWREN_NW_BLADE1_HSC_EN_N", - /*F0 - F7*/ "PWRGD_MTIA_BLADE12_PWROK_N","PWREN_NW_BLADE2_HSC_EN_N", + /*F0 - F7*/ "PWRGD_MTIA_BLADE13_PWROK_N","PWREN_NW_BLADE3_HSC_EN_N", "PWRGD_MTIA_BLADE14_PWROK_N","PWREN_NW_BLADE4_HSC_EN_N", "PWRGD_MTIA_BLADE15_PWROK_N","PWREN_NW_BLADE5_HSC_EN_N", - "PWRGD_NW_BLADE0_PWROK_N","PWREN_FCB_TOP_0_EN_N", - "PWRGD_NW_BLADE1_PWROK_N","PWREN_FCB_TOP_1_EN_N", - "PWRGD_NW_BLADE2_PWROK_N","PWREN_FCB_MIDDLE_0_EN_N", - "PWRGD_NW_BLADE3_PWROK_N","PWREN_FCB_MIDDLE_1_EN_N", + "PWRGD_MTIA_BLADE16_PWROK_N","PWREN_NW_BLADE6_HSC_EN_N", + "PWRGD_NW_BLADE1_PWROK_N","PWREN_SGPIO_FCB_2_EN_N", + "PWRGD_NW_BLADE2_PWROK_N","PWREN_SGPIO_FCB_1_EN_N", + "PWRGD_NW_BLADE3_PWROK_N","PWREN_SGPIO_FCB_4_EN_N", + "PWRGD_NW_BLADE4_PWROK_N","PWREN_SGPIO_FCB_3_EN_N", /*G0 - G7*/ - "PWRGD_NW_BLADE4_PWROK_N","PWREN_FCB_BOTTOM_1_EN_N", - "PWRGD_NW_BLADE5_PWROK_N","PWREN_FCB_BOTTOM_0_EN_N", - "PWRGD_FCB_TOP_0_PWROK_N","FM_CMM_AC_CYCLE_N", - "PWRGD_FCB_TOP_1_PWROK_N","MGMT_SFP_TX_DIS", - "PWRGD_FCB_MIDDLE_0_PWROK_N","FM_MDIO_SW_SEL", - "PWRGD_FCB_MIDDLE_1_PWROK_N","FM_P24V_SMPWR_EN", - "PWRGD_FCB_BOTTOM_1_PWROK_N","", - "PWRGD_FCB_BOTTOM_0_PWROK_N","", + "PWRGD_NW_BLADE5_PWROK_N","PWREN_SGPIO_FCB_5_EN_N", + "PWRGD_NW_BLADE6_PWROK_N","PWREN_SGPIO_FCB_6_EN_N", + "PWRGD_FCB_1","FM_BMC_RST_RTCRST_R", + "PWRGD_FCB_2","", + "PWRGD_FCB_3","FM_MDIO_SW_SEL", + "PWRGD_FCB_4","FM_P24V_SMPWR_EN", + "PWRGD_FCB_6","", + "PWRGD_FCB_5","", /*H0 - H7*/ - "LEAK_DETECT_MTIA_BLADE0_N","", "LEAK_DETECT_MTIA_BLADE1_N","", "LEAK_DETECT_MTIA_BLADE2_N","", "LEAK_DETECT_MTIA_BLADE3_N","", "LEAK_DETECT_MTIA_BLADE4_N","", "LEAK_DETECT_MTIA_BLADE5_N","", "LEAK_DETECT_MTIA_BLADE6_N","", - "LEAK_DETECT_MTIA_BLADE7_N","", + "LEAK_DETECT_MTIA_BLADE7_N","ERR_INJECT_CMM_PWR_FAIL_N", + "LEAK_DETECT_MTIA_BLADE8_N","", /*I0 - I7*/ - "LEAK_DETECT_MTIA_BLADE8_N","RST_I2CRST_FCB_BOTTOM_1_N", - "LEAK_DETECT_MTIA_BLADE9_N","RST_I2CRST_FCB_BOTTOM_0_N", - "LEAK_DETECT_MTIA_BLADE10_N","RST_I2CRST_FCB_MIDDLE_0_N", - "LEAK_DETECT_MTIA_BLADE11_N","RST_I2CRST_FCB_MIDDLE_1_N", - "LEAK_DETECT_MTIA_BLADE12_N","RST_I2CRST_FCB_TOP_0_N", - "LEAK_DETECT_MTIA_BLADE13_N","RST_I2CRST_FCB_TOP_1_N", - "LEAK_DETECT_MTIA_BLADE14_N","BMC_READY", - "LEAK_DETECT_MTIA_BLADE15_N","FM_88E6393X_BIN_UPDATE_EN_N", + "LEAK_DETECT_MTIA_BLADE9_N","RST_I2CRST_FCB_5_N", + "LEAK_DETECT_MTIA_BLADE10_N","RST_I2CRST_FCB_6_N", + "LEAK_DETECT_MTIA_BLADE11_N","RST_I2CRST_FCB_4_N", + "LEAK_DETECT_MTIA_BLADE12_N","RST_I2CRST_FCB_3_N", + "LEAK_DETECT_MTIA_BLADE13_N","RST_I2CRST_FCB_2_N", + "LEAK_DETECT_MTIA_BLADE14_N","RST_I2CRST_FCB_1_N", + "LEAK_DETECT_MTIA_BLADE15_N","BMC_READY", + "LEAK_DETECT_MTIA_BLADE16_N","FM_88E6393X_BIN_UPDATE_EN_N", /*J0 - J7*/ - "LEAK_DETECT_NW_BLADE0_N","WATER_VALVE_CLOSED_N", - "LEAK_DETECT_NW_BLADE1_N","", + "LEAK_DETECT_NW_BLADE1_N","WATER_VALVE_CLOSED_N", "LEAK_DETECT_NW_BLADE2_N","", "LEAK_DETECT_NW_BLADE3_N","", "LEAK_DETECT_NW_BLADE4_N","", "LEAK_DETECT_NW_BLADE5_N","", - "PWRGD_MTIA_BLADE0_HSC_PWROK_N","", + "LEAK_DETECT_NW_BLADE6_N","", "PWRGD_MTIA_BLADE1_HSC_PWROK_N","", - /*K0 - K7*/ "PWRGD_MTIA_BLADE2_HSC_PWROK_N","", + /*K0 - K7*/ "PWRGD_MTIA_BLADE3_HSC_PWROK_N","", "PWRGD_MTIA_BLADE4_HSC_PWROK_N","", "PWRGD_MTIA_BLADE5_HSC_PWROK_N","", @@ -725,49 +724,50 @@ &sgpiom0 { "PWRGD_MTIA_BLADE7_HSC_PWROK_N","", "PWRGD_MTIA_BLADE8_HSC_PWROK_N","", "PWRGD_MTIA_BLADE9_HSC_PWROK_N","", - /*L0 - L7*/ "PWRGD_MTIA_BLADE10_HSC_PWROK_N","", + /*L0 - L7*/ "PWRGD_MTIA_BLADE11_HSC_PWROK_N","", "PWRGD_MTIA_BLADE12_HSC_PWROK_N","", "PWRGD_MTIA_BLADE13_HSC_PWROK_N","", "PWRGD_MTIA_BLADE14_HSC_PWROK_N","", "PWRGD_MTIA_BLADE15_HSC_PWROK_N","", - "PWRGD_NW_BLADE0_HSC_PWROK_N","", + "PWRGD_MTIA_BLADE16_HSC_PWROK_N","", "PWRGD_NW_BLADE1_HSC_PWROK_N","", - /*M0 - M7*/ "PWRGD_NW_BLADE2_HSC_PWROK_N","", + /*M0 - M7*/ "PWRGD_NW_BLADE3_HSC_PWROK_N","", "PWRGD_NW_BLADE4_HSC_PWROK_N","", "PWRGD_NW_BLADE5_HSC_PWROK_N","", + "PWRGD_NW_BLADE6_HSC_PWROK_N","", "RPU_READY","", "IT_GEAR_RPU_LINK_N","", "IT_GEAR_LEAK","", "WATER_VALVE_CLOSED_N","", /*N0 - N7*/ - "VALVE_STS0","", - "VALVE_STS1","", - "PCA9555_IRQ0_N","", + "VALVE_STATUS_0","", + "VALVE_STATUS_1","", "PCA9555_IRQ1_N","", + "PCA9555_IRQ2_N","", "CR_TOGGLE_BOOT_N","", - "IRQ_FCB_TOP0_N","", - "IRQ_FCB_TOP1_N","", + "IRQ_FCB_1_N","", + "IRQ_FCB_2_N","", "CMM_CABLE_CARTRIDGE_PRSNT_BOT_N","", /*O0 - O7*/ "CMM_CABLE_CARTRIDGE_PRSNT_TOP_N","", "BOT_BCB_CABLE_PRSNT_N","", "TOP_BCB_CABLE_PRSNT_N","", - "IRQ_FCB_MID0_N","", - "IRQ_FCB_MID1_N","", + "IRQ_FCB_3_N","", + "IRQ_FCB_4_N","", "CHASSIS_LEAK0_DETECT_N","", "CHASSIS_LEAK1_DETECT_N","", - "VALVE_RMON_A_1","", + "PCA9555_IRQ3_N","", /*P0 - P7*/ - "VALVE_RMON_A_2","", - "VALVE_RMON_B_1","", - "VALVE_RMON_B_2","", + "PCA9555_IRQ4_N","", + "PCA9555_IRQ5_N","", + "CMM_AC_PWR_BTN_N","", "RPU_READY_SPARE","", "IT_GEAR_LEAK_SPARE","", "IT_GEAR_RPU_LINK_SPARE_N","", - "IRQ_FCB_BOT0_N","", - "IRQ_FCB_BOT0_N",""; + "IRQ_FCB_6_N","", + "IRQ_FCB_5_N",""; }; --=20 2.34.1 From nobody Fri Nov 29 05:48:17 2024 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 966161A76AA; Tue, 24 Sep 2024 14:04:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727186669; cv=none; b=rHzDuxM6adq+nn1vyQkcdhpCzREZ2flQx16J8/ls1BAfu89buNIAKYcIQVgcaP3Mn/GAPqAqnt8Y51cHHzKwo1E9I1k92Hj9uKOeZ3zJpx7jtrbfFOBZixke1MCzolX+wWSaQJKkSihiv3mOqrMYTKFz2o+L798NCk5zO8H3CIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727186669; c=relaxed/simple; bh=dSxFZCnd2ec64OV3Oj8qOp4UN7fcBrZdB78QkkpfRRs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=O2aj81rPCHMh0WRhAN2FDtmzWCfdX7gRTPNO/x16QKqpsl+XVuT4bn1Q3LFxxDDIgJrxCcpvFGpOqPzDp8ThbG5oDutC6kxFhAcZF/rLLkbdNQYie2LCMWfb5JnuRgL9uvQxMcBg5vqiAC3jya0dNmRiflP7dnefwWsIDFMGDVI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=gGYQ+rQO; arc=none smtp.client-ip=209.85.214.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gGYQ+rQO" Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-2068a7c9286so55659515ad.1; Tue, 24 Sep 2024 07:04:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1727186667; x=1727791467; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t41RrvA9ibashCj3l3oDsqUmb7XQG+ol4j0yx1LSoJs=; b=gGYQ+rQOaj4Xkk5axYhJsxgte2PCRAbM+Y1OCxnpZlZ+tFwNfxYt192HcL1Pqv0qK8 USeqlFoF3drK/MfLfiR8qF3VYuHHq5J6jdj747UjfPJe8nOhwEdvjsXvrTE2qU21ohBR jPuIQ0cQH12XixwQFNFjbxFNSu6FXzZXd1HE1l1fOnIGUglGZsE7G0C49xMTgWoh52d9 +KagbvTRhmpH30HpB29QGk2ndTC0zoT3qZH0iUOoha0rHBjboMuwjF8wD13tujTC+lUo Qq+E+jFRIEzQySeivOGW7E02+JFElf+r0F1Wbu5xRBWGsF5Nyp+W9WwEJHYsn/R5AqyQ WBFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727186667; x=1727791467; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t41RrvA9ibashCj3l3oDsqUmb7XQG+ol4j0yx1LSoJs=; b=UJebfa8G8nXYZmc/5OYanO7j9T5MDqfwc+UOn1h8goIu/lMVvf7imP6gX3HsqqKjaM 6p1fsdkNwJjAVwCP3rRDVTCryq7utlKS6tbpQniQY7XlepYg93D8brXF8SQwuklJHDUZ jhy3u1zqt6IAtd11Bmfmx/W0GIvnTlXGJx14vPTmNr0/mWdUljRACINjyldRWE7HXgeW iUK/Pi/9yJ60FpERaBPBCFg4YOYDt67fK5XWetPBZ4h0WaGCRFvJ/3pBsYtZyfInLhnL BNMifbKkWTOegdQlHjaXixLDRC1RvcKsdZ21rRKDiUkIkImUkv6KHpvqG+6Z/c7HcDFi ZB0w== X-Forwarded-Encrypted: i=1; AJvYcCXXFZanIUW/X7T7CnhBHBHPTJ+QdVCFwHXvrPyEb9N8qEF/dtb/0omtg14hm8CdPsjBc48eZDZy7vRj@vger.kernel.org, AJvYcCXZ3kidHl4BK43SGGF8xF3fczK1JzpzRR/fxcRh3wSXCjwmGCSQony1IOLSEqw0cyT1+W4SnS6CjlywEXI/@vger.kernel.org X-Gm-Message-State: AOJu0YwmmpfCb3jAJvfKSOw8PA3seykzW23GSGTnjmjGPRxU0tyLQnxN LaUaEbQIr6kYXDskyp/USR1sKF/ZMbtgto8uNf7D9hCG36d8G2LR X-Google-Smtp-Source: AGHT+IHnzkG8P7QQgG9rKuqx66HrjkDX9178ig3DFr0CaK8vzpF07XzLy0C6tKxwVlqORq0CLbLAzQ== X-Received: by 2002:a17:902:d4d2:b0:207:3a4a:de43 with SMTP id d9443c01a7336-208d83c8114mr188656825ad.34.1727186666859; Tue, 24 Sep 2024 07:04:26 -0700 (PDT) Received: from obliging-System-Product-Name.dhcpserver.bu9bmc.local (61-220-246-151.hinet-ip.hinet.net. [61.220.246.151]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20af1821f33sm10678895ad.219.2024.09.24.07.04.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Sep 2024 07:04:26 -0700 (PDT) From: Yang Chen To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, patrick@stwcx.xyz, amithash@meta.com Cc: Jerry.Lin@quantatw.com, yangchen.openbmc@gmail.com Subject: [PATCH v1 2/3] ARM: dts: aspeed: minerva: change the i2c mux number for FCBs Date: Tue, 24 Sep 2024 22:02:14 +0800 Message-Id: <20240924140215.2484170-3-yangchen.openbmc@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> References: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Change the i2c mux channel to match the correct fan board location. Signed-off-by: Yang Chen --- .../aspeed/aspeed-bmc-facebook-minerva.dts | 31 ++++++++++--------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arc= h/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index 38eb42aaa98b..c915db28a806 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -213,10 +213,11 @@ i2c-mux@77 { #size-cells =3D <0>; i2c-mux-idle-disconnect; =20 - imux16: i2c@0 { + // FCB 1 + imux16: i2c@1 { #address-cells =3D <1>; #size-cells =3D <0>; - reg =3D <0>; + reg =3D <1>; =20 eeprom@50 { compatible =3D "atmel,24c128"; @@ -259,11 +260,11 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; - - imux17: i2c@1 { + // FCB 2 + imux17: i2c@0 { #address-cells =3D <1>; #size-cells =3D <0>; - reg =3D <1>; + reg =3D <0>; =20 eeprom@50 { compatible =3D "atmel,24c128"; @@ -306,11 +307,11 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; - - imux18: i2c@2 { + // FCB 3 + imux18: i2c@3 { #address-cells =3D <1>; #size-cells =3D <0>; - reg =3D <2>; + reg =3D <3>; =20 eeprom@50 { compatible =3D "atmel,24c128"; @@ -353,11 +354,11 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; - - imux19: i2c@3 { + // FCB 4 + imux19: i2c@2 { #address-cells =3D <1>; #size-cells =3D <0>; - reg =3D <3>; + reg =3D <2>; =20 eeprom@50 { compatible =3D "atmel,24c128"; @@ -400,8 +401,8 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; - - imux20: i2c@5 { + // FCB 5 + imux20: i2c@4 { #address-cells =3D <1>; #size-cells =3D <0>; reg =3D <4>; @@ -446,8 +447,8 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; - - imux21: i2c@4 { + // FCB 6 + imux21: i2c@5 { #address-cells =3D <1>; #size-cells =3D <0>; reg =3D <5>; --=20 2.34.1 From nobody Fri Nov 29 05:48:17 2024 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BC521A76CD; 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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20af1821f33sm10678895ad.219.2024.09.24.07.04.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Sep 2024 07:04:29 -0700 (PDT) From: Yang Chen To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, patrick@stwcx.xyz, amithash@meta.com Cc: Jerry.Lin@quantatw.com, yangchen.openbmc@gmail.com Subject: [PATCH v1 3/3] ARM: dts: aspeed: minerva: add fru device for other blades Date: Tue, 24 Sep 2024 22:02:15 +0800 Message-Id: <20240924140215.2484170-4-yangchen.openbmc@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> References: <20240924140215.2484170-1-yangchen.openbmc@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Minerva platform has 16 compute blades and 6 network blades, each with an EEPROM that can be operated by the CMM. This commit adds support for each FRU. Signed-off-by: Yang Chen --- .../aspeed/aspeed-bmc-facebook-minerva.dts | 334 ++++++++++++++++++ 1 file changed, 334 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arc= h/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts index c915db28a806..468a33f50ef2 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts @@ -23,6 +23,32 @@ aliases { i2c19 =3D &imux19; i2c20 =3D &imux20; i2c21 =3D &imux21; + i2c22 =3D &imux22; + i2c23 =3D &imux23; + i2c24 =3D &imux24; + i2c25 =3D &imux25; + i2c26 =3D &imux26; + i2c27 =3D &imux27; + i2c28 =3D &imux28; + i2c29 =3D &imux29; + i2c30 =3D &imux30; + i2c31 =3D &imux31; + i2c32 =3D &imux32; + i2c33 =3D &imux33; + i2c34 =3D &imux34; + i2c35 =3D &imux35; + i2c36 =3D &imux36; + i2c37 =3D &imux37; + i2c38 =3D &imux38; + i2c39 =3D &imux39; + i2c40 =3D &imux40; + i2c41 =3D &imux41; + i2c42 =3D &imux42; + i2c43 =3D &imux43; + i2c44 =3D &imux44; + i2c45 =3D &imux45; + i2c46 =3D &imux46; + i2c47 =3D &imux47; =20 spi1 =3D &spi_gpio; }; @@ -493,23 +519,239 @@ temperature-sensor@4b { reg =3D <0x4b>; }; }; + + imux22: i2c@6 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <6>; + }; + + imux23: i2c@7 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <7>; + }; }; }; =20 &i2c3 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux24: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux25: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux26: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux27: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c4 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux28: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux29: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux30: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux31: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c5 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux32: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux33: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux34: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux35: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c6 { status =3D "okay"; + + i2c-mux@72 { + compatible =3D "nxp,pca9545"; + reg =3D <0x72>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux36: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux37: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux38: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux39: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + }; }; =20 &i2c7 { @@ -536,10 +778,102 @@ rtc@51 { =20 &i2c12 { status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9545"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux40: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux41: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux42: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux43: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + }; + }; }; =20 &i2c13 { status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9545"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + imux44: i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux45: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux46: i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + eeprom@50 { + compatible =3D "atmel,24c64"; + reg =3D <0x50>; + }; + }; + + imux47: i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + }; + }; }; =20 &i2c14 { --=20 2.34.1