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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:26 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 08/10] arm64: dts: exynos: Add initial support for exynos8895 SoC Date: Fri, 20 Sep 2024 18:45:06 +0300 Message-Id: <20240920154508.1618410-9-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Exynos 8895 SoC is an ARMv8 mobile SoC found in the Samsung Galaxy S8 (dreamlte), S8 Plus (dream2lte), Note 8 (greatlte) and the Meizu 15 Plus (m1891). Add minimal support for that SoC, including: - All 8 cores via PSCI - ChipID - Generic ARMV8 Timer - Enumarate all pinctrl nodes The devices using this SoC suffer from an issue caused by the stock Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's needed to hardcode the adequate frequency in the timer node, otherwise the kernel panics. Further platform support will be added over time. Signed-off-by: Ivaylo Ivanov --- .../boot/dts/exynos/exynos8895-pinctrl.dtsi | 1094 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynos8895.dtsi | 251 ++++ 2 files changed, 1345 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos8895.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi b/arch/arm6= 4/boot/dts/exynos/exynos8895-pinctrl.dtsi new file mode 100644 index 000000000..51e9c9c4b --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi @@ -0,0 +1,1094 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_abox { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gph3: gph3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; +}; + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + }; + + bt_hostwake: bt-hostwake-pins { + samsung,pins =3D "gpa2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie_wake: pcie-wake-pins { + samsung,pins =3D "gpa3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart1_bus: uart1-bus-pins { + samsung,pins =3D "gpa4-4", "gpa4-3", "gpa4-2", "gpa4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + wlan_host_wake: wlan-host-wake-pins { + samsung,pins =3D "gpa0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; +}; + +&pinctrl_busc { + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins =3D "gpb2-1", "gpb2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins =3D "gpb2-0"; + samsung,pin-function =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; + +&pinctrl_fsys0 { + gpi0: gpi0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpi1: gpi1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins =3D "gpi0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins =3D "gpi0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; +}; + +&pinctrl_fsys1 { + gpj0: gpj0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpj1: gpj1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + bt_btwake: bt-btwake-pins { + samsung,pins =3D "gpj1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + bt_en: bt-en-pins { + samsung,pins =3D"gpj1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins =3D "gpj1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins =3D "gpj0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins =3D "gpj0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins =3D "gpj0-3", "gpj0-4", "gpj0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + /* For Drive strength swapping */ + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; + +&pinctrl_peric0 { + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd0: gpd0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd1: gpd1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd2: gpd2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd3: gpd3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe7: gpe7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins =3D "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins =3D "gpd1-3", "gpd1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins =3D "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins =3D "gpd1-7", "gpd1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins =3D "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins =3D "gpd2-3", "gpd2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins =3D "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins =3D "gpd3-3", "gpd3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hs_i2c14_bus: hs-i2c14-bus-pins { + samsung,pins =3D "gpe6-3", "gpe6-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins =3D "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins =3D "gpd1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins =3D "gpd1-7", "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins =3D "gpd1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins =3D "gpd2-3", "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins =3D "gpd2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins =3D "gpd3-3", "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins =3D "gpd3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins =3D "gpd0-7", "gpd0-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus: uart2-bus-pins { + samsung,pins =3D "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins =3D "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus: uart3-bus-pins { + samsung,pins =3D "gpd1-7", "gpd1-6", "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins =3D "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus: uart4-bus-pins { + samsung,pins =3D "gpd2-3", "gpd2-2", "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins =3D "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus: uart5-bus-pins { + samsung,pins =3D "gpd3-3", "gpd3-2", "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins =3D "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc1: gpc1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc2: gpc2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc3: gpc3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe1: gpe1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe2: gpe2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe3: gpe3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe4: gpe4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe5: gpe5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe6: gpe6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpk0: gpk0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hrm_irq: hrm-irq-pins { + samsung,pins =3D "gpe6-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins =3D "gpc2-1", "gpc2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins =3D "gpc2-3", "gpc2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins =3D "gpc2-5", "gpc2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins =3D "gpc2-7", "gpc2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins =3D "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins =3D "gpe5-3", "gpe5-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins =3D "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins =3D "gpe1-3", "gpe1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins =3D "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins =3D "gpe1-7", "gpe1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins =3D "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins =3D "gpe2-3", "gpe2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins =3D "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins =3D "gpe2-7", "gpe2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins =3D "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins =3D "gpe3-3", "gpe3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins =3D "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins =3D "gpe3-7", "gpe3-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins =3D "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins =3D "gpe4-3", "gpe4-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins =3D "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins =3D "gpe4-7", "gpe4-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins =3D "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins =3D "gpe5-7", "gpe5-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins =3D "gpc3-3", "gpc3-2", "gpc3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins =3D "gpc3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins =3D "gpc3-7", "gpc3-6", "gpc3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins =3D "gpc3-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins =3D "gpe5-3", "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins =3D "gpe5-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins =3D "gpe1-3", "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins =3D "gpe1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins =3D "gpe1-7", "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins =3D "gpe1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins =3D "gpe2-3", "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins =3D "gpe2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins =3D "gpe2-7", "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins =3D "gpe2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins =3D "gpe3-3", "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins =3D "gpe3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins =3D "gpe3-7", "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins =3D "gpe3-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins =3D "gpe4-3", "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins =3D "gpe4-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins =3D "gpe4-7", "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins =3D "gpe4-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins =3D "gpe5-7", "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins =3D "gpe5-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart6_bus: uart6-bus-pins { + samsung,pins =3D "gpe5-3", "gpe5-2", "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins =3D "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus: uart7-bus-pins { + samsung,pins =3D "gpe1-3", "gpe1-2", "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins =3D "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart8_bus: uart8-bus-pins { + samsung,pins =3D "gpe1-7", "gpe1-6", "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins =3D "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus: uart9-bus-pins { + samsung,pins =3D "gpe2-3", "gpe2-2", "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins =3D "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus: uart10-bus-pins { + samsung,pins =3D "gpe2-7", "gpe2-6", "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins =3D "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus: uart11-bus-pins { + samsung,pins =3D "gpe3-3", "gpe3-2", "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins =3D "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus: uart12-bus-pins { + samsung,pins =3D "gpe3-7", "gpe3-6", "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins =3D "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus: uart13-bus-pins { + samsung,pins =3D "gpe4-3", "gpe4-2", "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins =3D "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus: uart14-bus-pins { + samsung,pins =3D "gpe4-7", "gpe4-6", "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins =3D "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus: uart15-bus-pins { + samsung,pins =3D "gpe5-7", "gpe5-6", "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins =3D "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_vts { + gph2: gph2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/d= ts/exynos/exynos8895.dtsi new file mode 100644 index 000000000..223ebd482 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include + +/ { + compatible =3D "samsung,exynos8895"; + #address-cells =3D <2>; + #size-cells =3D <1>; + + interrupt-parent =3D <&gic>; + + aliases { + pinctrl0 =3D &pinctrl_alive; + pinctrl1 =3D &pinctrl_abox; + pinctrl2 =3D &pinctrl_vts; + pinctrl3 =3D &pinctrl_fsys0; + pinctrl4 =3D &pinctrl_fsys1; + pinctrl5 =3D &pinctrl_busc; + pinctrl6 =3D &pinctrl_peric0; + pinctrl7 =3D &pinctrl_peric1; + }; + + arm-a53-pmu { + compatible =3D "arm,cortex-a53-pmu"; + interrupts =3D , + , + , + ; + interrupt-affinity =3D <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + /* There's no PMU model for the Mongoose cores */ + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + core1 { + cpu =3D <&cpu1>; + }; + core2 { + cpu =3D <&cpu2>; + }; + core3 { + cpu =3D <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu4>; + }; + core1 { + cpu =3D <&cpu5>; + }; + core2 { + cpu =3D <&cpu6>; + }; + core3 { + cpu =3D <&cpu7>; + }; + }; + }; + + cpu4: cpu@0 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x0>; + enable-method =3D "psci"; + }; + + cpu5: cpu@1 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x1>; + enable-method =3D "psci"; + }; + + cpu6: cpu@2 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x2>; + enable-method =3D "psci"; + }; + + cpu7: cpu@3 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x3>; + enable-method =3D "psci"; + }; + + cpu0: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x100>; + enable-method =3D "psci"; + }; + + cpu1: cpu@101 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x101>; + enable-method =3D "psci"; + }; + + cpu2: cpu@102 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x102>; + enable-method =3D "psci"; + }; + + cpu3: cpu@103 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x103>; + enable-method =3D "psci"; + }; + }; + + oscclk: osc-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-output-names =3D "oscclk"; + }; + + psci { + compatible =3D "arm,psci"; + method =3D "smc"; + cpu_off =3D <0x84000002>; + cpu_on =3D <0xc4000003>; + cpu_suspend =3D <0xc4000001>; + }; + + soc: soc@0 { + compatible =3D "simple-bus"; + ranges =3D <0x0 0x0 0x0 0x20000000>; + + #address-cells =3D <1>; + #size-cells =3D <1>; + + chipid@10000000 { + compatible =3D "samsung,exynos8895-chipid", + "samsung,exynos850-chipid"; + reg =3D <0x10000000 0x24>; + }; + + gic: interrupt-controller@10201000 { + compatible =3D "arm,gic-400"; + reg =3D <0x10201000 0x1000>, + <0x10202000 0x1000>, + <0x10204000 0x2000>, + <0x10206000 0x2000>; + #interrupt-cells =3D <3>; + interrupt-controller; + interrupts =3D ; + #address-cells =3D <0>; + #size-cells =3D <1>; + }; + + pinctrl_peric0: pinctrl@104d0000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x104d0000 0x1000>; + interrupts =3D ; + }; + + pinctrl_peric1: pinctrl@10980000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x10980000 0x1000>; + interrupts =3D ; + }; + + pinctrl_fsys0: pinctrl@11050000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x11050000 0x1000>; + interrupts =3D ; + }; + + pinctrl_fsys1: pinctrl@11430000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x11430000 0x1000>; + interrupts =3D ; + }; + + pinctrl_abox: pinctrl@13e60000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x13e60000 0x1000>; + }; + + pinctrl_vts: pinctrl@14080000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x14080000 0x1000>; + }; + + pinctrl_busc: pinctrl@15a30000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x15a30000 0x1000>; + interrupts =3D ; + }; + + pmu_system_controller: system-controller@16480000 { + compatible =3D "samsung,exynos8895-pmu", + "samsung,exynos7-pmu", "syscon"; + reg =3D <0x16480000 0x10000>; + }; + + pinctrl_alive: pinctrl@164b0000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x164b0000 0x1000>; + + wakeup-interrupt-controller { + compatible =3D "samsung,exynos8895-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + /* Hypervisor Virtual Timer interrupt is not wired to GIC */ + interrupts =3D , + , + , + ; + /* + * Non-updatable, broken stock Samsung bootloader does not + * configure CNTFRQ_EL0 + */ + clock-frequency =3D <26000000>; + }; +}; + +#include "exynos8895-pinctrl.dtsi" +#include "arm/samsung/exynos-syscon-restart.dtsi" --=20 2.34.1