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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:17 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 01/10] dt-bindings: arm: cpus: Add Samsung Mongoose M2 Date: Fri, 20 Sep 2024 18:44:59 +0300 Message-Id: <20240920154508.1618410-2-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a compatible for the Samsung Mongoose M2, found in exynos8895. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index f308ff6c3..e41a8aec6 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -206,6 +206,7 @@ properties: - qcom,kryo780 - qcom,oryon - qcom,scorpion + - samsung,mongoose-m2 =20 enable-method: $ref: /schemas/types.yaml#/definitions/string --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A924A61FCF; Fri, 20 Sep 2024 15:45:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847123; cv=none; b=RPJ+RrdR7h0Ne4ybgcpD8cKm5FtXtxAZJCehzH6LiE5C3e8qqyLJ8XrBy0cQU/wBULWyvjMueBB0phF7nWzeockga18N+LvpD/LnyNbVIo+j6L5ay7bxmvqdQ6nNSMV4Qa2nlGI+7UpvWegxz1MdvEi1UMWZJKHVkbA4oj4KG14= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847123; c=relaxed/simple; bh=yg4lWFLsux2GkZkTBE5nid/8euszrOUu40JI4Fymam4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eRHOstsiyNBlS58dKTQXk7i9/THgO1YT7U75NEDS7RydN7r7boiCsAdOwPpjFoAQYbWXLFVWK2Tf3+7WYLeM/XHbqxQ0+CUezd95mkGiJxrUjOJKIiFttvBodU8W1ani0obxW3cNWYcCh2H4Mcn9Ai7x1SXS93UzgbJyJPnQe2U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OEJThr2S; arc=none smtp.client-ip=209.85.221.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OEJThr2S" Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-375e5c12042so1236112f8f.3; Fri, 20 Sep 2024 08:45:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847120; x=1727451920; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gFTIk59DfHte/4Im9/5rXIn7HhETWJ2FxxMWTmfCArg=; b=OEJThr2SIO8zGRIVL8Baz+dVGqVF1EcKMRYZI82XSf1boaNUdf6Z8efZ+dANRBXwEK fnOa1jlcoC9HKRJTo+I4GqC6qEH51lq1M+qoFPKmTzly905Cq7Fceb2ZqeOaNYSq8YTC gD+vKTkN/XWVV3LPS23mN6t1JmcsWP774UHW25hro2yOgthG5B3eIiWBGCMpOSoNPxKb bACm7q9maYpPncYWa61ezp9hPd6TWPDNp5oUNN/ttH6zAXRHkZu4gzxnAPgpU9s3hTXP 3Gj9nxHLLOLEC54xAEA07lRaDgOCbmQU6yt5ehBel2X7qb5zX7SO9cBhpj/vhg/56OK0 US6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847120; x=1727451920; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gFTIk59DfHte/4Im9/5rXIn7HhETWJ2FxxMWTmfCArg=; b=fn/gfDjmotjcUIHnZOajViOkBjm361q/xIe2/pzbN37WsMZWg95A88JmvNwH3FdXbu RE89lif0NUb3uZXcswWIgjY+FLasuARt6gmY1EL1Hhg+nnyOTBNoPGe61AZA5Iyy7T3A No1BNagaOfnlYoSkGKFU9XqVB2B7+pcp4slYu+NFXJai44jvv1ujwAr2BdFrZ9+b4kSd kygjju/hD9Yv4XrGD/Ddm//la32mRyETRz/7vaD87vNhuvu6q22w68vj0971W1gOVcyH ud+RgD2LnS6CdQwFBObNKqsgHQedUxdBgwvSsBsJkdV3pjiuEjwHwcqHCv65JoFGYKXN JNaw== X-Forwarded-Encrypted: i=1; AJvYcCUuCSq+Vwl/fzrTkMglocAQ3NAZmhmsnG+tWsqEZEEsv418exjv3yPGVFkMcNDN6hBroBKOqS9eiYF6yiim@vger.kernel.org, AJvYcCVHj9i5AfweLwMtpQAQ3B8r7VyXP3tc4ygwPCbSn4uYOz3a/pgxSHSagxC7h0xf4a6vwT4fCUJWdHhkBQ==@vger.kernel.org, AJvYcCXU7erJhdpz7YHyrQawLjUtIwtkNT2GXM61Pfc3XkwK2MEubjnXrmZM/gc0Gi2jMeUOqEGoOgun3ht9@vger.kernel.org X-Gm-Message-State: AOJu0YyvmMsJJe7JFhJFLXYUXJq3+Z1+Y3xA8/tIaaFx/qL/j3ZDgtcX GPm3OyahTUXSuaP9YglAmob6JalMMZWYos7wKvgP5bew6tEAw4ST X-Google-Smtp-Source: AGHT+IE1ed1khk3cPITwLgrPUAHSUd1bpo4PNU0Pry7ekwp7U0jekLc5F8l2SdED6qS6d0yr98kx9A== X-Received: by 2002:a5d:6d0b:0:b0:378:c2f3:defd with SMTP id ffacd0b85a97d-37a4226bbd5mr2397173f8f.13.1726847119790; Fri, 20 Sep 2024 08:45:19 -0700 (PDT) Received: from ivaylo-desktop.. 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Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid= .yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml index 780ccb5ee..c50ee587d 100644 --- a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -23,6 +23,7 @@ properties: - items: - enum: - samsung,exynos7885-chipid + - samsung,exynos8895-chipid - samsung,exynosautov9-chipid - samsung,exynosautov920-chipid - const: samsung,exynos850-chipid --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94C5B76026; Fri, 20 Sep 2024 15:45:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847124; cv=none; b=Qf5FGkFUaiDQeMyedZX/WKHKJ3qRxWkb8e230cTzr4r7ULkbfZFm1eHuKAmQQs2mET7Z6PU0y/FGPe9leY3C4WwL6ckM3vAS6vqTgNdZ6On3wBjSlMMWw/SUEJ+x0ZKrmVyK1asalZEydvB4G73GtgV8fvAAjMdOmNTN9+4BIPA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847124; c=relaxed/simple; bh=Vbr+qL+l9qgGtP9JjdPcKkgCw59+u/mbHPDbfem2cKA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=e9rLR2Ar5q1lakkIlUmvQ6WzfchHFouA3kiQLVUA8pg2IDfASeWHh4eSIUUjIKVm2HZbykghx8DpvHTRTS77wCDGB7t20/uUwNg3tvoTHe8tTlqF14fJmjRBP9ZMrCg7R53ocdGkBkZ0lXALXHFkR1OQNoDkQQhZdDRCS32T2ZI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=iTspKijT; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iTspKijT" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-42cafda818aso19964125e9.2; Fri, 20 Sep 2024 08:45:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847121; x=1727451921; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2rZEHFg7e16eJD/BbJaGTYxJQBlSimzLkdBWE2FUz+w=; b=iTspKijTQzU0mrLRgKd7IxbyVYiLDPDg6P94Rj4T3Z0A3nzzmip2lZA7T8I6ptNPaU SMW03Olig1r9xCKmD0nKiXDFko26buZ12sKxpYU5BjnHym5Cl6bXFs83yQsq1T7/WTNP YyC0O9K+cAgzndc/IvRNW1p6746fyNImoRpvCESigIqKwVV7cJjwgm27uE6TOc2SVgko dCo+VW8Wotv60reFMAYXdFJtPGVzrWRN0kN9mtN68wBE+fItQg7rth0DtEgepJDoF13F lUMMgtu2nNaTEAzkhplyW66n3NqblGDOqfJetqiKbdj2/f/8WN0GXhb8YOBBlcTwMPgB C2jA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847121; x=1727451921; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2rZEHFg7e16eJD/BbJaGTYxJQBlSimzLkdBWE2FUz+w=; b=DiaYONPvCr4Uc+zyP12kEKMNAeZsMVAMtfZ3AQvRycNz4bkVQBMgkggAmpWGq58t2T IzX4nCXsi7rt0B0ZgJVs3GYwwn4B8i+bKTcPS3bhZmaEE32XnSGsatjr2+4tORqBGQz2 AEXzJe3ZaD793k902HKkeVpcgvJTYqpKaWMkTeqDSdhy+fU073aCjf9j/W6wWlIF7lrC fSZauIzaPCbiVzObd+6HjMMm/ocJs26spzkQSo7NwsljDvWIN6rMCGL/D/MSbqDz6UaO RHLhqAup9K641qYZvVDWweZScs12Y345tyWPACKmr4nEJ10VhmKZnc5zRj2aMEaKbjtT TL8A== X-Forwarded-Encrypted: i=1; AJvYcCWf6LQeHBw6iPlHlZ4xzZEQ1M3MLU4a6EQ7cs5eJEZ0jOPy5YBmYiUxn04YVDHI4329Ho6PeJserFAo@vger.kernel.org, AJvYcCWkwVJNjNXwh8GthX5Ls4Ebnvr7G/h8DhiOb3XsoZgXNQobgnKFaHAtLGIyqZjwJPzW95XBb5LTopdt1KMc@vger.kernel.org, AJvYcCXu/5ue7u7ptmFVqi8meCKeQczdaIE675Lre+irabeorOGXcEpsvLlZvXf0To/hsp4hfFGbmlVWxzV7rg==@vger.kernel.org X-Gm-Message-State: AOJu0YyWsxUd+aDrurdUoeeG6bsUo8Dj5PgYbfZEiu7wxXVpp7d3FEI+ 6p7nieUvkr7rla9EUPD7FFfvm1CzIQdQODCWaTf77apwdLrMJJiK X-Google-Smtp-Source: AGHT+IGWeXNIuIG9gYDvIgB/DnpHPdXOOE1VrSnd3E2Ga9eTS82mq04xru/wUMWY2I5i9AO3i/Ampg== X-Received: by 2002:a5d:52c8:0:b0:374:c943:4c0f with SMTP id ffacd0b85a97d-37a42fd83a4mr1621330f8f.0.1726847120911; Fri, 20 Sep 2024 08:45:20 -0700 (PDT) Received: from ivaylo-desktop.. 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This SoC product id is "0xE8895000". Signed-off-by: Ivaylo Ivanov --- drivers/soc/samsung/exynos-chipid.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exyn= os-chipid.c index b1118d377..9e00ac8de 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -58,6 +58,7 @@ static const struct exynos_soc_id { /* Compatible with: samsung,exynos850-chipid */ { "EXYNOS7885", 0xE7885000 }, { "EXYNOS850", 0xE3830000 }, + { "EXYNOS8895", 0xE8895000 }, { "EXYNOSAUTOV9", 0xAAA80000 }, { "EXYNOSAUTOV920", 0x0A920000 }, }; --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9D4A17F4FF; Fri, 20 Sep 2024 15:45:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847125; cv=none; b=LFlt4BO6yPsNIsFCKZ20AO4RXlrGwJt4OsSG1mZ3Dge9/huqTaG4dO1ghCEy5iOhANFGEkR7H2SsPq0GGPqzFvQMMxVhQ9xvjcBiTrlchSnxa0Jazv8dBeE1RU9XTfehlQ6sVxSsXpik7oTmMCRVb6meK2aIV+xxuPdCB8YDJsA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847125; c=relaxed/simple; bh=XFqNXWfoDdVeLv5iAXvv8K8NiB1OTi9K5Op5H7O1Cgk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LTTQykFltjRyV6qgvrWQO2WHjo+1hk8tau2lxQK5wi71+JpzpX7cXYDlVr7dythdMJ1i1YF+UlITwqU0V1pDUyTPeSF44CJow/H/94y7uuI48e+OI5DgeiMVCWN8hUFacO7APetNN4td009rP2HQ97kLFqbY7uixVXOQ4fr2vEg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ggJZ1mCC; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ggJZ1mCC" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-374c8cef906so1584438f8f.2; Fri, 20 Sep 2024 08:45:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847122; x=1727451922; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6qVPLy9dlWIYmTbgpc5KiQogqTuKE0fYNGqHvBezkSw=; b=ggJZ1mCCrXPwfbWpCOXEwPkznLD/PIQ5hVfxmcEl5dGwiYrdW+Sqtri5/O+dDY8rhm f6AYjj3tnq+HonX+BYxBpptA4uv2hQK0fEDH2rLBslqr+X65B4zaaLxQSpG7zLHxYfdk pCi9XlEbBUO+Kn8YsD3UlXqvqAGSU8rY0raU41FTVVpObqKNd7ZFpdb2gs2zmwAAGfaE TF++DduLOb59Mvrkk7sBF4vxe7cf5FZnH6pRcKURMTW63er8/xPwvTekSD3ncK1hNtxl SgxlEtmtmsSmj3XXmVHw1tBhJdXTHFPpouURZ5cRIcItL9G0QIg9+kIeV88IwhVTCeHb KzMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847122; x=1727451922; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6qVPLy9dlWIYmTbgpc5KiQogqTuKE0fYNGqHvBezkSw=; b=IcU1NjG7xyI+F7Zn0OAdfOfepnJeh1jYhPiFtieXy/bVqngp76ibw6V4GUmn+u0rxP FyixzvZI6kC8y1d5E4GkmvEkFpNr9WlvE8X6v6JwD58J3pHY/BWPvaxT8O4c+OI5rxQS +/n2mz3Kyz0Y0eVnGnSEMgWuDfwoYJrJgli9Rnwcc5q6r7S4SGvqB0asjJ2YqEYndWzD DiztXBCKPwf6NstJns48AxDsIg/h5NIhRLThtYKUnylLkQq0lpJRsCNBjNd13rx1RwYY oo0zfE9H4iZEqYsW+XioUBTFJ5MZfLG5wRF2GX7GYEPmQK937/HdVhIbAfCRER20fp8H go2g== X-Forwarded-Encrypted: i=1; AJvYcCUv4VjwZ2OnFDHGMCdZnDkEsJ3CZzOs+ei/g8YWH2uuo6o9Aj52oXmPL3ZutxM0IK+WkNSJsauFj7Sk@vger.kernel.org, AJvYcCWEggLb3Qq3XUT+d1JTRPY4GPDKHtxlZtInb07fDmCj3jQmL6UarRPdpibjYPzid1Muga4YNnDuIuOkYa8V@vger.kernel.org, AJvYcCXedq58x/wK1qW7CfkC7mabSYy9Ijkuw+v22/+9uAf6vbE89a7pPcnz6Bag1pQt31PDg5IPpEcVZ8AyHg==@vger.kernel.org X-Gm-Message-State: AOJu0YwAgp0haXpavw3TwEf6dMgb2G8LPivs9Ud/8jjWtb/3QH4PDF6s dAN990SyVTX91dnsG+uscXgct+54V5DgJQgUfTiA2q4V/Ohz+pvqZyPhxg== X-Google-Smtp-Source: AGHT+IG5WkOSAk/k4BZRwCTmyMBVUtAMJmwUS8aOGGACOJnHVq+ZwEzLRH1Ytd91eUL9XsKCZjTlww== X-Received: by 2002:adf:fb83:0:b0:374:c142:80e7 with SMTP id ffacd0b85a97d-37a4312aa35mr2034369f8f.1.1726847122056; Fri, 20 Sep 2024 08:45:22 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:21 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 04/10] dt-bindings: pinctrl: samsung: Add compatible for Exynos8895 SoC Date: Fri, 20 Sep 2024 18:45:02 +0300 Message-Id: <20240920154508.1618410-5-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatible for Exynos8895 SoC. Signed-off-by: Ivaylo Ivanov Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml= b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index 242dd13c2..a2af2c88a 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -53,6 +53,7 @@ properties: - samsung,exynos7-pinctrl - samsung,exynos7885-pinctrl - samsung,exynos850-pinctrl + - samsung,exynos8895-pinctrl - samsung,exynosautov9-pinctrl - samsung,exynosautov920-pinctrl - tesla,fsd-pinctrl --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC78C1836D5; Fri, 20 Sep 2024 15:45:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847127; cv=none; b=VFddvUGIVlj3tR8l/fVkCiCRb48tvfCWJzzEKo9G/vz6ULQR0RFvJ6/lhrHNlBLpxVmPqyzUYCuRXrObBMnU489BkMIi8Uuv3E7VcmjGhg/Puyt3RtMQV4eA6dEoi0zdblYja8LQxoxENuu7DyvoTOy/aeeFihs0SG3c8nNoIoE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847127; c=relaxed/simple; bh=nnMkvC+XyAEuuDZwwUqBlYeRO0rng1N8j2RJ08IlFZE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OHOHEK25EWnkw0STWe39DA880Jp0tq1h0xj/Phq///+0jqhv3rDH520V4OlK+wQWFfhwTZkvZh4+fJ2EYcbcskfGaMuT2haSzcRQLAQv/Pmwowfe9EHL9qMO3GbegZz7MoMTKcrKXN6QO9JgGPTINMTMnCod2dqzjSWgGwHFv4E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Fu9Ubp1F; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Fu9Ubp1F" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-42ca6ba750eso14046445e9.0; Fri, 20 Sep 2024 08:45:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847123; x=1727451923; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aWhPgj6558rBvnUEezBxFowaJstUqM0WjuWqL552jj0=; b=Fu9Ubp1FvxGloUUNebeguzN8TGnO3d6JhHILzuYHEUjR4ltKBF2W98DY029S5/giZx KRbGGYiB45FgdYVBxkkM13HZwT+4ipj5j2z49215oOvBeDJSroEgJZ17WJXENKXblNFQ nSwzNGLGFT+vtWPKxll3WD8fsNskJBiFgBvEkTJ0+SE2PhZ1kS2YXKv4smEgMP1RMvZK 0+/2+JAY/YOcXQZX0uicAayosnt5HlUYrUAzlFqLxA6xUK5/o7BYZYbB5g3sGM6tzIt+ sWrBQFRr1UW3kP7PV1tRqZM4I897OOOJGQZR9C58jZblIk6hQGyw8v5jlTslcVhZpS5M b/LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847123; x=1727451923; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aWhPgj6558rBvnUEezBxFowaJstUqM0WjuWqL552jj0=; b=LGJK3xqqVNFHqEC1JV8nlPErtXoAt5BG13wMLuKghJ2FeNGEFDqi9p92SFB0ukqTvx a9m5U7INEJ5aHDVIbbLjNrXIgRXlLEXlvKb9nQ33qsSd6Nin+23OIN0Juf7/1hkIdSj5 QRCMN2YqXdVkE8F2cF5T9xSDqKtSf+3PuzLzKPZRJBlmBVHEq9Q+GeosZshH4hk+CCqi lToXY6EogXxqvp09wr9pBGa/pWqMCGLhgpiv2rT8LeQOxXHF4oUdAVA1i1nWryqybAOs //uV5SwEppVuHGEJRq88IY9XWRLRBjMJLX+wT6v1AjHO/ouLkOBCwWXfXSS7WljT1L6Q JXrQ== X-Forwarded-Encrypted: i=1; AJvYcCX+OwkASu1CpfWLnJWVmXSAwgnI8MjGaiWj0UyJIaFdIqkAuYIbQ/crVKVMqtAZywXI/hxIk4vmGQ2IDJbR@vger.kernel.org, AJvYcCXA+Ty6ZKtVt/QVeePlQygvql/WhlOAVVvM+NV3O0tGZ+912nvcdXnsCOMMjFepKyc2PY65DlzaH66B@vger.kernel.org, AJvYcCXd+99EcAR9TTHsXQHMdL4jsUJ5gFZEmn+Cqt+eEU/9VWwb0s/lqF1RhDdLa02s281Y1Fj4Ugyt4Mn8Ug==@vger.kernel.org X-Gm-Message-State: AOJu0YzPfZ9RcdTZRjFPF1wdMawL98IoABgRV/2mlAmVebNTDPl55D7Q rpS1KrDE1EzQfOeBTj+w8dfTVJQTaPz+IYmNJY8xbnVyleMR7gSZ X-Google-Smtp-Source: AGHT+IHe2Nu21F7SsC/q8zSh0YQtEiShm36QF3fGRp7z0aDsLZDf8uGaAr2Zlv3MWvEvih4+KnruzQ== X-Received: by 2002:a05:600c:4f53:b0:42c:bd4d:e8d6 with SMTP id 5b1f17b1804b1-42e7a8c1d04mr22155275e9.3.1726847123223; Fri, 20 Sep 2024 08:45:23 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:22 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 05/10] pinctrl: samsung: Add exynos8895 SoC pinctrl configuration Date: Fri, 20 Sep 2024 18:45:03 +0300 Message-Id: <20240920154508.1618410-6-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the pin-controller found on the Exynos8895 SoC used in Samsung Galaxy S8 and S8 Plus phones. It has a newly applied pinctrl register layer for FSYS0 with a different bank type offset that consists of the following bit fields: CON: 4, DAT: 1, PUD: 2, DRV: 3, CONPDN: 2, PUDPDN: 2 Signed-off-by: Ivaylo Ivanov Reviewed-by: Sam Protsenko --- .../pinctrl/samsung/pinctrl-exynos-arm64.c | 137 ++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-exynos.h | 10 ++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 4 files changed, 150 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinct= rl/samsung/pinctrl-exynos-arm64.c index 5480e0884..c5df4f1bc 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -58,6 +58,15 @@ static const struct samsung_pin_bank_type exynos850_bank= _type_alive =3D { .reg_offset =3D { 0x00, 0x04, 0x08, 0x0c, }, }; =20 +/* + * Bank type for non-alive type. Bit fields: + * CON: 4, DAT: 1, PUD: 2, DRV: 3, CONPDN: 2, PUDPDN: 2 + */ +static const struct samsung_pin_bank_type exynos8895_bank_type_off =3D { + .fld_width =3D { 4, 1, 2, 3, 2, 2, }, + .reg_offset =3D { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, +}; + /* Pad retention control code for accessing PMU regmap */ static atomic_t exynos_shared_retention_refcnt; =20 @@ -866,6 +875,134 @@ const struct samsung_pinctrl_of_match_data exynosauto= v920_of_data __initconst =3D .num_ctrl =3D ARRAY_SIZE(exynosautov920_pin_ctrl), }; =20 +/* pin banks of exynos8895 pin-controller 0 (ALIVE) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks0[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0x080, "gpa3", 0x0c), + EXYNOS_PIN_BANK_EINTW(7, 0x0a0, "gpa4", 0x24), +}; + +/* pin banks of exynos8895 pin-controller 1 (ABOX) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks1[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gph0", 0x00), + EXYNOS_PIN_BANK_EINTG(7, 0x020, "gph1", 0x04), + EXYNOS_PIN_BANK_EINTG(4, 0x040, "gph3", 0x08), +}; + +/* pin banks of exynos8895 pin-controller 2 (VTS) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks2[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTG(3, 0x000, "gph2", 0x00), +}; + +/* pin banks of exynos8895 pin-controller 3 (FSYS0) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks3[] __initco= nst =3D { + EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpi0", 0x00), + EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpi1", 0x04), +}; + +/* pin banks of exynos8895 pin-controller 4 (FSYS1) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks4[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpj1", 0x00), + EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpj0", 0x04), +}; + +/* pin banks of exynos8895 pin-controller 5 (BUSC) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks5[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpb2", 0x00), +}; + +/* pin banks of exynos8895 pin-controller 6 (PERIC0) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks6[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpd0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpd1", 0x04), + EXYNOS_PIN_BANK_EINTG(4, 0x040, "gpd2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpd3", 0x0C), + EXYNOS_PIN_BANK_EINTG(4, 0x080, "gpb1", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpe7", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf1", 0x18), +}; + +/* pin banks of exynos8895 pin-controller 7 (PERIC1) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks7[] __initco= nst =3D { + EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpb0", 0x00), + EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpc0", 0x04), + EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpc1", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpc2", 0x0C), + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpc3", 0x10), + EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpk0", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpe5", 0x18), + EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpe6", 0x1C), + EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe2", 0x20), + EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpe3", 0x24), + EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpe4", 0x28), + EXYNOS_PIN_BANK_EINTG(4, 0x160, "gpf0", 0x2C), + EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpe1", 0x30), + EXYNOS_PIN_BANK_EINTG(2, 0x1a0, "gpg0", 0x34), +}; + +static const struct samsung_pin_ctrl exynos8895_pin_ctrl[] __initconst =3D= { + { + /* pin-controller instance 0 ALIVE data */ + .pin_banks =3D exynos8895_pin_banks0, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks0), + .eint_gpio_init =3D exynos_eint_gpio_init, + .eint_wkup_init =3D exynos_eint_wkup_init, + .suspend =3D exynos_pinctrl_suspend, + .resume =3D exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 ABOX data */ + .pin_banks =3D exynos8895_pin_banks1, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks1), + }, { + /* pin-controller instance 2 VTS data */ + .pin_banks =3D exynos8895_pin_banks2, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks2), + .eint_gpio_init =3D exynos_eint_gpio_init, + }, { + /* pin-controller instance 3 FSYS0 data */ + .pin_banks =3D exynos8895_pin_banks3, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks3), + .eint_gpio_init =3D exynos_eint_gpio_init, + .suspend =3D exynos_pinctrl_suspend, + .resume =3D exynos_pinctrl_resume, + }, { + /* pin-controller instance 4 FSYS1 data */ + .pin_banks =3D exynos8895_pin_banks4, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks4), + .eint_gpio_init =3D exynos_eint_gpio_init, + .suspend =3D exynos_pinctrl_suspend, + .resume =3D exynos_pinctrl_resume, + }, { + /* pin-controller instance 5 BUSC data */ + .pin_banks =3D exynos8895_pin_banks5, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks5), + .eint_gpio_init =3D exynos_eint_gpio_init, + .suspend =3D exynos_pinctrl_suspend, + .resume =3D exynos_pinctrl_resume, + }, { + /* pin-controller instance 6 PERIC0 data */ + .pin_banks =3D exynos8895_pin_banks6, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks6), + .eint_gpio_init =3D exynos_eint_gpio_init, + .suspend =3D exynos_pinctrl_suspend, + .resume =3D exynos_pinctrl_resume, + }, { + /* pin-controller instance 7 PERIC1 data */ + .pin_banks =3D exynos8895_pin_banks7, + .nr_banks =3D ARRAY_SIZE(exynos8895_pin_banks7), + .eint_gpio_init =3D exynos_eint_gpio_init, + .suspend =3D exynos_pinctrl_suspend, + .resume =3D exynos_pinctrl_resume, + }, +}; + +const struct samsung_pinctrl_of_match_data exynos8895_of_data __initconst = =3D { + .ctrl =3D exynos8895_pin_ctrl, + .num_ctrl =3D ARRAY_SIZE(exynos8895_pin_ctrl), +}; + /* * Pinctrl driver data for Tesla FSD SoC. FSD SoC includes three * gpio/pin-mux/pinconfig controllers. diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/sam= sung/pinctrl-exynos.h index 305cb1d31..7b7ff7ffe 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.h +++ b/drivers/pinctrl/samsung/pinctrl-exynos.h @@ -141,6 +141,16 @@ .name =3D id \ } =20 +#define EXYNOS8895_PIN_BANK_EINTG(pins, reg, id, offs) \ + { \ + .type =3D &exynos8895_bank_type_off, \ + .pctl_offset =3D reg, \ + .nr_pins =3D pins, \ + .eint_type =3D EINT_TYPE_GPIO, \ + .eint_offset =3D offs, \ + .name =3D id \ + } + #define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, con_offs, mask_offs, pend= _offs) \ { \ .type =3D &exynos850_bank_type_off, \ diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/sa= msung/pinctrl-samsung.c index 675efa5d8..86c7de109 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1477,6 +1477,8 @@ static const struct of_device_id samsung_pinctrl_dt_m= atch[] =3D { .data =3D &exynos7885_of_data }, { .compatible =3D "samsung,exynos850-pinctrl", .data =3D &exynos850_of_data }, + { .compatible =3D "samsung,exynos8895-pinctrl", + .data =3D &exynos8895_of_data }, { .compatible =3D "samsung,exynosautov9-pinctrl", .data =3D &exynosautov9_of_data }, { .compatible =3D "samsung,exynosautov920-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/sa= msung/pinctrl-samsung.h index a1e7377bd..dc930d620 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -384,6 +384,7 @@ extern const struct samsung_pinctrl_of_match_data exyno= s5433_of_data; extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; +extern const struct samsung_pinctrl_of_match_data exynos8895_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; extern const struct samsung_pinctrl_of_match_data fsd_of_data; --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EC86184539; Fri, 20 Sep 2024 15:45:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847129; cv=none; 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:24 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 06/10] dt-bindings: pinctrl: samsung: add exynos8895-wakeup-eint compatible Date: Fri, 20 Sep 2024 18:45:04 +0300 Message-Id: <20240920154508.1618410-7-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a dedicated compatible for exynos8895. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Acked-by: Linus Walleij --- .../bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wake= up-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinct= rl-wakeup-interrupt.yaml index 4dfb49b0e..91516fedc 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-inte= rrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-inte= rrupt.yaml @@ -42,6 +42,7 @@ properties: - samsung,exynos5433-wakeup-eint - samsung,exynos7885-wakeup-eint - samsung,exynos850-wakeup-eint + - samsung,exynos8895-wakeup-eint - const: samsung,exynos7-wakeup-eint - items: - enum: --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75C0117C224; Fri, 20 Sep 2024 15:45:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847129; cv=none; b=DRTu9O+5LwtyWFTalRJYtR6E65lRoQTNtyjFwCGc0hkqletjOG66JlF3k2GGHcSbhaloVZurDKzq5UOlTFNxm1XwqMnSaIRLZ+zOwQVD10a4DroZGvzeMk9xqRvNSAX8+nGIPPU+C/ugKu4JrrLquzZnE/1FBxPFiuIwOWVBnUk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847129; c=relaxed/simple; bh=AiWC3ZfhqL6ldc1FB2y26ZdRa35WGsVGr4Q8zOs9JoA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=V17J/+cJBpZmMuEkLjIVwAl79qYOpRqdW7UlDNblt8/IfAHUhQ4Vb9MCHWN+ysDvW1nO7N1CszkDs+9D7Vn9KSYkbIQcum36lfxlQow/x7cHvDQlktzvHNKRqPRZhs6wLSs8Kwd/0xsbDkpG2YnCvgvmfTDtsMOVLvkePV7Jrag= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SJNmp6+6; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SJNmp6+6" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-42cb2191107so17827885e9.1; Fri, 20 Sep 2024 08:45:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847126; x=1727451926; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CS4Hn7bIf4a0dCsNyQ0Lh+IAlZYQwZkw+bfpG9czwyA=; b=SJNmp6+6RJbp1JUq6UAlkDPuNQrJrvQIT4zKwn64TSp3SSwpqAt7z7G/PrcTduKqVu 3+ZjzsS0RPRw4VdV1ALnPFGCVpyLHmX5m+jU2E/Kop7+PPsIwq5ZBHV03iPbWn96+z15 MRox5M1k+IqeaLjZywREqCAKDtctPgliZMiAMcqaoGe3eQJ2TiT3IFnWpwAJXHlvQNEj 8GXyW2Rrh5yksud72r82ySrsciCxwaI1pkdyrZ/lt2q19oIKU/MFwacCzAR3wW/fAGtv ABYh9hXkF3VoFPIqHS12611mtPiz35XhAWttAjpGPD8TIW711a0dhDzjmGCRllvHonXm XP8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847126; x=1727451926; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CS4Hn7bIf4a0dCsNyQ0Lh+IAlZYQwZkw+bfpG9czwyA=; b=UFDJ5D7KGhTNpy1CPMz+ysrl0xXRiR56j/ZE37/P9hyy9Rm9qze/CnfHt/5YMBWAN5 bb1DeV98sl2C/hX5wXOmOHyXmMjvCY7F6SYGl/diQTeTUxhBtG+Z+KWuE/TVgzZ7ds1x PAIGWMAK9R0FJQ87S1Pi0pP8As2OXO6dW8+2zTsZYvhVRbm8+tWn8cyFajFbMRnrKkrW 8c4/AZ245XyirF9I0yoWWwuksaV8Vxf4U69aELHThpoBl04b6G7TOQS0OooJHR/P3b3L 4B64DnUX1OOmh7F7okiVCmAroMsEY2JWj4dQzWz872fzhinZsJkqcko07eNOKhdnp+Wt aT6A== X-Forwarded-Encrypted: i=1; AJvYcCV7KaFI8CCIokG4F/rOx1uhosPmtkYqzD38PqNW+n4GBAcTNFvWx0YJZLF2ahtSMNyxKBkHZ9QOBSSLVQ==@vger.kernel.org, AJvYcCXTHWpLvxf/2DwTqhBqt8rrsp+S88n9cnTDJKL87WKW1w5PMovlHMQqoScgmheYkgrvLCmu1QMGoD5ySnox@vger.kernel.org, AJvYcCXUyqhkxesJoDp2USi2QUarWph9qdy5B31bOiJF3Bi+QPYIcPZk52XeD5vkyYAdaH7jtEHq8w8rNgi3@vger.kernel.org X-Gm-Message-State: AOJu0YxqkkB+pAtrtSsefHimTHCwIthhDYXqKlmC04Mc2xUxGo6Dljdw zrxcLsHXMp/9w4p8Ee2nLzMrnvQu4AqDamUG8+yjdNGn2b4ggjt+P/LvmA== X-Google-Smtp-Source: AGHT+IHY25UpExy00pxELCZtmWL0cwgHflAc/xIQBXzfxlo1bmBjeJTb7/7+74sOTQUKIg3Dii3AAA== X-Received: by 2002:a05:600c:4ed0:b0:428:ec2a:8c94 with SMTP id 5b1f17b1804b1-42e7c165df5mr21216725e9.10.1726847125562; Fri, 20 Sep 2024 08:45:25 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:25 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 07/10] dt-bindings: soc: samsung: exynos-pmu: Add exynos8895 compatible Date: Fri, 20 Sep 2024 18:45:05 +0300 Message-Id: <20240920154508.1618410-8-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add exynos8895-pmu compatible to the bindings documentation. Since Samsung, as usual, reuses devices from older designs, use the samsung,exynos7-pmu compatible. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml = b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 15fcd8f1d..5c4ba6c65 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -53,6 +53,7 @@ properties: - items: - enum: - samsung,exynos7885-pmu + - samsung,exynos8895-pmu - samsung,exynosautov9-pmu - samsung,exynosautov920-pmu - tesla,fsd-pmu --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BE8AA184556; Fri, 20 Sep 2024 15:45:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847131; cv=none; b=nSsyNm38V/x2I8s4c6tymXeJlGdWoMGFl/KolmktWnpAsLv+X2f3Yf/nJLv7RSJwxq1RxGSUmukGo8+td44vbcLmdVZxMAtWhng2QTd8bEP/s7TKyaCRnfdZZKrtn0TTItT9Ac9evmfmvYCIiRDAltGUKeKh9i9YEFAlDlOu158= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847131; c=relaxed/simple; bh=x8/3xESKE2zvAJ0xnCHKLa52lE/a48hHn2Y5NhXTZ04=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZB+gXyiGuk0m5OEDiW0pEeniJnfm7ue+w0vp6jrxNv7Xe1g3Z3es9P6oau6RU7GwqARhYfR1TDQS+yOZpcR30GTs3Nba3JxjU0EMLBJC9P2i6eQqpI7KbqbLdmBWuiFLgEi8Hajn4hBTaFplSe0oQNIxBd2rJAXJEClyJosm3SQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=GLGB38J1; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="GLGB38J1" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-42cb806623eso18645865e9.2; Fri, 20 Sep 2024 08:45:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847127; x=1727451927; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b7Q+KjHAXWzDg5KX8y+Eo0UlkNLZ4H1BnGxMEKtXAzE=; b=GLGB38J15LD+edMtUk2zehVLuL+jLIpfGdBkkFSgQ9C+HwJWAua02NP0ZMFsBm9PjS BPoIcg+0cxYZXLxeqsL5d1JSLoH+Hk9HIWrgEH5XWBcQXhUvyBbe50jqw1zgNbt9z1s+ MdA1uwwavDoxR1zR3DOscDccPmVI+E72w3Ehx546cf7vAL70xqi3xF0amHs11+RrMB4J dfJP/64hWr8smBN5yJcXoeC43ELHStvkLDgSvp+sIi3ufaNfhZVzrn3dit3vs8Re9lOH Kd6lo5MMY1fQsN6acA5DEktB+BhToppOAEmYP5usQ4vSsxqXUhq+fLBoiuTzdHDAa/oj Xp+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847127; x=1727451927; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b7Q+KjHAXWzDg5KX8y+Eo0UlkNLZ4H1BnGxMEKtXAzE=; b=LUQtB93+N1219Ge4KK6cexqXG5jOofMtoWTimtaP53t1pykkJC1fm1WCFXt23rZrIT r/dEd1VHEDejcDkqZ8yHoFY7MHlzKIrokQV7qtif5gEqrcQPI7h5FrMLD9TkQPAq1Pus 4bJud+jLc4brkGbzC3ST29LxlTn+liYUzEmWoTVSKKC/M2fvomt83MKIYzVJDygtULvf ztvjl/tXgcrCmt/2tTcR2PtnOXAXcujtbq10Sko4s/DZGKAORq1DZMgtqRj2RPUihgrn goj+kt+CTvSdB//hGaJ1wgz//xhSgR67ByEZb7sOZ7hJIjVvZQOqrUC+I6yjgHwVj3+T Er0w== X-Forwarded-Encrypted: i=1; AJvYcCVv/4OpefZaWqUCryiYBpOFU2MjPbDbEpSntbiAssUiP+Q3j/F8F0LqRy8nn8WL5rDjmWYBq1C+gXNpAA==@vger.kernel.org, AJvYcCXKf5fHgA7XMJpCaeFlWnmDbSCYkQjGP30MpXBnts6ZG9IVdEvQUa30BBhl+ilpzavfYupcaFWi1z1zW8ps@vger.kernel.org, AJvYcCXO3inevLtYEJl4YuUwlSUNWnBGjYEa0M8du1T3dL5QThISkl9RHNPpnHe2umbgmxCTyv8P0onXD679@vger.kernel.org X-Gm-Message-State: AOJu0YzvnvQwzYoHjSjwbNrM2TtHp4IHQvEFr+cjbO72FTfC9dXhLKGw 7KVtURCGMgn6qG1Ce56n5RD87ct/l7NcRg5loI2fU4tMRVJKia5s X-Google-Smtp-Source: AGHT+IGyQuzWLMtLYqo74Ev6vJKzQFe6Ml7zH3pB5SFQXJ3lx5nknjgRnrOQ9URPVEcRT4e+I8UB3A== X-Received: by 2002:a05:600c:354a:b0:42c:c1f6:6ded with SMTP id 5b1f17b1804b1-42e7ad9afabmr23748065e9.29.1726847126852; Fri, 20 Sep 2024 08:45:26 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:26 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 08/10] arm64: dts: exynos: Add initial support for exynos8895 SoC Date: Fri, 20 Sep 2024 18:45:06 +0300 Message-Id: <20240920154508.1618410-9-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Exynos 8895 SoC is an ARMv8 mobile SoC found in the Samsung Galaxy S8 (dreamlte), S8 Plus (dream2lte), Note 8 (greatlte) and the Meizu 15 Plus (m1891). Add minimal support for that SoC, including: - All 8 cores via PSCI - ChipID - Generic ARMV8 Timer - Enumarate all pinctrl nodes The devices using this SoC suffer from an issue caused by the stock Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's needed to hardcode the adequate frequency in the timer node, otherwise the kernel panics. Further platform support will be added over time. Signed-off-by: Ivaylo Ivanov --- .../boot/dts/exynos/exynos8895-pinctrl.dtsi | 1094 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynos8895.dtsi | 251 ++++ 2 files changed, 1345 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos8895.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi b/arch/arm6= 4/boot/dts/exynos/exynos8895-pinctrl.dtsi new file mode 100644 index 000000000..51e9c9c4b --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi @@ -0,0 +1,1094 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_abox { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gph3: gph3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; +}; + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + }; + + bt_hostwake: bt-hostwake-pins { + samsung,pins =3D "gpa2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + pcie_wake: pcie-wake-pins { + samsung,pins =3D "gpa3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart1_bus: uart1-bus-pins { + samsung,pins =3D "gpa4-4", "gpa4-3", "gpa4-2", "gpa4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + wlan_host_wake: wlan-host-wake-pins { + samsung,pins =3D "gpa0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; +}; + +&pinctrl_busc { + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins =3D "gpb2-1", "gpb2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins =3D "gpb2-0"; + samsung,pin-function =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; + +&pinctrl_fsys0 { + gpi0: gpi0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpi1: gpi1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins =3D "gpi0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins =3D "gpi0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + }; +}; + +&pinctrl_fsys1 { + gpj0: gpj0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpj1: gpj1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + bt_btwake: bt-btwake-pins { + samsung,pins =3D "gpj1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + bt_en: bt-en-pins { + samsung,pins =3D"gpj1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-con-pdn =3D ; + samsung,pin-pud-pdn =3D ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins =3D "gpj1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + samsung,pin-con-pdn =3D ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins =3D "gpj0-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins =3D "gpj0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins =3D "gpj0-3", "gpj0-4", "gpj0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + /* For Drive strength swapping */ + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins =3D "gpj0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; + +&pinctrl_peric0 { + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd0: gpd0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd1: gpd1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd2: gpd2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpd3: gpd3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe7: gpe7-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins =3D "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins =3D "gpd1-3", "gpd1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins =3D "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins =3D "gpd1-7", "gpd1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins =3D "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins =3D "gpd2-3", "gpd2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins =3D "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins =3D "gpd3-3", "gpd3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hs_i2c14_bus: hs-i2c14-bus-pins { + samsung,pins =3D "gpe6-3", "gpe6-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins =3D "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins =3D "gpd1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins =3D "gpd1-7", "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins =3D "gpd1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins =3D "gpd2-3", "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins =3D "gpd2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins =3D "gpd3-3", "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins =3D "gpd3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins =3D "gpd0-7", "gpd0-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus: uart2-bus-pins { + samsung,pins =3D "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins =3D "gpd1-1", "gpd1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus: uart3-bus-pins { + samsung,pins =3D "gpd1-7", "gpd1-6", "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins =3D "gpd1-5", "gpd1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus: uart4-bus-pins { + samsung,pins =3D "gpd2-3", "gpd2-2", "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins =3D "gpd2-1", "gpd2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus: uart5-bus-pins { + samsung,pins =3D "gpd3-3", "gpd3-2", "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins =3D "gpd3-1", "gpd3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc1: gpc1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc2: gpc2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpc3: gpc3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe1: gpe1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe2: gpe2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe3: gpe3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe4: gpe4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe5: gpe5-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe6: gpe6-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpk0: gpk0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hrm_irq: hrm-irq-pins { + samsung,pins =3D "gpe6-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins =3D "gpc2-1", "gpc2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins =3D "gpc2-3", "gpc2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins =3D "gpc2-5", "gpc2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins =3D "gpc2-7", "gpc2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins =3D "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins =3D "gpe5-3", "gpe5-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins =3D "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins =3D "gpe1-3", "gpe1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins =3D "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins =3D "gpe1-7", "gpe1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins =3D "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins =3D "gpe2-3", "gpe2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins =3D "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins =3D "gpe2-7", "gpe2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins =3D "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins =3D "gpe3-3", "gpe3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins =3D "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins =3D "gpe3-7", "gpe3-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins =3D "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins =3D "gpe4-3", "gpe4-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins =3D "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins =3D "gpe4-7", "gpe4-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins =3D "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins =3D "gpe5-7", "gpe5-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins =3D "gpc3-3", "gpc3-2", "gpc3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins =3D "gpc3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins =3D "gpc3-7", "gpc3-6", "gpc3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins =3D "gpc3-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins =3D "gpe5-3", "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins =3D "gpe5-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins =3D "gpe1-3", "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins =3D "gpe1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins =3D "gpe1-7", "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins =3D "gpe1-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins =3D "gpe2-3", "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins =3D "gpe2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins =3D "gpe2-7", "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins =3D "gpe2-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins =3D "gpe3-3", "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins =3D "gpe3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins =3D "gpe3-7", "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins =3D "gpe3-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins =3D "gpe4-3", "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins =3D "gpe4-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins =3D "gpe4-7", "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins =3D "gpe4-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins =3D "gpe5-7", "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins =3D "gpe5-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + uart6_bus: uart6-bus-pins { + samsung,pins =3D "gpe5-3", "gpe5-2", "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins =3D "gpe5-1", "gpe5-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus: uart7-bus-pins { + samsung,pins =3D "gpe1-3", "gpe1-2", "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins =3D "gpe1-1", "gpe1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart8_bus: uart8-bus-pins { + samsung,pins =3D "gpe1-7", "gpe1-6", "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins =3D "gpe1-5", "gpe1-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus: uart9-bus-pins { + samsung,pins =3D "gpe2-3", "gpe2-2", "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins =3D "gpe2-1", "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus: uart10-bus-pins { + samsung,pins =3D "gpe2-7", "gpe2-6", "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins =3D "gpe2-5", "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus: uart11-bus-pins { + samsung,pins =3D "gpe3-3", "gpe3-2", "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins =3D "gpe3-1", "gpe3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus: uart12-bus-pins { + samsung,pins =3D "gpe3-7", "gpe3-6", "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins =3D "gpe3-5", "gpe3-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus: uart13-bus-pins { + samsung,pins =3D "gpe4-3", "gpe4-2", "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins =3D "gpe4-1", "gpe4-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus: uart14-bus-pins { + samsung,pins =3D "gpe4-7", "gpe4-6", "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins =3D "gpe4-5", "gpe4-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus: uart15-bus-pins { + samsung,pins =3D "gpe5-7", "gpe5-6", "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins =3D "gpe5-5", "gpe5-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + }; +}; + +&pinctrl_vts { + gph2: gph2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/d= ts/exynos/exynos8895.dtsi new file mode 100644 index 000000000..223ebd482 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include + +/ { + compatible =3D "samsung,exynos8895"; + #address-cells =3D <2>; + #size-cells =3D <1>; + + interrupt-parent =3D <&gic>; + + aliases { + pinctrl0 =3D &pinctrl_alive; + pinctrl1 =3D &pinctrl_abox; + pinctrl2 =3D &pinctrl_vts; + pinctrl3 =3D &pinctrl_fsys0; + pinctrl4 =3D &pinctrl_fsys1; + pinctrl5 =3D &pinctrl_busc; + pinctrl6 =3D &pinctrl_peric0; + pinctrl7 =3D &pinctrl_peric1; + }; + + arm-a53-pmu { + compatible =3D "arm,cortex-a53-pmu"; + interrupts =3D , + , + , + ; + interrupt-affinity =3D <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + /* There's no PMU model for the Mongoose cores */ + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu0>; + }; + core1 { + cpu =3D <&cpu1>; + }; + core2 { + cpu =3D <&cpu2>; + }; + core3 { + cpu =3D <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu4>; + }; + core1 { + cpu =3D <&cpu5>; + }; + core2 { + cpu =3D <&cpu6>; + }; + core3 { + cpu =3D <&cpu7>; + }; + }; + }; + + cpu4: cpu@0 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x0>; + enable-method =3D "psci"; + }; + + cpu5: cpu@1 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x1>; + enable-method =3D "psci"; + }; + + cpu6: cpu@2 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x2>; + enable-method =3D "psci"; + }; + + cpu7: cpu@3 { + device_type =3D "cpu"; + compatible =3D "samsung,mongoose-m2"; + reg =3D <0x3>; + enable-method =3D "psci"; + }; + + cpu0: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x100>; + enable-method =3D "psci"; + }; + + cpu1: cpu@101 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x101>; + enable-method =3D "psci"; + }; + + cpu2: cpu@102 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x102>; + enable-method =3D "psci"; + }; + + cpu3: cpu@103 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53"; + reg =3D <0x103>; + enable-method =3D "psci"; + }; + }; + + oscclk: osc-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-output-names =3D "oscclk"; + }; + + psci { + compatible =3D "arm,psci"; + method =3D "smc"; + cpu_off =3D <0x84000002>; + cpu_on =3D <0xc4000003>; + cpu_suspend =3D <0xc4000001>; + }; + + soc: soc@0 { + compatible =3D "simple-bus"; + ranges =3D <0x0 0x0 0x0 0x20000000>; + + #address-cells =3D <1>; + #size-cells =3D <1>; + + chipid@10000000 { + compatible =3D "samsung,exynos8895-chipid", + "samsung,exynos850-chipid"; + reg =3D <0x10000000 0x24>; + }; + + gic: interrupt-controller@10201000 { + compatible =3D "arm,gic-400"; + reg =3D <0x10201000 0x1000>, + <0x10202000 0x1000>, + <0x10204000 0x2000>, + <0x10206000 0x2000>; + #interrupt-cells =3D <3>; + interrupt-controller; + interrupts =3D ; + #address-cells =3D <0>; + #size-cells =3D <1>; + }; + + pinctrl_peric0: pinctrl@104d0000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x104d0000 0x1000>; + interrupts =3D ; + }; + + pinctrl_peric1: pinctrl@10980000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x10980000 0x1000>; + interrupts =3D ; + }; + + pinctrl_fsys0: pinctrl@11050000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x11050000 0x1000>; + interrupts =3D ; + }; + + pinctrl_fsys1: pinctrl@11430000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x11430000 0x1000>; + interrupts =3D ; + }; + + pinctrl_abox: pinctrl@13e60000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x13e60000 0x1000>; + }; + + pinctrl_vts: pinctrl@14080000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x14080000 0x1000>; + }; + + pinctrl_busc: pinctrl@15a30000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x15a30000 0x1000>; + interrupts =3D ; + }; + + pmu_system_controller: system-controller@16480000 { + compatible =3D "samsung,exynos8895-pmu", + "samsung,exynos7-pmu", "syscon"; + reg =3D <0x16480000 0x10000>; + }; + + pinctrl_alive: pinctrl@164b0000 { + compatible =3D "samsung,exynos8895-pinctrl"; + reg =3D <0x164b0000 0x1000>; + + wakeup-interrupt-controller { + compatible =3D "samsung,exynos8895-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + interrupt-parent =3D <&gic>; + interrupts =3D ; + }; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + /* Hypervisor Virtual Timer interrupt is not wired to GIC */ + interrupts =3D , + , + , + ; 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:27 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 09/10] dt-bindings: arm: samsung: Document dreamlte board binding Date: Fri, 20 Sep 2024 18:45:07 +0300 Message-Id: <20240920154508.1618410-10-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add binding for the Samsung Galaxy S8 (SM-G950F) board, which is based on the Samsung Exynos8895 SoC. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.y= aml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 01dcbd8aa..49884a7ab 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -224,6 +224,12 @@ properties: - winlink,e850-96 # WinLink E850-96 - const: samsung,exynos850 =20 + - description: Exynos8895 based boards + items: + - enum: + - samsung,dreamlte # Samsung Galaxy S8 (SM-G9= 50F) + - const: samsung,exynos8895 + - description: Exynos Auto v9 based boards items: - enum: --=20 2.34.1 From nobody Fri Nov 29 10:31:49 2024 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDA14185B6F; Fri, 20 Sep 2024 15:45:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847133; cv=none; b=Ro6J/KhNJesI9+J4oRz9Mj5DhKfKkFlnau9tNHKxeMxLF9eAWPmlrYqfzQgmFQ1iRzg2qeoBABEMx4U19uv3z05fx/0vQs43GFFEIW3AVVO2YtdAWPOMdnIjD4ukyNSZdhTqpvrLRBC/BD4eYJXzGWTP2WhAFIUklrm7xpzlR0k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726847133; c=relaxed/simple; bh=Z7xGCT06OCZ/m+rGKk5QoYgmcvYZaPJ7LbrMKN+waiw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Q5+Lhl0WHAMmdlxsm/N4gxA/xWMFFmo7PkyLOOCHMzMRKpPaZ208q15aUjnkm6CQN1/lmcyWbma8GV/q5GXlMKUE2DegGufx/xeZZCEE5OUx0YlAR4hTTcOPwyh1eDUrJulOH7/X4al1EdPUJUcyZiqSg4vLmSFLnMg1gTnDuuA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=L3nl3W2M; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="L3nl3W2M" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-374c8cef906so1584537f8f.2; Fri, 20 Sep 2024 08:45:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726847129; x=1727451929; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oOIysbZqVm4Kknw5BnD1Y7WRyTq4GEatzBCOcYtP3fM=; b=L3nl3W2M4kUegE6fLbRYhKppy046eeWEtvnLVxB73Prlew71OtXTu+uLEjfXsHeyrH hZ7GVEOfrLa86YjJKeYpn75DN/aCakO9CKvsPk1g3xeKH9E3gjIksQ1ebtqd1Kz1inky l+ed+jZL8J14zRgWxAgY5ydXjPoz7JWdYS4ES8wdGKCxFYcaS7IvuRrSU78F6Hfh+DJN FPCrn5ObvbBAjbnHzc4ZHOspWeTTParn2TfjWUl9urYD0D4mFg8gnVoMBPxcx9rpyaUo /knSocsdLoapt7OFLlre2Bs/1/CVucd/WlU4LvqPTNMnmL7gOcEA4MbDvTJjfyyQ0YLZ JO9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726847129; x=1727451929; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oOIysbZqVm4Kknw5BnD1Y7WRyTq4GEatzBCOcYtP3fM=; b=NOsP3TDhntbVdLiKen6P6sF6pCoQ+a8+J3SEKIQeOwbGOj6y9AtH5k76uYJymLW3je 1o4AG6AFXkvPBdyndj+OtM6Z7ZPav5k4AVeXM5wWDHIY/bzO93oVMAlr9XAOW2Phmhfd 7iYV8KSL/IbbYfywcyLbydQ/QzPncJ4Ufmr7eG6FYPbpmj8V3Uy79MOVX1knqiiNnVq5 YK9G5Pw1tqn/yT96d0pN5APF9KEzyaOSKnHkDvVL5FuqM4R5GlXe21rkw2KaJ+EjzmCG 9ytxmmiGAO5x7VpkjqzL1rlrrxEMBWCs7NsFB6p4WNtsDxQ37pJxUjvHnC9S3lPlPPiE ZwWA== X-Forwarded-Encrypted: i=1; AJvYcCUSvnGWkT1gJ9ThH9HOOJNPOtu48Bh32HjRyyzuiObxdPQLmzDQFz8QaCJt0PGeQDXxfuLjqc/VZdUIgA==@vger.kernel.org, AJvYcCV/lSIh78OPNJv0EANc3OUs1TKyFZx18k2a+WN+w5mofVq3EWaQ93V6RH6Cu7JTC8/fhN2ENfZNiYdI6rXf@vger.kernel.org, AJvYcCW5u5jikAANah83CQHr6k491QnEPp8AkUqWe4cqzzCMc+mNPEuc2bnbwVPmN+KQfwtXajSN9GEp1e24@vger.kernel.org X-Gm-Message-State: AOJu0Yx/2HWAGXCRboJc5XI0hvQB6Ocfok4ts8InwkaoQd322MGc5/WM gFXGw/OTB4cNDtBSDzG0nGULiTx9dYj4aCEkWlLn5WtiGbAjvbd5 X-Google-Smtp-Source: AGHT+IETBP2AaEONrwI0HxkCkvig+/9J7ZpRz916tH/E9yl+ZZFD/Uzbyv+wuRzoGJDjzO8AFHFYKg== X-Received: by 2002:adf:fb83:0:b0:374:c142:80e7 with SMTP id ffacd0b85a97d-37a4312aa35mr2034620f8f.1.1726847129277; Fri, 20 Sep 2024 08:45:29 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780defdsm17772839f8f.115.2024.09.20.08.45.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 08:45:28 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 10/10] arm64: dts: exynos: Add initial support for Samsung Galaxy S8 Date: Fri, 20 Sep 2024 18:45:08 +0300 Message-Id: <20240920154508.1618410-11-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> References: <20240920154508.1618410-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Samsung Galaxy S8 (SM-G950F), codenamed dreamlte, is a mobile phone from 2017. It features 4GB RAM, 64GB UFS 2.1, Exynos 8895 SoC and a 1440x2960 Super AMOLED display. This initial device tree enables SimpleFB, PSTORE and GPIO keys. Signed-off-by: Ivaylo Ivanov --- arch/arm64/boot/dts/exynos/Makefile | 1 + .../boot/dts/exynos/exynos8895-dreamlte.dts | 126 ++++++++++++++++++ 2 files changed, 127 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exyn= os/Makefile index d7f2191c2..18f5a3eed 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -7,5 +7,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) +=3D \ exynos7-espresso.dtb \ exynos7885-jackpotlte.dtb \ exynos850-e850-96.dtb \ + exynos8895-dreamlte.dtb \ exynosautov9-sadk.dtb \ exynosautov920-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts b/arch/arm6= 4/boot/dts/exynos/exynos8895-dreamlte.dts new file mode 100644 index 000000000..3a376ab2b --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Galaxy S8 (dreamlte/SM-G950F) device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +/dts-v1/; +#include "exynos8895.dtsi" +#include +#include +#include + +/ { + model =3D "Samsung Galaxy S8 (SM-G950F)"; + compatible =3D "samsung,dreamlte", "samsung,exynos8895"; + chassis-type =3D "handset"; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges; + + framebuffer: framebuffer@cc000000 { + compatible =3D "simple-framebuffer"; + reg =3D <0 0xcc000000 (1440 * 2960 * 4)>; + width =3D <1440>; + height =3D <2960>; + stride =3D <(1440 * 4)>; + format =3D "a8r8g8b8"; + }; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x0 0x80000000 0x3c800000>, + <0x0 0xc0000000 0x40000000>, + <0x8 0x80000000 0x80000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges; + + ramoops@92000000 { + compatible =3D "ramoops"; + reg =3D <0 0x92000000 0x8000>; + record-size =3D <0x4000>; + console-size =3D <0x4000>; + }; + + cont_splash_mem: framebuffer@cc000000 { + reg =3D <0 0xcc000000 (1440 * 2960 * 4)>; + no-map; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&key_power &key_voldown &key_volup &key_wink>; + pinctrl-names =3D "default"; + + power-key { + label =3D "Power"; + linux,code =3D ; + gpios =3D <&gpa2 4 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + voldown-key { + label =3D "Volume Down"; + linux,code =3D ; + gpios =3D <&gpa0 4 GPIO_ACTIVE_LOW>; + }; + + volup-key { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&gpa0 3 GPIO_ACTIVE_LOW>; + }; + + /* Typically used for Bixby. Map it as a camera button for now */ + wink-key { + label =3D "Camera"; + linux,code =3D ; + gpios =3D <&gpa0 6 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; +}; + +&oscclk { + clock-frequency =3D <26000000>; +}; + +&pinctrl_alive { + key_power: key-power-pins { + samsung,pins =3D "gpa2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_voldown: key-voldown-pins { + samsung,pins =3D "gpa0-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_volup: key-volup-pins { + samsung,pins =3D "gpa0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + key_wink: key-wink-pins { + samsung,pins =3D "gpa0-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; --=20 2.34.1