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charset="utf-8" From: Hermes Wu add AUX-I2C functionality to support MCCS Signed-off-by: Hermes Wu --- drivers/gpu/drm/bridge/ite-it6505.c | 209 ++++++++++++++++++++++++++-- 1 file changed, 200 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/i= te-it6505.c index cef02c8c363e..1a272c67e82b 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -127,6 +127,9 @@ #define REG_AUX_ADR_16_19 0x26 #define REG_AUX_OUT_DATA0 0x27 =20 +#define REG_AUX_I2C_ADR 0x25 +#define REG_AUX_I2C_OP 0x26 + #define REG_AUX_CMD_REQ 0x2B #define AUX_BUSY BIT(5) =20 @@ -268,6 +271,19 @@ #define REG_SSC_CTRL1 0x189 #define REG_SSC_CTRL2 0x18A =20 +#define REG_AUX_USER_CTRL 0x190 +#define EN_USER_AUX BIT(0) +#define USER_AUX_DONE BIT(1) +#define AUX_EVENT BIT(4) + +#define REG_AUX_USER_DATA_REC 0x191 +#define M_AUX_IN_REC 0xF0 +#define M_AUX_OUT_REC 0x0F + +#define REG_AUX_USER_TXB 0x190 +#define REG_AUX_USER_REPLY 0x19A +#define REG_AUX_USER_RXB(n) (n + 0x19B) + #define RBR DP_LINK_BW_1_62 #define HBR DP_LINK_BW_2_7 #define HBR2 DP_LINK_BW_5_4 @@ -303,6 +319,8 @@ #define MAX_EQ_LEVEL 0x03 #define AUX_WAIT_TIMEOUT_MS 15 #define AUX_FIFO_MAX_SIZE 16 +#define AUX_I2C_MAX_SIZE 4 +#define AUX_I2C_DEFER_RETRY 4 #define PIXEL_CLK_DELAY 1 #define PIXEL_CLK_INVERSE 0 #define ADJUST_PHASE_THRESHOLD 80000 @@ -325,7 +343,12 @@ enum aux_cmd_type { CMD_AUX_NATIVE_READ =3D 0x0, CMD_AUX_NATIVE_WRITE =3D 0x5, + CMD_AUX_GI2C_ADR =3D 0x08, + CMD_AUX_GI2C_READ =3D 0x09, + CMD_AUX_GI2C_WRITE =3D 0x0A, CMD_AUX_I2C_EDID_READ =3D 0xB, + CMD_AUX_I2C_READ =3D 0x0D, + CMD_AUX_I2C_WRITE =3D 0x0C, =20 /*extend read ncommand */ CMD_AUX_GET_KSV_LIST =3D 0x10, @@ -333,8 +356,11 @@ enum aux_cmd_type { =20 enum aux_cmd_reply { REPLY_ACK, - REPLY_NACK, - REPLY_DEFER, + REPLY_NACK =3D 1, + REPLY_DEFER =3D 2, + + REPLY_I2C_NACK =3D 4, + REPLY_I2C_DEFER =3D 8, }; =20 enum link_train_status { @@ -1087,7 +1113,6 @@ static ssize_t it6505_aux_do_transfer(struct it6505 *= it6505, size_t size, enum aux_cmd_reply *reply) { int i, ret_size, ret =3D 0, request_size; - struct device *dev =3D &it6505->client->dev; =20 mutex_lock(&it6505->aux_lock); for (i =3D 0; i < size; ) { @@ -1114,6 +1139,168 @@ static ssize_t it6505_aux_do_transfer(struct it6505= *it6505, return ret; } =20 + +static int it6505_aux_i2c_wait(struct it6505 *it6505, u8 *reply) +{ + int err =3D 0; + unsigned long timeout; + struct device *dev =3D &it6505->client->dev; + + timeout =3D jiffies + msecs_to_jiffies(AUX_WAIT_TIMEOUT_MS) + 1; + + do { + if (it6505_read(it6505, REG_AUX_USER_CTRL) & AUX_EVENT) + break; + if (time_after(jiffies, timeout)) { + dev_err(dev, "Timed out waiting AUX I2C, BUSY =3D %X\n", + it6505_aux_op_finished(it6505)); + err =3D -ETIMEDOUT; + goto end_aux_i2c_wait; + } + usleep_range(300, 800); + + } while (!it6505_aux_op_finished(it6505)); + + if (reply =3D=3D NULL) + goto end_aux_i2c_wait; + + *reply =3D it6505_read(it6505, REG_AUX_USER_REPLY) >> 4; + + if (*reply =3D=3D 0) + goto end_aux_i2c_wait; + + if ((*reply =3D=3D DP_AUX_NATIVE_REPLY_DEFER) || + (*reply =3D=3D DP_AUX_I2C_REPLY_DEFER)) + err =3D -EBUSY; + else if ((*reply =3D=3D DP_AUX_NATIVE_REPLY_NACK) || + (*reply =3D=3D DP_AUX_I2C_REPLY_NACK)) + err =3D -ENXIO; + +end_aux_i2c_wait: + it6505_set_bits(it6505, REG_AUX_USER_CTRL, USER_AUX_DONE, USER_AUX_DONE); + return err; +} + +static int it6505_aux_i2c_readb(struct it6505 *it6505, u8 *buf, size_t siz= e, u8 *reply) +{ + int ret, i; + int retry =3D 0; + + for (retry =3D 0; retry < AUX_I2C_DEFER_RETRY; retry++) { + + it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_READ); + + ret =3D it6505_aux_i2c_wait(it6505, reply); + + if ((*reply =3D=3D DP_AUX_NATIVE_REPLY_DEFER) || + (*reply =3D=3D DP_AUX_I2C_REPLY_DEFER)) + continue; + + if (ret >=3D 0) + break; + } + + for (i =3D 0; i < size; i++) + buf[i] =3D (u8) it6505_read(it6505, REG_AUX_USER_RXB(0 + i)); + + return size; +} + +static int it6505_aux_i2c_writeb(struct it6505 *it6505, u8 *buf, size_t si= ze, u8 *reply) +{ + int i, ret; + int retry =3D 0; + + for (i =3D 0; i < size; i++) + it6505_write(it6505, REG_AUX_OUT_DATA0 + i, buf[i]); + + for (retry =3D 0; retry < AUX_I2C_DEFER_RETRY; retry++) { + + it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_WRITE); + + ret =3D it6505_aux_i2c_wait(it6505, reply); + + if ((*reply =3D=3D DP_AUX_NATIVE_REPLY_DEFER) || + (*reply =3D=3D DP_AUX_I2C_REPLY_DEFER)) + continue; + + if (ret >=3D 0) + break; + } + return size; +} + +static ssize_t it6505_aux_i2c_operation(struct it6505 *it6505, + struct drm_dp_aux_msg *msg) +{ + int ret; + ssize_t request_size, data_cnt =3D 0; + struct device *dev =3D &it6505->client->dev; + u8 *buffer =3D msg->buffer; + + /* set AUX user mode */ + it6505_set_bits(it6505, REG_AUX_CTRL, + AUX_USER_MODE | AUX_NO_SEGMENT_WR, AUX_USER_MODE); + it6505_set_bits(it6505, REG_AUX_USER_CTRL, EN_USER_AUX, EN_USER_AUX); + /* clear AUX FIFO */ + it6505_set_bits(it6505, REG_AUX_CTRL, + AUX_EN_FIFO_READ | CLR_EDID_FIFO, + AUX_EN_FIFO_READ | CLR_EDID_FIFO); + + it6505_set_bits(it6505, REG_AUX_CTRL, + AUX_EN_FIFO_READ | CLR_EDID_FIFO, 0x00); + + it6505_write(it6505, REG_AUX_ADR_0_7, 0x00); + it6505_write(it6505, REG_AUX_I2C_ADR, msg->address << 1); + + if (msg->size =3D=3D 0) { + /* IIC Start/STOP dummy write */ + it6505_write(it6505, REG_AUX_I2C_OP, msg->request); + it6505_write(it6505, REG_AUX_CMD_REQ, CMD_AUX_GI2C_ADR); + ret =3D it6505_aux_i2c_wait(it6505, &msg->reply); + goto end_aux_i2c_transfer; + } + + /* IIC data transfer */ + for (data_cnt =3D 0; data_cnt < msg->size; ) { + request_size =3D min(msg->size - data_cnt, AUX_I2C_MAX_SIZE); + it6505_write(it6505, REG_AUX_I2C_OP, + (msg->request) | ((request_size - 1) << 4)); + + if ((msg->request & DP_AUX_I2C_READ) =3D=3D DP_AUX_I2C_READ) + ret =3D it6505_aux_i2c_readb(it6505, &buffer[data_cnt], + request_size, &msg->reply); + else + ret =3D it6505_aux_i2c_writeb(it6505, &buffer[data_cnt], + request_size, &msg->reply); + + if (ret < 0) + goto end_aux_i2c_transfer; + + data_cnt +=3D request_size; + } + ret =3D data_cnt; +end_aux_i2c_transfer: + + it6505_set_bits(it6505, REG_AUX_USER_CTRL, EN_USER_AUX, 0); + it6505_set_bits(it6505, REG_AUX_CTRL, AUX_USER_MODE, 0); + return ret; +} + + +static ssize_t it6505_aux_i2c_transfer(struct drm_dp_aux *aux, + struct drm_dp_aux_msg *msg) +{ + struct it6505 *it6505 =3D container_of(aux, struct it6505, aux); + int ret; + + mutex_lock(&it6505->aux_lock); + ret =3D it6505_aux_i2c_operation(it6505, msg); + mutex_unlock(&it6505->aux_lock); + return ret; +} + + static ssize_t it6505_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { @@ -1125,7 +1312,7 @@ static ssize_t it6505_aux_transfer(struct drm_dp_aux = *aux, =20 /* IT6505 doesn't support arbitrary I2C read / write. */ if (is_i2c) - return -EINVAL; + return it6505_aux_i2c_transfer(aux, msg); =20 switch (msg->request) { case DP_AUX_NATIVE_READ: @@ -1153,6 +1340,8 @@ static ssize_t it6505_aux_transfer(struct drm_dp_aux = *aux, case REPLY_DEFER: msg->reply =3D DP_AUX_NATIVE_REPLY_DEFER; break; + default: + break; } =20 return ret; @@ -1180,7 +1369,7 @@ static int it6505_get_edid_block(void *data, u8 *buf,= unsigned int block, switch (reply) { case REPLY_ACK: DRM_DEV_DEBUG_DRIVER(dev, "[0x%02x]: %8ph", offset, - buf + offset); + uf + offset); offset +=3D 8; aux_retry =3D 100; break; @@ -1190,6 +1379,8 @@ static int it6505_get_edid_block(void *data, u8 *buf,= unsigned int block, msleep(20); if (!(--aux_retry)) return -EIO; + default: + break; } } =20 @@ -2031,8 +2222,8 @@ static int it6505_setup_sha1_input(struct it6505 *it6= 505, u8 *sha1_input) =20 =20 err =3D it6505_get_ksvlist(it6505, sha1_input, down_stream_count * 5); - if (err < 0) - return err; + if (err < 0) + return err; =20 msg_count +=3D down_stream_count * 5; =20 @@ -2075,7 +2266,7 @@ static bool it6505_hdcp_part2_ksvlist_check(struct it= 6505 *it6505) for (retry =3D 0; retry < 3; retry++) { =20 err =3D it6505_get_dpcd(it6505, DP_AUX_HDCP_V_PRIME(0), (u8 *)bv, - sizeof(bv)); + sizeof(bv)); =20 if (err < 0) { dev_err(dev, "Read V' value Fail %d", retry); @@ -2126,7 +2317,7 @@ static void it6505_hdcp_wait_ksv_list(struct work_str= uct *work) =20 ksv_list_check =3D it6505_hdcp_part2_ksvlist_check(it6505); DRM_DEV_DEBUG_DRIVER(dev, "ksv list ready, ksv list check %s", - ksv_list_check ? "pass" : "fail"); + ksv_list_check ? "pass" : "fail"); =20 if (ksv_list_check) return; --=20 2.34.1