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(unknown [58.22.7.114]) by gzga-smtp-mta-g3-0 (Coremail) with SMTP id _____wD3P2phMO1mxSRQBg--.39474S2; Fri, 20 Sep 2024 16:20:53 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: hjc@rock-chips.com, krzk+dt@kernel.org, robh@kernel.org, conor+dt@kernel.org, s.hauer@pengutronix.de, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, derek.foreman@collabora.com, minhuadotchen@gmail.com, detlev.casanova@collabora.com, Andy Yan Subject: [PATCH v3 03/15] drm/rockchip: vop2: Fix cluster windows alpha ctrl regsiters offset Date: Fri, 20 Sep 2024 16:20:46 +0800 Message-ID: <20240920082048.6654-1-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240920081626.6433-1-andyshrk@163.com> References: <20240920081626.6433-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wD3P2phMO1mxSRQBg--.39474S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7Ar4kZr1ktry3Xw1DJw18Krg_yoW8urWkpF y7Ar98Xr47KFs0gr4xJrWDuryfKws2kFWxAF97K3WYgry3Kr9rC3Wq93WDCry5JFy7Cr12 ka9xGry7uF4jkF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jF7KsUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/1tbiMxJgXmbtL08ijAAAsa Content-Type: text/plain; charset="utf-8" From: Andy Yan The phy_id of cluster windws are not increase one for each window. Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver") Signed-off-by: Andy Yan Tested-by: Derek Foreman --- (no changes since v1) drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm= /rockchip/rockchip_drm_vop2.c index cd861c022a66..bff190151ae8 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -2193,7 +2193,6 @@ static int vop2_find_start_mixer_id_for_vp(struct vop= 2 *vop2, u8 port_id) =20 static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *m= ain_win) { - u32 offset =3D (main_win->data->phys_id * 0x10); struct vop2_alpha_config alpha_config; struct vop2_alpha alpha; struct drm_plane_state *bottom_win_pstate; @@ -2201,6 +2200,7 @@ static void vop2_setup_cluster_alpha(struct vop2 *vop= 2, struct vop2_win *main_wi u16 src_glb_alpha_val, dst_glb_alpha_val; bool premulti_en =3D false; bool swap =3D false; + u32 offset =3D 0; =20 /* At one win mode, win0 is dst/bottom win, and win1 is a all zero src/to= p win */ bottom_win_pstate =3D main_win->base.state; @@ -2219,6 +2219,22 @@ static void vop2_setup_cluster_alpha(struct vop2 *vo= p2, struct vop2_win *main_wi vop2_parse_alpha(&alpha_config, &alpha); =20 alpha.src_color_ctrl.bits.src_dst_swap =3D swap; + + switch (main_win->data->phys_id) { + case ROCKCHIP_VOP2_CLUSTER0: + offset =3D 0x0; + break; + case ROCKCHIP_VOP2_CLUSTER1: + offset =3D 0x10; + break; + case ROCKCHIP_VOP2_CLUSTER2: + offset =3D 0x20; + break; + case ROCKCHIP_VOP2_CLUSTER3: + offset =3D 0x30; + break; + } + vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset, alpha.src_color_ctrl.val); vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset, --=20 2.34.1