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[185.246.87.17]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780e029sm18111177f8f.116.2024.09.20.10.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 10:33:31 -0700 (PDT) From: Guillaume Stols Date: Fri, 20 Sep 2024 17:33:26 +0000 Subject: [PATCH v2 06/10] iio: adc: ad7606: Add PWM support for conversion trigger Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240920-ad7606_add_iio_backend_support-v2-6-0e78782ae7d0@baylibre.com> References: <20240920-ad7606_add_iio_backend_support-v2-0-0e78782ae7d0@baylibre.com> In-Reply-To: <20240920-ad7606_add_iio_backend_support-v2-0-0e78782ae7d0@baylibre.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , "Rafael J. Wysocki" , Jonathan Corbet , Michal Marek Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , linux-fbdev@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, aardelean@baylibre.com, dlechner@baylibre.com, Guillaume Stols , jstephan@baylibre.com X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726853604; l=9213; i=gstols@baylibre.com; s=20240417; h=from:subject:message-id; bh=rGbKHqnx/NA9Sx5Ie+fz9ZIrDMgsKImoOwwJ/a9nWEA=; b=bDWDXc/YIQSmgXwpX8pQ6d5eIK4VDK4epDWqaauFUN31lfe/Gg4bl648rgftOEsmybgyKbF+j doPHbau3CQ+BDipDW/NAh0aNBm85/QAh45dfVAvCpjFVxGpnFSctq+u X-Developer-Key: i=gstols@baylibre.com; a=ed25519; pk=XvMm5WHuV67sGYOJZqIYzXndbaJOlNd8Q6li6vnb4Cs= Until now, the conversion were triggered by setting high the GPIO connected to the convst pin. This commit gives the possibility to connect the convst pin to a PWM. Connecting a PWM allows to have a better control on the samplerate, but it must be handled with care, as it is completely decorrelated of the driver's busy pin handling. Hence it is not recommended to be used "as is" but must be exploited in conjonction with IIO backend, and for now only a sampling frequency of 2 kHz is available. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.c | 170 ++++++++++++++++++++++++++++++++++++++++---= ---- drivers/iio/adc/ad7606.h | 2 + 2 files changed, 148 insertions(+), 24 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 9b457472d49c..b98057138295 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -13,11 +13,13 @@ #include #include #include +#include #include #include #include #include #include +#include =20 #include #include @@ -83,6 +85,80 @@ static int ad7606_reg_access(struct iio_dev *indio_dev, } } =20 +static int ad7606_pwm_set_high(struct ad7606_state *st) +{ + struct pwm_state cnvst_pwm_state; + + if (!st->cnvst_pwm) + return -EINVAL; + pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); + cnvst_pwm_state.enabled =3D true; + cnvst_pwm_state.duty_cycle =3D cnvst_pwm_state.period; + + return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); +} + +static int ad7606_pwm_set_low(struct ad7606_state *st) +{ + struct pwm_state cnvst_pwm_state; + + if (!st->cnvst_pwm) + return -EINVAL; + pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); + cnvst_pwm_state.enabled =3D true; + cnvst_pwm_state.duty_cycle =3D 0; + + return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); +} + +static int ad7606_pwm_set_swing(struct ad7606_state *st) +{ + struct pwm_state cnvst_pwm_state; + + if (!st->cnvst_pwm) + return -EINVAL; + + pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); + cnvst_pwm_state.enabled =3D true; + cnvst_pwm_state.duty_cycle =3D cnvst_pwm_state.period / 2; + + return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); +} + +static bool ad7606_pwm_is_swinging(struct ad7606_state *st) +{ + struct pwm_state cnvst_pwm_state; + + if (!st->cnvst_pwm) + return false; + pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); + return cnvst_pwm_state.duty_cycle !=3D cnvst_pwm_state.period && + cnvst_pwm_state.duty_cycle !=3D 0; +} + +static int ad7606_set_sampling_freq(struct ad7606_state *st, unsigned long= freq) +{ + struct pwm_state cnvst_pwm_state; + bool is_swinging =3D ad7606_pwm_is_swinging(st); + bool is_high; + + if (freq =3D=3D 0) + return -EINVAL; + + /* Retrieve the previous state. */ + pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); + is_high =3D cnvst_pwm_state.duty_cycle =3D=3D cnvst_pwm_state.period; + + cnvst_pwm_state.period =3D DIV_ROUND_UP_ULL(NSEC_PER_SEC, freq); + cnvst_pwm_state.polarity =3D PWM_POLARITY_NORMAL; + if (is_high) + cnvst_pwm_state.duty_cycle =3D cnvst_pwm_state.period; + else if (is_swinging) + cnvst_pwm_state.duty_cycle =3D cnvst_pwm_state.period / 2; + + return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); +} + static int ad7606_read_samples(struct ad7606_state *st) { unsigned int num =3D st->chip_info->num_channels - 1; @@ -117,9 +193,22 @@ static irqreturn_t ad7606_trigger_handler(int irq, voi= d *p) static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) { struct ad7606_state *st =3D iio_priv(indio_dev); + + struct pwm_state cnvst_pwm_state; int ret; + bool pwm_swings =3D false; =20 - gpiod_set_value(st->gpio_convst, 1); + if (st->gpio_convst) { + gpiod_set_value(st->gpio_convst, 1); + } else { + pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); + /* Keep the current PWM state to set it back. */ + if (ad7606_pwm_is_swinging(st)) + pwm_swings =3D true; + ret =3D ad7606_pwm_set_high(st); + if (!ret) + return ret; + } ret =3D wait_for_completion_timeout(&st->completion, msecs_to_jiffies(1000)); if (!ret) { @@ -130,7 +219,12 @@ static int ad7606_scan_direct(struct iio_dev *indio_de= v, unsigned int ch) ret =3D ad7606_read_samples(st); if (ret =3D=3D 0) ret =3D st->data[ch]; - + if (!st->gpio_convst) { + if (!pwm_swings) + ret =3D ad7606_pwm_set_low(st); + else + ret =3D ad7606_pwm_set_swing(st); + } error_ret: gpiod_set_value(st->gpio_convst, 0); =20 @@ -395,8 +489,9 @@ static int ad7606_request_gpios(struct ad7606_state *st) { struct device *dev =3D st->dev; =20 - st->gpio_convst =3D devm_gpiod_get(dev, "adi,conversion-start", - GPIOD_OUT_LOW); + st->gpio_convst =3D devm_gpiod_get_optional(dev, "adi,conversion-start", + GPIOD_OUT_LOW); + if (IS_ERR(st->gpio_convst)) return PTR_ERR(st->gpio_convst); =20 @@ -465,6 +560,7 @@ static int ad7606_buffer_postenable(struct iio_dev *ind= io_dev) struct ad7606_state *st =3D iio_priv(indio_dev); =20 gpiod_set_value(st->gpio_convst, 1); + ad7606_pwm_set_swing(st); =20 return 0; } @@ -474,6 +570,7 @@ static int ad7606_buffer_predisable(struct iio_dev *ind= io_dev) struct ad7606_state *st =3D iio_priv(indio_dev); =20 gpiod_set_value(st->gpio_convst, 0); + ad7606_pwm_set_low(st); =20 return 0; } @@ -521,6 +618,11 @@ static const struct iio_trigger_ops ad7606_trigger_ops= =3D { .validate_device =3D iio_trigger_validate_own_device, }; =20 +static void ad7606_pwm_disable(void *data) +{ + pwm_disable(data); +} + int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, const char *name, unsigned int id, const struct ad7606_bus_ops *bops) @@ -611,20 +713,47 @@ int ad7606_probe(struct device *dev, int irq, void __= iomem *base_address, return ret; } =20 - st->trig =3D devm_iio_trigger_alloc(dev, "%s-dev%d", - indio_dev->name, - iio_device_id(indio_dev)); - if (!st->trig) - return -ENOMEM; - - st->trig->ops =3D &ad7606_trigger_ops; - iio_trigger_set_drvdata(st->trig, indio_dev); - ret =3D devm_iio_trigger_register(dev, st->trig); - if (ret) - return ret; - - indio_dev->trig =3D iio_trigger_get(st->trig); + /* If convst pin is not defined, setup PWM. */ + if (!st->gpio_convst) { + st->cnvst_pwm =3D devm_pwm_get(dev, NULL); + if (IS_ERR(st->cnvst_pwm)) + return PTR_ERR(st->cnvst_pwm); + /* + * PWM is not disabled when sampling stops, but instead its duty cycle i= s set + * to 0% to be sure we have a "low" state. After we unload the driver, l= et's + * disable the PWM. + */ + ret =3D devm_add_action_or_reset(dev, ad7606_pwm_disable, + st->cnvst_pwm); + if (ret) + return ret; =20 + /* + * Set the sampling rate to 2 kHz so to be sure that the interruption ca= n be + * handled between within a single pulse. + */ + ret =3D ad7606_set_sampling_freq(st, 2 * KILO); + if (ret) + return ret; + } else { + st->trig =3D devm_iio_trigger_alloc(dev, "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); + if (!st->trig) + return -ENOMEM; + st->trig->ops =3D &ad7606_trigger_ops; + iio_trigger_set_drvdata(st->trig, indio_dev); + ret =3D devm_iio_trigger_register(dev, st->trig); + if (ret) + return ret; + indio_dev->trig =3D iio_trigger_get(st->trig); + ret =3D devm_iio_triggered_buffer_setup(dev, indio_dev, + &iio_pollfunc_store_time, + &ad7606_trigger_handler, + &ad7606_buffer_ops); + if (ret) + return ret; + } ret =3D devm_request_threaded_irq(dev, irq, NULL, &ad7606_interrupt, @@ -633,13 +762,6 @@ int ad7606_probe(struct device *dev, int irq, void __i= omem *base_address, if (ret) return ret; =20 - ret =3D devm_iio_triggered_buffer_setup(dev, indio_dev, - &iio_pollfunc_store_time, - &ad7606_trigger_handler, - &ad7606_buffer_ops); - if (ret) - return ret; - return devm_iio_device_register(dev, indio_dev); } EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606); diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 6649e84d25de..c13dda444526 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -65,6 +65,7 @@ struct ad7606_chip_info { * @bops bus operations (SPI or parallel) * @range voltage range selection, selects which scale to apply * @oversampling oversampling selection + * @cnvst_pwm pointer to the PWM device connected to the cnvst pin * @base_address address from where to read data in parallel operation * @sw_mode_en software mode enabled * @scale_avail pointer to the array which stores the available scales @@ -94,6 +95,7 @@ struct ad7606_state { const struct ad7606_bus_ops *bops; unsigned int range[16]; unsigned int oversampling; + struct pwm_device *cnvst_pwm; void __iomem *base_address; bool sw_mode_en; const unsigned int *scale_avail; --=20 2.34.1