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[185.246.87.17]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-378e780e029sm18111177f8f.116.2024.09.20.10.33.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Sep 2024 10:33:34 -0700 (PDT) From: Guillaume Stols Date: Fri, 20 Sep 2024 17:33:30 +0000 Subject: [PATCH v2 10/10] iio: adc: ad7606: Disable PWM usage for non backend version Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240920-ad7606_add_iio_backend_support-v2-10-0e78782ae7d0@baylibre.com> References: <20240920-ad7606_add_iio_backend_support-v2-0-0e78782ae7d0@baylibre.com> In-Reply-To: <20240920-ad7606_add_iio_backend_support-v2-0-0e78782ae7d0@baylibre.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , "Rafael J. Wysocki" , Jonathan Corbet , Michal Marek Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , linux-fbdev@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, aardelean@baylibre.com, dlechner@baylibre.com, Guillaume Stols , jstephan@baylibre.com X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726853604; l=1655; i=gstols@baylibre.com; s=20240417; h=from:subject:message-id; bh=jH5AF1NUj11MGOXs+0oMMIR7SvlyPmokhbLME9mMNMs=; b=kSnZJIrPGfSq6YzbLJZ9p9mO7w2NOsG/iZXur554ypRAWkxnTvW2tYn3jiMYak1kdPyCLhejb hUajOoIJbZlAmnbA5Lm007KmnnbAvokXAsLS7hGMF50KRMfdAOuPIXg X-Developer-Key: i=gstols@baylibre.com; a=ed25519; pk=XvMm5WHuV67sGYOJZqIYzXndbaJOlNd8Q6li6vnb4Cs= Since the pwm was introduced before backend, there was an example use whit triggered buffers. However, using it may be dangerous, because if the PWM goes too fast, a new conversion can be triggered before the transmission is over, whit the associated mess in the buffers. Until a solution is found to mitigate this risk, for instante CRC support, the PWM will be disabled. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index f710445bdc22..0c12ca237ee9 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -599,7 +599,6 @@ static int ad7606_buffer_postenable(struct iio_dev *ind= io_dev) struct ad7606_state *st =3D iio_priv(indio_dev); =20 gpiod_set_value(st->gpio_convst, 1); - ad7606_pwm_set_swing(st); =20 return 0; } @@ -609,7 +608,6 @@ static int ad7606_buffer_predisable(struct iio_dev *ind= io_dev) struct ad7606_state *st =3D iio_priv(indio_dev); =20 gpiod_set_value(st->gpio_convst, 0); - ad7606_pwm_set_low(st); =20 return 0; } @@ -838,6 +836,12 @@ int ad7606_probe(struct device *dev, int irq, void __i= omem *base_address, indio_dev->setup_ops =3D &ad7606_pwm_buffer_ops; } else { init_completion(&st->completion); + + /* Reserve the PWM use only for backend (force gpio_convst definition) */ + if (!st->gpio_convst) + return dev_err_probe(dev, -EINVAL, + "No backend, connect convst to a GPIO"); + ret =3D devm_request_threaded_irq(dev, irq, NULL, &ad7606_interrupt, --=20 2.34.1