From nobody Sun Feb 8 06:54:23 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A53A16DECC; Thu, 19 Sep 2024 20:35:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726778115; cv=none; b=QgE4EUSslWXTgma+wvyE59Tnw+GxcmiDpfYW8IazL7okRJVanzt6F/bnYHB6KH0v3GzZWcadiV0mJ5GEg76hC+i//xUbcePg2agcP5t10v6SOQioPqM4FIQCvGsKC+xmL4pa/UqeYRSHgIHPFlHsrNuMQagqENeRg6XWoMFx9FI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726778115; c=relaxed/simple; bh=Oz56yFWrj7m+73xL5eFhWAl8j9gLlWIUTsGZQXXBXRU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NaYAWOKzhARBuNCD0cuu0ofeDHLY1UFNbMtVbcWQesM9a9pdZ/pnxOgRnroJ//Jc0gBV/V3MA8nm/qs5s2Rs0QD8PkKGbDFs1MI6gNOPieO1mZNDf8YgnVGbfp5jj6GtHde0Fl1rjijbr3x3llHsL6WFkqWFCWygz1TOQgYT7UE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kuJ77VJv; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kuJ77VJv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726778111; x=1758314111; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Oz56yFWrj7m+73xL5eFhWAl8j9gLlWIUTsGZQXXBXRU=; b=kuJ77VJvfUGFoQHB1TKY6N+QgkIB1mbi5U1tGAYzKeV95vEziCw16NWg miK9aysNxr7mk4X1H45zIX4NYh/djXdDDjotZQPXsv9lB9iatGqP9/c+n E6pvad37q0eSrqK9fvNYJa/zYoPesaT24nECpYrtXP9HEOyBqcApWlcrR +2uUS0O+xwwLRP9aBqST4oBEp/zWr6C6XNHzX65JMndynfB4bcc79FnUZ KNeSO8vOkbFur8KavzrJlm4CGJlIQzPsz//hlTuL6j6+SFzPz/Y7EvwnQ h4XfhynjtqBaXIKUGSaTcxg9+PwjGZr1vRcN5HBLm5ftrmMbaDuoTNyx8 g==; X-CSE-ConnectionGUID: ltGR+r4/T/ashH7gpDnGnw== X-CSE-MsgGUID: d/QboO5BRWS2jehTCdOD8g== X-IronPort-AV: E=McAfee;i="6700,10204,11200"; a="25912967" X-IronPort-AV: E=Sophos;i="6.10,242,1719903600"; d="scan'208";a="25912967" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2024 13:35:06 -0700 X-CSE-ConnectionGUID: XDSydV99Q+qtKuny3vrOag== X-CSE-MsgGUID: u/TRck7ESuyST33uBAH0BQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,242,1719903600"; d="scan'208";a="93338343" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2024 13:35:06 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Peter Colberg Subject: [PATCH v3 8/9] fpga: dfl: refactor functions to take/return feature device data Date: Thu, 19 Sep 2024 16:34:29 -0400 Message-ID: <20240919203430.1278067-9-peter.colberg@intel.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20240919203430.1278067-1-peter.colberg@intel.com> References: <20240919203430.1278067-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This change prepares a subsequent commit which factors out the DFL enumeration infos from the structure dfl_feature_platform_data into a new structure dfl_feature_dev_data, whose lifetime is independent of the feature device which may be destroyed during port release. Define an alias dfl_feature_dev_data for dfl_feature_platform_data, and an alias to_dfl_feature_dev_data() for dev_get_platdata(), and refactor functions to take/return dfl_feature_dev_data instead. The aliases will be replaced with the actual implementations in the subsequent commit. This change does not introduce any functional changes. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach --- drivers/fpga/dfl-afu-dma-region.c | 110 ++++++------ drivers/fpga/dfl-afu-error.c | 60 +++---- drivers/fpga/dfl-afu-main.c | 276 +++++++++++++++--------------- drivers/fpga/dfl-afu-region.c | 48 +++--- drivers/fpga/dfl-afu.h | 26 +-- drivers/fpga/dfl-fme-br.c | 22 +-- drivers/fpga/dfl-fme-error.c | 102 +++++------ drivers/fpga/dfl-fme-main.c | 98 +++++------ drivers/fpga/dfl-fme-pr.c | 84 ++++----- drivers/fpga/dfl.c | 172 +++++++++---------- drivers/fpga/dfl.h | 77 +++++---- 11 files changed, 539 insertions(+), 536 deletions(-) diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl-afu-dma-r= egion.c index 814191e623e1..5aa7b8884374 100644 --- a/drivers/fpga/dfl-afu-dma-region.c +++ b/drivers/fpga/dfl-afu-dma-region.c @@ -16,26 +16,26 @@ =20 #include "dfl-afu.h" =20 -void afu_dma_region_init(struct dfl_feature_platform_data *pdata) +void afu_dma_region_init(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); =20 afu->dma_regions =3D RB_ROOT; } =20 /** * afu_dma_pin_pages - pin pages of given dma memory region - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma memory region to be pinned * * Pin all the pages of given dfl_afu_dma_region. * Return 0 for success or negative error code. */ -static int afu_dma_pin_pages(struct dfl_feature_platform_data *pdata, +static int afu_dma_pin_pages(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { int npages =3D region->length >> PAGE_SHIFT; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; int ret, pinned; =20 ret =3D account_locked_vm(current->mm, npages, true); @@ -73,17 +73,17 @@ static int afu_dma_pin_pages(struct dfl_feature_platfor= m_data *pdata, =20 /** * afu_dma_unpin_pages - unpin pages of given dma memory region - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma memory region to be unpinned * * Unpin all the pages of given dfl_afu_dma_region. * Return 0 for success or negative error code. */ -static void afu_dma_unpin_pages(struct dfl_feature_platform_data *pdata, +static void afu_dma_unpin_pages(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { long npages =3D region->length >> PAGE_SHIFT; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; =20 unpin_user_pages(region->pages, npages); kfree(region->pages); @@ -133,20 +133,20 @@ static bool dma_region_check_iova(struct dfl_afu_dma_= region *region, =20 /** * afu_dma_region_add - add given dma region to rbtree - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma region to be added * * Return 0 for success, -EEXIST if dma region has already been added. * - * Needs to be called with pdata->lock heold. + * Needs to be called with fdata->lock held. */ -static int afu_dma_region_add(struct dfl_feature_platform_data *pdata, +static int afu_dma_region_add(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct rb_node **new, *parent =3D NULL; =20 - dev_dbg(&pdata->dev->dev, "add region (iova =3D %llx)\n", + dev_dbg(&fdata->dev->dev, "add region (iova =3D %llx)\n", (unsigned long long)region->iova); =20 new =3D &afu->dma_regions.rb_node; @@ -177,50 +177,50 @@ static int afu_dma_region_add(struct dfl_feature_plat= form_data *pdata, =20 /** * afu_dma_region_remove - remove given dma region from rbtree - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma region to be removed * - * Needs to be called with pdata->lock heold. + * Needs to be called with fdata->lock held. */ -static void afu_dma_region_remove(struct dfl_feature_platform_data *pdata, +static void afu_dma_region_remove(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { struct dfl_afu *afu; =20 - dev_dbg(&pdata->dev->dev, "del region (iova =3D %llx)\n", + dev_dbg(&fdata->dev->dev, "del region (iova =3D %llx)\n", (unsigned long long)region->iova); =20 - afu =3D dfl_fpga_pdata_get_private(pdata); + afu =3D dfl_fpga_fdata_get_private(fdata); rb_erase(®ion->node, &afu->dma_regions); } =20 /** * afu_dma_region_destroy - destroy all regions in rbtree - * @pdata: feature device platform data + * @fdata: feature dev data * - * Needs to be called with pdata->lock heold. + * Needs to be called with fdata->lock held. */ -void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata) +void afu_dma_region_destroy(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct rb_node *node =3D rb_first(&afu->dma_regions); struct dfl_afu_dma_region *region; =20 while (node) { region =3D container_of(node, struct dfl_afu_dma_region, node); =20 - dev_dbg(&pdata->dev->dev, "del region (iova =3D %llx)\n", + dev_dbg(&fdata->dev->dev, "del region (iova =3D %llx)\n", (unsigned long long)region->iova); =20 rb_erase(node, &afu->dma_regions); =20 if (region->iova) - dma_unmap_page(dfl_fpga_pdata_to_parent(pdata), + dma_unmap_page(dfl_fpga_fdata_to_parent(fdata), region->iova, region->length, DMA_BIDIRECTIONAL); =20 if (region->pages) - afu_dma_unpin_pages(pdata, region); + afu_dma_unpin_pages(fdata, region); =20 node =3D rb_next(node); kfree(region); @@ -229,7 +229,7 @@ void afu_dma_region_destroy(struct dfl_feature_platform= _data *pdata) =20 /** * afu_dma_region_find - find the dma region from rbtree based on iova and= size - * @pdata: feature device platform data + * @fdata: feature dev data * @iova: address of the dma memory area * @size: size of the dma memory area * @@ -239,14 +239,14 @@ void afu_dma_region_destroy(struct dfl_feature_platfo= rm_data *pdata) * [@iova, @iova+size) * If nothing is matched returns NULL. * - * Needs to be called with pdata->lock held. + * Needs to be called with fdata->lock held. */ struct dfl_afu_dma_region * -afu_dma_region_find(struct dfl_feature_platform_data *pdata, u64 iova, u64= size) +afu_dma_region_find(struct dfl_feature_dev_data *fdata, u64 iova, u64 size) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct rb_node *node =3D afu->dma_regions.rb_node; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; =20 while (node) { struct dfl_afu_dma_region *region; @@ -276,20 +276,20 @@ afu_dma_region_find(struct dfl_feature_platform_data = *pdata, u64 iova, u64 size) =20 /** * afu_dma_region_find_iova - find the dma region from rbtree by iova - * @pdata: feature device platform data + * @fdata: feature dev data * @iova: address of the dma region * - * Needs to be called with pdata->lock held. + * Needs to be called with fdata->lock held. */ static struct dfl_afu_dma_region * -afu_dma_region_find_iova(struct dfl_feature_platform_data *pdata, u64 iova) +afu_dma_region_find_iova(struct dfl_feature_dev_data *fdata, u64 iova) { - return afu_dma_region_find(pdata, iova, 0); + return afu_dma_region_find(fdata, iova, 0); } =20 /** * afu_dma_map_region - map memory region for dma - * @pdata: feature device platform data + * @fdata: feature dev data * @user_addr: address of the memory region * @length: size of the memory region * @iova: pointer of iova address @@ -298,10 +298,10 @@ afu_dma_region_find_iova(struct dfl_feature_platform_= data *pdata, u64 iova) * of the memory region via @iova. * Return 0 for success, otherwise error code. */ -int afu_dma_map_region(struct dfl_feature_platform_data *pdata, +int afu_dma_map_region(struct dfl_feature_dev_data *fdata, u64 user_addr, u64 length, u64 *iova) { - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_afu_dma_region *region; int ret; =20 @@ -324,7 +324,7 @@ int afu_dma_map_region(struct dfl_feature_platform_data= *pdata, region->length =3D length; =20 /* Pin the user memory region */ - ret =3D afu_dma_pin_pages(pdata, region); + ret =3D afu_dma_pin_pages(fdata, region); if (ret) { dev_err(dev, "failed to pin memory region\n"); goto free_region; @@ -338,11 +338,11 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, } =20 /* As pages are continuous then start to do DMA mapping */ - region->iova =3D dma_map_page(dfl_fpga_pdata_to_parent(pdata), + region->iova =3D dma_map_page(dfl_fpga_fdata_to_parent(fdata), region->pages[0], 0, region->length, DMA_BIDIRECTIONAL); - if (dma_mapping_error(dfl_fpga_pdata_to_parent(pdata), region->iova)) { + if (dma_mapping_error(dfl_fpga_fdata_to_parent(fdata), region->iova)) { dev_err(dev, "failed to map for dma\n"); ret =3D -EFAULT; goto unpin_pages; @@ -350,9 +350,9 @@ int afu_dma_map_region(struct dfl_feature_platform_data= *pdata, =20 *iova =3D region->iova; =20 - mutex_lock(&pdata->lock); - ret =3D afu_dma_region_add(pdata, region); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + ret =3D afu_dma_region_add(fdata, region); + mutex_unlock(&fdata->lock); if (ret) { dev_err(dev, "failed to add dma region\n"); goto unmap_dma; @@ -361,10 +361,10 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, return 0; =20 unmap_dma: - dma_unmap_page(dfl_fpga_pdata_to_parent(pdata), + dma_unmap_page(dfl_fpga_fdata_to_parent(fdata), region->iova, region->length, DMA_BIDIRECTIONAL); unpin_pages: - afu_dma_unpin_pages(pdata, region); + afu_dma_unpin_pages(fdata, region); free_region: kfree(region); return ret; @@ -372,34 +372,34 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, =20 /** * afu_dma_unmap_region - unmap dma memory region - * @pdata: feature device platform data + * @fdata: feature dev data * @iova: dma address of the region * * Unmap dma memory region based on @iova. * Return 0 for success, otherwise error code. */ -int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova) +int afu_dma_unmap_region(struct dfl_feature_dev_data *fdata, u64 iova) { struct dfl_afu_dma_region *region; =20 - mutex_lock(&pdata->lock); - region =3D afu_dma_region_find_iova(pdata, iova); + mutex_lock(&fdata->lock); + region =3D afu_dma_region_find_iova(fdata, iova); if (!region) { - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return -EINVAL; } =20 if (region->in_use) { - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return -EBUSY; } =20 - afu_dma_region_remove(pdata, region); - mutex_unlock(&pdata->lock); + afu_dma_region_remove(fdata, region); + mutex_unlock(&fdata->lock); =20 - dma_unmap_page(dfl_fpga_pdata_to_parent(pdata), + dma_unmap_page(dfl_fpga_fdata_to_parent(fdata), region->iova, region->length, DMA_BIDIRECTIONAL); - afu_dma_unpin_pages(pdata, region); + afu_dma_unpin_pages(fdata, region); kfree(region); =20 return 0; diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl-afu-error.c index ad6ea19faaa0..0f392d1f6d45 100644 --- a/drivers/fpga/dfl-afu-error.c +++ b/drivers/fpga/dfl-afu-error.c @@ -28,36 +28,36 @@ #define ERROR_MASK GENMASK_ULL(63, 0) =20 /* mask or unmask port errors by the error mask register. */ -static void __afu_port_err_mask(struct dfl_feature_platform_data *pdata, b= ool mask) +static void __afu_port_err_mask(struct dfl_feature_dev_data *fdata, bool m= ask) { void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 writeq(mask ? ERROR_MASK : 0, base + PORT_ERROR_MASK); } =20 static void afu_port_err_mask(struct device *dev, bool mask) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); =20 - mutex_lock(&pdata->lock); - __afu_port_err_mask(pdata, mask); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + __afu_port_err_mask(fdata, mask); + mutex_unlock(&fdata->lock); } =20 /* clear port errors. */ static int afu_port_err_clear(struct device *dev, u64 err) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base_err, *base_hdr; int enable_ret =3D 0, ret =3D -EBUSY; u64 v; =20 - base_err =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); - base_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base_err =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); + base_hdr =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 /* * clear Port Errors @@ -79,12 +79,12 @@ static int afu_port_err_clear(struct device *dev, u64 e= rr) } =20 /* Halt Port by keeping Port in reset */ - ret =3D __afu_port_disable(pdata); + ret =3D __afu_port_disable(fdata); if (ret) goto done; =20 /* Mask all errors */ - __afu_port_err_mask(pdata, true); + __afu_port_err_mask(fdata, true); =20 /* Clear errors if err input matches with current port errors.*/ v =3D readq(base_err + PORT_ERROR); @@ -101,28 +101,28 @@ static int afu_port_err_clear(struct device *dev, u64= err) } =20 /* Clear mask */ - __afu_port_err_mask(pdata, false); + __afu_port_err_mask(fdata, false); =20 /* Enable the Port by clearing the reset */ - enable_ret =3D __afu_port_enable(pdata); + enable_ret =3D __afu_port_enable(fdata); =20 done: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return enable_ret ? enable_ret : ret; } =20 static ssize_t errors_show(struct device *dev, struct device_attribute *at= tr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 error; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); error =3D readq(base + PORT_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)error); } @@ -145,15 +145,15 @@ static DEVICE_ATTR_RW(errors); static ssize_t first_error_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 error; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); error =3D readq(base + PORT_FIRST_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)error); } @@ -163,16 +163,16 @@ static ssize_t first_malformed_req_show(struct device= *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 req0, req1; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); req0 =3D readq(base + PORT_MALFORMED_REQ0); req1 =3D readq(base + PORT_MALFORMED_REQ1); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%016llx%016llx\n", (unsigned long long)req1, (unsigned long long)req0); @@ -189,15 +189,15 @@ static struct attribute *port_err_attrs[] =3D { static umode_t port_err_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; =20 - pdata =3D dev_get_platdata(dev); + fdata =3D to_dfl_feature_dev_data(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(pdata, PORT_FEATURE_ID_ERROR)) + if (!dfl_get_feature_by_id(fdata, PORT_FEATURE_ID_ERROR)) return 0; =20 return attr->mode; diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c index c86d01f49633..2049dadf2ee2 100644 --- a/drivers/fpga/dfl-afu-main.c +++ b/drivers/fpga/dfl-afu-main.c @@ -26,7 +26,7 @@ =20 /** * __afu_port_enable - enable a port by clear reset - * @pdata: feature device platform data + * @fdata: port feature dev data. * * Enable Port by clear the port soft reset bit, which is set by default. * The AFU is unable to respond to any MMIO access while in reset. @@ -35,17 +35,17 @@ * * The caller needs to hold lock for protection. */ -int __afu_port_enable(struct dfl_feature_platform_data *pdata) +int __afu_port_enable(struct dfl_feature_dev_data *fdata) { void __iomem *base; u64 v; =20 - WARN_ON(!pdata->disable_count); + WARN_ON(!fdata->disable_count); =20 - if (--pdata->disable_count !=3D 0) + if (--fdata->disable_count !=3D 0) return 0; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 /* Clear port soft reset */ v =3D readq(base + PORT_HDR_CTRL); @@ -59,7 +59,7 @@ int __afu_port_enable(struct dfl_feature_platform_data *p= data) if (readq_poll_timeout(base + PORT_HDR_CTRL, v, !(v & PORT_CTRL_SFTRST_ACK), RST_POLL_INVL, RST_POLL_TIMEOUT)) { - dev_err(pdata->dfl_cdev->parent, + dev_err(fdata->dfl_cdev->parent, "timeout, failure to enable device\n"); return -ETIMEDOUT; } @@ -69,21 +69,21 @@ int __afu_port_enable(struct dfl_feature_platform_data = *pdata) =20 /** * __afu_port_disable - disable a port by hold reset - * @pdata: feature device platform data + * @fdata: port feature dev data. * * Disable Port by setting the port soft reset bit, it puts the port into = reset. * * The caller needs to hold lock for protection. */ -int __afu_port_disable(struct dfl_feature_platform_data *pdata) +int __afu_port_disable(struct dfl_feature_dev_data *fdata) { void __iomem *base; u64 v; =20 - if (pdata->disable_count++ !=3D 0) + if (fdata->disable_count++ !=3D 0) return 0; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 /* Set port soft reset */ v =3D readq(base + PORT_HDR_CTRL); @@ -98,7 +98,7 @@ int __afu_port_disable(struct dfl_feature_platform_data *= pdata) if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST_ACK, RST_POLL_INVL, RST_POLL_TIMEOUT)) { - dev_err(pdata->dfl_cdev->parent, + dev_err(fdata->dfl_cdev->parent, "timeout, failure to disable device\n"); return -ETIMEDOUT; } @@ -118,34 +118,34 @@ int __afu_port_disable(struct dfl_feature_platform_da= ta *pdata) * (disabled). Any attempts on MMIO access to AFU while in reset, will * result errors reported via port error reporting sub feature (if present= ). */ -static int __port_reset(struct dfl_feature_platform_data *pdata) +static int __port_reset(struct dfl_feature_dev_data *fdata) { int ret; =20 - ret =3D __afu_port_disable(pdata); + ret =3D __afu_port_disable(fdata); if (ret) return ret; =20 - return __afu_port_enable(pdata); + return __afu_port_enable(fdata); } =20 static int port_reset(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); int ret; =20 - mutex_lock(&pdata->lock); - ret =3D __port_reset(pdata); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + ret =3D __port_reset(fdata); + mutex_unlock(&fdata->lock); =20 return ret; } =20 -static int port_get_id(struct dfl_feature_platform_data *pdata) +static int port_get_id(struct dfl_feature_dev_data *fdata) { void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 return FIELD_GET(PORT_CAP_PORT_NUM, readq(base + PORT_HDR_CAP)); } @@ -153,8 +153,8 @@ static int port_get_id(struct dfl_feature_platform_data= *pdata) static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); - int id =3D port_get_id(pdata); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); + int id =3D port_get_id(fdata); =20 return scnprintf(buf, PAGE_SIZE, "%d\n", id); } @@ -163,15 +163,15 @@ static DEVICE_ATTR_RO(id); static ssize_t ltr_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_CTRL); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_CTRL_LATENCY, v)); } @@ -180,7 +180,7 @@ static ssize_t ltr_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; bool ltr; u64 v; @@ -188,14 +188,14 @@ ltr_store(struct device *dev, struct device_attribute= *attr, if (kstrtobool(buf, <r)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_CTRL); v &=3D ~PORT_CTRL_LATENCY; v |=3D FIELD_PREP(PORT_CTRL_LATENCY, ltr ? 1 : 0); writeq(v, base + PORT_HDR_CTRL); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -204,15 +204,15 @@ static DEVICE_ATTR_RW(ltr); static ssize_t ap1_event_show(struct device *dev, struct device_attribute *attr, char *bu= f) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP1_EVT, v)); } @@ -221,18 +221,18 @@ static ssize_t ap1_event_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; bool clear; =20 if (kstrtobool(buf, &clear) || !clear) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(PORT_STS_AP1_EVT, base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -242,15 +242,15 @@ static ssize_t ap2_event_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP2_EVT, v)); } @@ -259,18 +259,18 @@ static ssize_t ap2_event_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; bool clear; =20 if (kstrtobool(buf, &clear) || !clear) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(PORT_STS_AP2_EVT, base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -279,15 +279,15 @@ static DEVICE_ATTR_RW(ap2_event); static ssize_t power_state_show(struct device *dev, struct device_attribute *attr, char *= buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%x\n", (u8)FIELD_GET(PORT_STS_PWR_STATE, v)); } @@ -297,18 +297,18 @@ static ssize_t userclk_freqcmd_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freq_cmd; void __iomem *base; =20 if (kstrtou64(buf, 0, &userclk_freq_cmd)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(userclk_freq_cmd, base + PORT_HDR_USRCLK_CMD0); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -318,18 +318,18 @@ static ssize_t userclk_freqcntrcmd_store(struct device *dev, struct device_attribute *att= r, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freqcntr_cmd; void __iomem *base; =20 if (kstrtou64(buf, 0, &userclk_freqcntr_cmd)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(userclk_freqcntr_cmd, base + PORT_HDR_USRCLK_CMD1); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -339,15 +339,15 @@ static ssize_t userclk_freqsts_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freqsts; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); userclk_freqsts =3D readq(base + PORT_HDR_USRCLK_STS0); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)userclk_freqsts); } @@ -357,15 +357,15 @@ static ssize_t userclk_freqcntrsts_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freqcntrsts; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); userclk_freqcntrsts =3D readq(base + PORT_HDR_USRCLK_STS1); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)userclk_freqcntrsts); @@ -388,13 +388,13 @@ static struct attribute *port_hdr_attrs[] =3D { static umode_t port_hdr_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; umode_t mode =3D attr->mode; void __iomem *base; =20 - pdata =3D dev_get_platdata(dev); - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + fdata =3D to_dfl_feature_dev_data(dev); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 if (dfl_feature_revision(base) > 0) { /* @@ -459,21 +459,21 @@ static const struct dfl_feature_ops port_hdr_ops =3D { static ssize_t afu_id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 guidl, guidh; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_AFU); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_AFU); =20 - mutex_lock(&pdata->lock); - if (pdata->disable_count) { - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + if (fdata->disable_count) { + mutex_unlock(&fdata->lock); return -EBUSY; } =20 guidl =3D readq(base + GUID_L); guidh =3D readq(base + GUID_H); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return scnprintf(buf, PAGE_SIZE, "%016llx%016llx\n", guidh, guidl); } @@ -487,15 +487,15 @@ static struct attribute *port_afu_attrs[] =3D { static umode_t port_afu_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; =20 - pdata =3D dev_get_platdata(dev); + fdata =3D to_dfl_feature_dev_data(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(pdata, PORT_FEATURE_ID_AFU)) + if (!dfl_get_feature_by_id(fdata, PORT_FEATURE_ID_AFU)) return 0; =20 return attr->mode; @@ -509,10 +509,10 @@ static const struct attribute_group port_afu_group = =3D { static int port_afu_init(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct resource *res =3D &pdev->resource[feature->resource_index]; =20 - return afu_mmio_region_add(pdata, + return afu_mmio_region_add(fdata, DFL_PORT_REGION_INDEX_AFU, resource_size(res), res->start, DFL_PORT_REGION_MMAP | DFL_PORT_REGION_READ | @@ -531,10 +531,10 @@ static const struct dfl_feature_ops port_afu_ops =3D { static int port_stp_init(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct resource *res =3D &pdev->resource[feature->resource_index]; =20 - return afu_mmio_region_add(pdata, + return afu_mmio_region_add(fdata, DFL_PORT_REGION_INDEX_STP, resource_size(res), res->start, DFL_PORT_REGION_MMAP | DFL_PORT_REGION_READ | @@ -602,18 +602,18 @@ static struct dfl_feature_driver port_feature_drvs[] = =3D { =20 static int afu_open(struct inode *inode, struct file *filp) { - struct dfl_feature_platform_data *pdata =3D dfl_fpga_inode_to_feature_dev= _data(inode); - struct platform_device *fdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D dfl_fpga_inode_to_feature_dev_data= (inode); + struct platform_device *fdev =3D fdata->dev; int ret; =20 - mutex_lock(&pdata->lock); - ret =3D dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL); + mutex_lock(&fdata->lock); + ret =3D dfl_feature_dev_use_begin(fdata, filp->f_flags & O_EXCL); if (!ret) { dev_dbg(&fdev->dev, "Device File Opened %d Times\n", - dfl_feature_dev_use_count(pdata)); + dfl_feature_dev_use_count(fdata)); filp->private_data =3D fdev; } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return ret; } @@ -621,29 +621,29 @@ static int afu_open(struct inode *inode, struct file = *filp) static int afu_release(struct inode *inode, struct file *filp) { struct platform_device *pdev =3D filp->private_data; - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; struct dfl_feature *feature; =20 dev_dbg(&pdev->dev, "Device File Release\n"); =20 - pdata =3D dev_get_platdata(&pdev->dev); + fdata =3D to_dfl_feature_dev_data(&pdev->dev); =20 - mutex_lock(&pdata->lock); - dfl_feature_dev_use_end(pdata); + mutex_lock(&fdata->lock); + dfl_feature_dev_use_end(fdata); =20 - if (!dfl_feature_dev_use_count(pdata)) { - dfl_fpga_dev_for_each_feature(pdata, feature) + if (!dfl_feature_dev_use_count(fdata)) { + dfl_fpga_dev_for_each_feature(fdata, feature) dfl_fpga_set_irq_triggers(feature, 0, feature->nr_irqs, NULL); - __port_reset(pdata); - afu_dma_region_destroy(pdata); + __port_reset(fdata); + afu_dma_region_destroy(fdata); } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; } =20 -static long afu_ioctl_check_extension(struct dfl_feature_platform_data *pd= ata, +static long afu_ioctl_check_extension(struct dfl_feature_dev_data *fdata, unsigned long arg) { /* No extension support for now */ @@ -651,7 +651,7 @@ static long afu_ioctl_check_extension(struct dfl_featur= e_platform_data *pdata, } =20 static long -afu_ioctl_get_info(struct dfl_feature_platform_data *pdata, void __user *a= rg) +afu_ioctl_get_info(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_info info; struct dfl_afu *afu; @@ -665,12 +665,12 @@ afu_ioctl_get_info(struct dfl_feature_platform_data *= pdata, void __user *arg) if (info.argsz < minsz) return -EINVAL; =20 - mutex_lock(&pdata->lock); - afu =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + afu =3D dfl_fpga_fdata_get_private(fdata); info.flags =3D 0; info.num_regions =3D afu->num_regions; info.num_umsgs =3D afu->num_umsgs; - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 if (copy_to_user(arg, &info, sizeof(info))) return -EFAULT; @@ -678,7 +678,7 @@ afu_ioctl_get_info(struct dfl_feature_platform_data *pd= ata, void __user *arg) return 0; } =20 -static long afu_ioctl_get_region_info(struct dfl_feature_platform_data *pd= ata, +static long afu_ioctl_get_region_info(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_region_info rinfo; @@ -694,7 +694,7 @@ static long afu_ioctl_get_region_info(struct dfl_featur= e_platform_data *pdata, if (rinfo.argsz < minsz || rinfo.padding) return -EINVAL; =20 - ret =3D afu_mmio_region_get_by_index(pdata, rinfo.index, ®ion); + ret =3D afu_mmio_region_get_by_index(fdata, rinfo.index, ®ion); if (ret) return ret; =20 @@ -709,7 +709,7 @@ static long afu_ioctl_get_region_info(struct dfl_featur= e_platform_data *pdata, } =20 static long -afu_ioctl_dma_map(struct dfl_feature_platform_data *pdata, void __user *ar= g) +afu_ioctl_dma_map(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_dma_map map; unsigned long minsz; @@ -723,16 +723,16 @@ afu_ioctl_dma_map(struct dfl_feature_platform_data *p= data, void __user *arg) if (map.argsz < minsz || map.flags) return -EINVAL; =20 - ret =3D afu_dma_map_region(pdata, map.user_addr, map.length, &map.iova); + ret =3D afu_dma_map_region(fdata, map.user_addr, map.length, &map.iova); if (ret) return ret; =20 if (copy_to_user(arg, &map, sizeof(map))) { - afu_dma_unmap_region(pdata, map.iova); + afu_dma_unmap_region(fdata, map.iova); return -EFAULT; } =20 - dev_dbg(&pdata->dev->dev, "dma map: ua=3D%llx, len=3D%llx, iova=3D%llx\n", + dev_dbg(&fdata->dev->dev, "dma map: ua=3D%llx, len=3D%llx, iova=3D%llx\n", (unsigned long long)map.user_addr, (unsigned long long)map.length, (unsigned long long)map.iova); @@ -741,7 +741,7 @@ afu_ioctl_dma_map(struct dfl_feature_platform_data *pda= ta, void __user *arg) } =20 static long -afu_ioctl_dma_unmap(struct dfl_feature_platform_data *pdata, void __user *= arg) +afu_ioctl_dma_unmap(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_dma_unmap unmap; unsigned long minsz; @@ -754,33 +754,33 @@ afu_ioctl_dma_unmap(struct dfl_feature_platform_data = *pdata, void __user *arg) if (unmap.argsz < minsz || unmap.flags) return -EINVAL; =20 - return afu_dma_unmap_region(pdata, unmap.iova); + return afu_dma_unmap_region(fdata, unmap.iova); } =20 static long afu_ioctl(struct file *filp, unsigned int cmd, unsigned long a= rg) { struct platform_device *pdev =3D filp->private_data; - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; struct dfl_feature *f; long ret; =20 dev_dbg(&pdev->dev, "%s cmd 0x%x\n", __func__, cmd); =20 - pdata =3D dev_get_platdata(&pdev->dev); + fdata =3D to_dfl_feature_dev_data(&pdev->dev); =20 switch (cmd) { case DFL_FPGA_GET_API_VERSION: return DFL_FPGA_API_VERSION; case DFL_FPGA_CHECK_EXTENSION: - return afu_ioctl_check_extension(pdata, arg); + return afu_ioctl_check_extension(fdata, arg); case DFL_FPGA_PORT_GET_INFO: - return afu_ioctl_get_info(pdata, (void __user *)arg); + return afu_ioctl_get_info(fdata, (void __user *)arg); case DFL_FPGA_PORT_GET_REGION_INFO: - return afu_ioctl_get_region_info(pdata, (void __user *)arg); + return afu_ioctl_get_region_info(fdata, (void __user *)arg); case DFL_FPGA_PORT_DMA_MAP: - return afu_ioctl_dma_map(pdata, (void __user *)arg); + return afu_ioctl_dma_map(fdata, (void __user *)arg); case DFL_FPGA_PORT_DMA_UNMAP: - return afu_ioctl_dma_unmap(pdata, (void __user *)arg); + return afu_ioctl_dma_unmap(fdata, (void __user *)arg); default: /* * Let sub-feature's ioctl function to handle the cmd @@ -788,7 +788,7 @@ static long afu_ioctl(struct file *filp, unsigned int c= md, unsigned long arg) * handled in this sub feature, and returns 0 and other * error code if cmd is handled. */ - dfl_fpga_dev_for_each_feature(pdata, f) + dfl_fpga_dev_for_each_feature(fdata, f) if (f->ops && f->ops->ioctl) { ret =3D f->ops->ioctl(pdev, f, cmd, arg); if (ret !=3D -ENODEV) @@ -808,8 +808,8 @@ static const struct vm_operations_struct afu_vma_ops = =3D { static int afu_mmap(struct file *filp, struct vm_area_struct *vma) { struct platform_device *pdev =3D filp->private_data; - struct dfl_feature_platform_data *pdata; u64 size =3D vma->vm_end - vma->vm_start; + struct dfl_feature_dev_data *fdata; struct dfl_afu_mmio_region region; u64 offset; int ret; @@ -817,10 +817,10 @@ static int afu_mmap(struct file *filp, struct vm_area= _struct *vma) if (!(vma->vm_flags & VM_SHARED)) return -EINVAL; =20 - pdata =3D dev_get_platdata(&pdev->dev); + fdata =3D to_dfl_feature_dev_data(&pdev->dev); =20 offset =3D vma->vm_pgoff << PAGE_SHIFT; - ret =3D afu_mmio_region_get_by_offset(pdata, offset, size, ®ion); + ret =3D afu_mmio_region_get_by_offset(fdata, offset, size, ®ion); if (ret) return ret; =20 @@ -854,45 +854,45 @@ static const struct file_operations afu_fops =3D { =20 static int afu_dev_init(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_afu *afu; =20 afu =3D devm_kzalloc(&pdev->dev, sizeof(*afu), GFP_KERNEL); if (!afu) return -ENOMEM; =20 - mutex_lock(&pdata->lock); - dfl_fpga_pdata_set_private(pdata, afu); - afu_mmio_region_init(pdata); - afu_dma_region_init(pdata); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_fpga_fdata_set_private(fdata, afu); + afu_mmio_region_init(fdata); + afu_dma_region_init(fdata); + mutex_unlock(&fdata->lock); =20 return 0; } =20 static int afu_dev_destroy(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 - mutex_lock(&pdata->lock); - afu_mmio_region_destroy(pdata); - afu_dma_region_destroy(pdata); - dfl_fpga_pdata_set_private(pdata, NULL); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + afu_mmio_region_destroy(fdata); + afu_dma_region_destroy(fdata); + dfl_fpga_fdata_set_private(fdata, NULL); + mutex_unlock(&fdata->lock); =20 return 0; } =20 -static int port_enable_set(struct dfl_feature_platform_data *pdata, bool e= nable) +static int port_enable_set(struct dfl_feature_dev_data *fdata, bool enable) { int ret; =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); if (enable) - ret =3D __afu_port_enable(pdata); + ret =3D __afu_port_enable(fdata); else - ret =3D __afu_port_disable(pdata); - mutex_unlock(&pdata->lock); + ret =3D __afu_port_disable(fdata); + mutex_unlock(&fdata->lock); =20 return ret; } diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl-afu-region.c index 8f0e9485214a..b11a5b21e666 100644 --- a/drivers/fpga/dfl-afu-region.c +++ b/drivers/fpga/dfl-afu-region.c @@ -12,11 +12,11 @@ =20 /** * afu_mmio_region_init - init function for afu mmio region support - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data */ -void afu_mmio_region_init(struct dfl_feature_platform_data *pdata) +void afu_mmio_region_init(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); =20 INIT_LIST_HEAD(&afu->regions); } @@ -39,7 +39,7 @@ static struct dfl_afu_mmio_region *get_region_by_index(st= ruct dfl_afu *afu, /** * afu_mmio_region_add - add a mmio region to given feature dev. * - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data * @region_index: region index. * @region_size: region size. * @phys: region's physical address of this region. @@ -47,10 +47,10 @@ static struct dfl_afu_mmio_region *get_region_by_index(= struct dfl_afu *afu, * * Return: 0 on success, negative error code otherwise. */ -int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_add(struct dfl_feature_dev_data *fdata, u32 region_index, u64 region_size, u64 phys, u32 flags) { - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_afu_mmio_region *region; struct dfl_afu *afu; int ret =3D 0; @@ -64,13 +64,13 @@ int afu_mmio_region_add(struct dfl_feature_platform_dat= a *pdata, region->phys =3D phys; region->flags =3D flags; =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 - afu =3D dfl_fpga_pdata_get_private(pdata); + afu =3D dfl_fpga_fdata_get_private(fdata); =20 /* check if @index already exists */ if (get_region_by_index(afu, region_index)) { - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); ret =3D -EEXIST; goto exit; } @@ -81,7 +81,7 @@ int afu_mmio_region_add(struct dfl_feature_platform_data = *pdata, =20 afu->region_cur_offset +=3D region_size; afu->num_regions++; - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; =20 @@ -92,26 +92,26 @@ int afu_mmio_region_add(struct dfl_feature_platform_dat= a *pdata, =20 /** * afu_mmio_region_destroy - destroy all mmio regions under given feature = dev. - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data */ -void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata) +void afu_mmio_region_destroy(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct dfl_afu_mmio_region *tmp, *region; =20 list_for_each_entry_safe(region, tmp, &afu->regions, node) - devm_kfree(&pdata->dev->dev, region); + devm_kfree(&fdata->dev->dev, region); } =20 /** * afu_mmio_region_get_by_index - find an afu region by index. - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data * @region_index: region index. * @pregion: ptr to region for result. * * Return: 0 on success, negative error code otherwise. */ -int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_get_by_index(struct dfl_feature_dev_data *fdata, u32 region_index, struct dfl_afu_mmio_region *pregion) { @@ -119,8 +119,8 @@ int afu_mmio_region_get_by_index(struct dfl_feature_pla= tform_data *pdata, struct dfl_afu *afu; int ret =3D 0; =20 - mutex_lock(&pdata->lock); - afu =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + afu =3D dfl_fpga_fdata_get_private(fdata); region =3D get_region_by_index(afu, region_index); if (!region) { ret =3D -EINVAL; @@ -128,14 +128,14 @@ int afu_mmio_region_get_by_index(struct dfl_feature_p= latform_data *pdata, } *pregion =3D *region; exit: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret; } =20 /** * afu_mmio_region_get_by_offset - find an afu mmio region by offset and s= ize * - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data * @offset: region offset from start of the device fd. * @size: region size. * @pregion: ptr to region for result. @@ -145,7 +145,7 @@ int afu_mmio_region_get_by_index(struct dfl_feature_pla= tform_data *pdata, * * Return: 0 on success, negative error code otherwise. */ -int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_get_by_offset(struct dfl_feature_dev_data *fdata, u64 offset, u64 size, struct dfl_afu_mmio_region *pregion) { @@ -153,8 +153,8 @@ int afu_mmio_region_get_by_offset(struct dfl_feature_pl= atform_data *pdata, struct dfl_afu *afu; int ret =3D 0; =20 - mutex_lock(&pdata->lock); - afu =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + afu =3D dfl_fpga_fdata_get_private(fdata); for_each_region(region, afu) if (region->offset <=3D offset && region->offset + region->size >=3D offset + size) { @@ -163,6 +163,6 @@ int afu_mmio_region_get_by_offset(struct dfl_feature_pl= atform_data *pdata, } ret =3D -EINVAL; exit: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret; } diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl-afu.h index 6d1e79240c70..03be4f0969c7 100644 --- a/drivers/fpga/dfl-afu.h +++ b/drivers/fpga/dfl-afu.h @@ -76,27 +76,27 @@ struct dfl_afu { struct rb_root dma_regions; }; =20 -/* hold pdata->lock when call __afu_port_enable/disable */ -int __afu_port_enable(struct dfl_feature_platform_data *pdata); -int __afu_port_disable(struct dfl_feature_platform_data *pdata); +/* hold fdata->lock when call __afu_port_enable/disable */ +int __afu_port_enable(struct dfl_feature_dev_data *fdata); +int __afu_port_disable(struct dfl_feature_dev_data *fdata); =20 -void afu_mmio_region_init(struct dfl_feature_platform_data *pdata); -int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, +void afu_mmio_region_init(struct dfl_feature_dev_data *fdata); +int afu_mmio_region_add(struct dfl_feature_dev_data *fdata, u32 region_index, u64 region_size, u64 phys, u32 flags); -void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata); -int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata, +void afu_mmio_region_destroy(struct dfl_feature_dev_data *fdata); +int afu_mmio_region_get_by_index(struct dfl_feature_dev_data *fdata, u32 region_index, struct dfl_afu_mmio_region *pregion); -int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_get_by_offset(struct dfl_feature_dev_data *fdata, u64 offset, u64 size, struct dfl_afu_mmio_region *pregion); -void afu_dma_region_init(struct dfl_feature_platform_data *pdata); -void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata); -int afu_dma_map_region(struct dfl_feature_platform_data *pdata, +void afu_dma_region_init(struct dfl_feature_dev_data *fdata); +void afu_dma_region_destroy(struct dfl_feature_dev_data *fdata); +int afu_dma_map_region(struct dfl_feature_dev_data *fdata, u64 user_addr, u64 length, u64 *iova); -int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova= ); +int afu_dma_unmap_region(struct dfl_feature_dev_data *fdata, u64 iova); struct dfl_afu_dma_region * -afu_dma_region_find(struct dfl_feature_platform_data *pdata, +afu_dma_region_find(struct dfl_feature_dev_data *fdata, u64 iova, u64 size); =20 extern const struct dfl_feature_ops port_err_ops; diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl-fme-br.c index c19ddb02a161..5c60a38ec76c 100644 --- a/drivers/fpga/dfl-fme-br.c +++ b/drivers/fpga/dfl-fme-br.c @@ -22,34 +22,34 @@ struct fme_br_priv { struct dfl_fme_br_pdata *pdata; struct dfl_fpga_port_ops *port_ops; - struct dfl_feature_platform_data *port_pdata; + struct dfl_feature_dev_data *port_fdata; }; =20 static int fme_bridge_enable_set(struct fpga_bridge *bridge, bool enable) { - struct dfl_feature_platform_data *port_pdata; struct fme_br_priv *priv =3D bridge->priv; + struct dfl_feature_dev_data *port_fdata; struct dfl_fpga_port_ops *ops; =20 - if (!priv->port_pdata) { - port_pdata =3D dfl_fpga_cdev_find_port_data(priv->pdata->cdev, + if (!priv->port_fdata) { + port_fdata =3D dfl_fpga_cdev_find_port_data(priv->pdata->cdev, &priv->pdata->port_id, dfl_fpga_check_port_id); - if (!port_pdata) + if (!port_fdata) return -ENODEV; =20 - priv->port_pdata =3D port_pdata; + priv->port_fdata =3D port_fdata; } =20 - if (priv->port_pdata && !priv->port_ops) { - ops =3D dfl_fpga_port_ops_get(priv->port_pdata); + if (priv->port_fdata && !priv->port_ops) { + ops =3D dfl_fpga_port_ops_get(priv->port_fdata); if (!ops || !ops->enable_set) return -ENOENT; =20 priv->port_ops =3D ops; } =20 - return priv->port_ops->enable_set(priv->port_pdata, enable); + return priv->port_ops->enable_set(priv->port_fdata, enable); } =20 static const struct fpga_bridge_ops fme_bridge_ops =3D { @@ -85,8 +85,8 @@ static void fme_br_remove(struct platform_device *pdev) =20 fpga_bridge_unregister(br); =20 - if (priv->port_pdata) - put_device(&priv->port_pdata->dev->dev); + if (priv->port_fdata) + put_device(&priv->port_fdata->dev->dev); if (priv->port_ops) dfl_fpga_port_ops_put(priv->port_ops); } diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl-fme-error.c index 39b8e3b450d7..f00d949efe69 100644 --- a/drivers/fpga/dfl-fme-error.c +++ b/drivers/fpga/dfl-fme-error.c @@ -42,15 +42,15 @@ static ssize_t pcie0_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + PCIE0_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -59,7 +59,7 @@ static ssize_t pcie0_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; int ret =3D 0; u64 v, val; @@ -67,9 +67,9 @@ static ssize_t pcie0_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(GENMASK_ULL(63, 0), base + PCIE0_ERROR_MASK); =20 v =3D readq(base + PCIE0_ERROR); @@ -79,7 +79,7 @@ static ssize_t pcie0_errors_store(struct device *dev, ret =3D -EINVAL; =20 writeq(0ULL, base + PCIE0_ERROR_MASK); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret ? ret : count; } static DEVICE_ATTR_RW(pcie0_errors); @@ -87,15 +87,15 @@ static DEVICE_ATTR_RW(pcie0_errors); static ssize_t pcie1_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + PCIE1_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -104,7 +104,7 @@ static ssize_t pcie1_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; int ret =3D 0; u64 v, val; @@ -112,9 +112,9 @@ static ssize_t pcie1_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(GENMASK_ULL(63, 0), base + PCIE1_ERROR_MASK); =20 v =3D readq(base + PCIE1_ERROR); @@ -124,7 +124,7 @@ static ssize_t pcie1_errors_store(struct device *dev, ret =3D -EINVAL; =20 writeq(0ULL, base + PCIE1_ERROR_MASK); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret ? ret : count; } static DEVICE_ATTR_RW(pcie1_errors); @@ -132,10 +132,10 @@ static DEVICE_ATTR_RW(pcie1_errors); static ssize_t nonfatal_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)readq(base + RAS_NONFAT_ERROR)); @@ -145,10 +145,10 @@ static DEVICE_ATTR_RO(nonfatal_errors); static ssize_t catfatal_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)readq(base + RAS_CATFAT_ERROR)); @@ -158,15 +158,15 @@ static DEVICE_ATTR_RO(catfatal_errors); static ssize_t inject_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + RAS_ERROR_INJECT); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)FIELD_GET(INJECT_ERROR_MASK, v)); @@ -176,7 +176,7 @@ static ssize_t inject_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u8 inject_error; u64 v; @@ -187,14 +187,14 @@ static ssize_t inject_errors_store(struct device *dev, if (inject_error & ~INJECT_ERROR_MASK) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + RAS_ERROR_INJECT); v &=3D ~INJECT_ERROR_MASK; v |=3D FIELD_PREP(INJECT_ERROR_MASK, inject_error); writeq(v, base + RAS_ERROR_INJECT); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -203,15 +203,15 @@ static DEVICE_ATTR_RW(inject_errors); static ssize_t fme_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + FME_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -220,7 +220,7 @@ static ssize_t fme_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v, val; int ret =3D 0; @@ -228,9 +228,9 @@ static ssize_t fme_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(GENMASK_ULL(63, 0), base + FME_ERROR_MASK); =20 v =3D readq(base + FME_ERROR); @@ -242,7 +242,7 @@ static ssize_t fme_errors_store(struct device *dev, /* Workaround: disable MBP_ERROR if feature revision is 0 */ writeq(dfl_feature_revision(base) ? 0ULL : MBP_ERROR, base + FME_ERROR_MASK); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret ? ret : count; } static DEVICE_ATTR_RW(fme_errors); @@ -250,15 +250,15 @@ static DEVICE_ATTR_RW(fme_errors); static ssize_t first_error_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + FME_FIRST_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -267,15 +267,15 @@ static DEVICE_ATTR_RO(first_error); static ssize_t next_error_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + FME_NEXT_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -296,15 +296,15 @@ static struct attribute *fme_global_err_attrs[] =3D { static umode_t fme_global_err_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; =20 - pdata =3D dev_get_platdata(dev); + fdata =3D to_dfl_feature_dev_data(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR)) + if (!dfl_get_feature_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR)) return 0; =20 return attr->mode; @@ -318,12 +318,12 @@ const struct attribute_group fme_global_err_group =3D= { =20 static void fme_err_mask(struct device *dev, bool mask) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 /* Workaround: keep MBP_ERROR always masked if revision is 0 */ if (dfl_feature_revision(base)) @@ -336,7 +336,7 @@ static void fme_err_mask(struct device *dev, bool mask) writeq(mask ? ERROR_MASK : 0, base + RAS_NONFAT_ERROR_MASK); writeq(mask ? ERROR_MASK : 0, base + RAS_CATFAT_ERROR_MASK); =20 - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); } =20 static int fme_global_err_init(struct platform_device *pdev, diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c index 4964e15e910b..0c2f259c7025 100644 --- a/drivers/fpga/dfl-fme-main.c +++ b/drivers/fpga/dfl-fme-main.c @@ -28,11 +28,11 @@ static ssize_t ports_num_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -48,11 +48,11 @@ static DEVICE_ATTR_RO(ports_num); static ssize_t bitstream_id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_BITSTREAM_ID); =20 @@ -67,11 +67,11 @@ static DEVICE_ATTR_RO(bitstream_id); static ssize_t bitstream_metadata_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_BITSTREAM_MD); =20 @@ -82,11 +82,11 @@ static DEVICE_ATTR_RO(bitstream_metadata); static ssize_t cache_size_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -98,11 +98,11 @@ static DEVICE_ATTR_RO(cache_size); static ssize_t fabric_version_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -114,11 +114,11 @@ static DEVICE_ATTR_RO(fabric_version); static ssize_t socket_id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -141,10 +141,10 @@ static const struct attribute_group fme_hdr_group =3D= { .attrs =3D fme_hdr_attrs, }; =20 -static long fme_hdr_ioctl_release_port(struct dfl_feature_platform_data *p= data, +static long fme_hdr_ioctl_release_port(struct dfl_feature_dev_data *fdata, unsigned long arg) { - struct dfl_fpga_cdev *cdev =3D pdata->dfl_cdev; + struct dfl_fpga_cdev *cdev =3D fdata->dfl_cdev; int port_id; =20 if (get_user(port_id, (int __user *)arg)) @@ -153,10 +153,10 @@ static long fme_hdr_ioctl_release_port(struct dfl_fea= ture_platform_data *pdata, return dfl_fpga_cdev_release_port(cdev, port_id); } =20 -static long fme_hdr_ioctl_assign_port(struct dfl_feature_platform_data *pd= ata, +static long fme_hdr_ioctl_assign_port(struct dfl_feature_dev_data *fdata, unsigned long arg) { - struct dfl_fpga_cdev *cdev =3D pdata->dfl_cdev; + struct dfl_fpga_cdev *cdev =3D fdata->dfl_cdev; int port_id; =20 if (get_user(port_id, (int __user *)arg)) @@ -169,13 +169,13 @@ static long fme_hdr_ioctl(struct platform_device *pde= v, struct dfl_feature *feature, unsigned int cmd, unsigned long arg) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 switch (cmd) { case DFL_FPGA_FME_PORT_RELEASE: - return fme_hdr_ioctl_release_port(pdata, arg); + return fme_hdr_ioctl_release_port(fdata, arg); case DFL_FPGA_FME_PORT_ASSIGN: - return fme_hdr_ioctl_assign_port(pdata, arg); + return fme_hdr_ioctl_assign_port(fdata, arg); } =20 return -ENODEV; @@ -417,14 +417,14 @@ static int power_hwmon_read(struct device *dev, enum = hwmon_sensor_types type, static int power_hwmon_write(struct device *dev, enum hwmon_sensor_types t= ype, u32 attr, int channel, long val) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev->parent); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev->paren= t); struct dfl_feature *feature =3D dev_get_drvdata(dev); int ret =3D 0; u64 v; =20 val =3D clamp_val(val / MICRO, 0, PWR_THRESHOLD_MAX); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 switch (attr) { case hwmon_power_max: @@ -444,7 +444,7 @@ static int power_hwmon_write(struct device *dev, enum h= wmon_sensor_types type, break; } =20 - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return ret; } @@ -595,7 +595,7 @@ static struct dfl_feature_driver fme_feature_drvs[] =3D= { }, }; =20 -static long fme_ioctl_check_extension(struct dfl_feature_platform_data *pd= ata, +static long fme_ioctl_check_extension(struct dfl_feature_dev_data *fdata, unsigned long arg) { /* No extension support for now */ @@ -604,46 +604,46 @@ static long fme_ioctl_check_extension(struct dfl_feat= ure_platform_data *pdata, =20 static int fme_open(struct inode *inode, struct file *filp) { - struct dfl_feature_platform_data *pdata =3D dfl_fpga_inode_to_feature_dev= _data(inode); - struct platform_device *fdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D dfl_fpga_inode_to_feature_dev_data= (inode); + struct platform_device *fdev =3D fdata->dev; int ret; =20 - mutex_lock(&pdata->lock); - ret =3D dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL); + mutex_lock(&fdata->lock); + ret =3D dfl_feature_dev_use_begin(fdata, filp->f_flags & O_EXCL); if (!ret) { dev_dbg(&fdev->dev, "Device File Opened %d Times\n", - dfl_feature_dev_use_count(pdata)); - filp->private_data =3D pdata; + dfl_feature_dev_use_count(fdata)); + filp->private_data =3D fdata; } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return ret; } =20 static int fme_release(struct inode *inode, struct file *filp) { - struct dfl_feature_platform_data *pdata =3D filp->private_data; - struct platform_device *pdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D filp->private_data; + struct platform_device *pdev =3D fdata->dev; struct dfl_feature *feature; =20 dev_dbg(&pdev->dev, "Device File Release\n"); =20 - mutex_lock(&pdata->lock); - dfl_feature_dev_use_end(pdata); + mutex_lock(&fdata->lock); + dfl_feature_dev_use_end(fdata); =20 - if (!dfl_feature_dev_use_count(pdata)) - dfl_fpga_dev_for_each_feature(pdata, feature) + if (!dfl_feature_dev_use_count(fdata)) + dfl_fpga_dev_for_each_feature(fdata, feature) dfl_fpga_set_irq_triggers(feature, 0, feature->nr_irqs, NULL); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; } =20 static long fme_ioctl(struct file *filp, unsigned int cmd, unsigned long a= rg) { - struct dfl_feature_platform_data *pdata =3D filp->private_data; - struct platform_device *pdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D filp->private_data; + struct platform_device *pdev =3D fdata->dev; struct dfl_feature *f; long ret; =20 @@ -653,7 +653,7 @@ static long fme_ioctl(struct file *filp, unsigned int c= md, unsigned long arg) case DFL_FPGA_GET_API_VERSION: return DFL_FPGA_API_VERSION; case DFL_FPGA_CHECK_EXTENSION: - return fme_ioctl_check_extension(pdata, arg); + return fme_ioctl_check_extension(fdata, arg); default: /* * Let sub-feature's ioctl function to handle the cmd. @@ -661,7 +661,7 @@ static long fme_ioctl(struct file *filp, unsigned int c= md, unsigned long arg) * handled in this sub feature, and returns 0 or other * error code if cmd is handled. */ - dfl_fpga_dev_for_each_feature(pdata, f) { + dfl_fpga_dev_for_each_feature(fdata, f) { if (f->ops && f->ops->ioctl) { ret =3D f->ops->ioctl(pdev, f, cmd, arg); if (ret !=3D -ENODEV) @@ -675,27 +675,27 @@ static long fme_ioctl(struct file *filp, unsigned int= cmd, unsigned long arg) =20 static int fme_dev_init(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_fme *fme; =20 fme =3D devm_kzalloc(&pdev->dev, sizeof(*fme), GFP_KERNEL); if (!fme) return -ENOMEM; =20 - mutex_lock(&pdata->lock); - dfl_fpga_pdata_set_private(pdata, fme); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_fpga_fdata_set_private(fdata, fme); + mutex_unlock(&fdata->lock); =20 return 0; } =20 static void fme_dev_destroy(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 - mutex_lock(&pdata->lock); - dfl_fpga_pdata_set_private(pdata, NULL); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_fpga_fdata_set_private(fdata, NULL); + mutex_unlock(&fdata->lock); } =20 static const struct file_operations fme_fops =3D { diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c index 97fc0e402edf..b878b260af38 100644 --- a/drivers/fpga/dfl-fme-pr.c +++ b/drivers/fpga/dfl-fme-pr.c @@ -65,7 +65,7 @@ static struct fpga_region *dfl_fme_region_find(struct dfl= _fme *fme, int port_id) =20 static int fme_pr(struct platform_device *pdev, unsigned long arg) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); void __user *argp =3D (void __user *)arg; struct dfl_fpga_fme_port_pr port_pr; struct fpga_image_info *info; @@ -87,7 +87,7 @@ static int fme_pr(struct platform_device *pdev, unsigned = long arg) return -EINVAL; =20 /* get fme header region */ - fme_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + fme_hdr =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 /* check port id */ v =3D readq(fme_hdr + FME_HDR_CAP); @@ -122,8 +122,8 @@ static int fme_pr(struct platform_device *pdev, unsigne= d long arg) =20 info->flags |=3D FPGA_MGR_PARTIAL_RECONFIG; =20 - mutex_lock(&pdata->lock); - fme =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + fme =3D dfl_fpga_fdata_get_private(fdata); /* fme device has been unregistered. */ if (!fme) { ret =3D -EINVAL; @@ -155,7 +155,7 @@ static int fme_pr(struct platform_device *pdev, unsigne= d long arg) =20 put_device(®ion->dev); unlock_exit: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); free_exit: vfree(buf); return ret; @@ -163,16 +163,16 @@ static int fme_pr(struct platform_device *pdev, unsig= ned long arg) =20 /** * dfl_fme_create_mgr - create fpga mgr platform device as child device + * @fdata: fme feature dev data * @feature: sub feature info - * @pdata: fme platform_device's pdata * * Return: mgr platform device if successful, and error code otherwise. */ static struct platform_device * -dfl_fme_create_mgr(struct dfl_feature_platform_data *pdata, +dfl_fme_create_mgr(struct dfl_feature_dev_data *fdata, struct dfl_feature *feature) { - struct platform_device *mgr, *fme =3D pdata->dev; + struct platform_device *mgr, *fme =3D fdata->dev; struct dfl_fme_mgr_pdata mgr_pdata; int ret =3D -ENOMEM; =20 @@ -208,11 +208,11 @@ dfl_fme_create_mgr(struct dfl_feature_platform_data *= pdata, =20 /** * dfl_fme_destroy_mgr - destroy fpga mgr platform device - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data */ -static void dfl_fme_destroy_mgr(struct dfl_feature_platform_data *pdata) +static void dfl_fme_destroy_mgr(struct dfl_feature_dev_data *fdata) { - struct dfl_fme *priv =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_fme *priv =3D dfl_fpga_fdata_get_private(fdata); =20 platform_device_unregister(priv->mgr); } @@ -220,15 +220,15 @@ static void dfl_fme_destroy_mgr(struct dfl_feature_pl= atform_data *pdata) /** * dfl_fme_create_bridge - create fme fpga bridge platform device as child * - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data * @port_id: port id for the bridge to be created. * * Return: bridge platform device if successful, and error code otherwise. */ static struct dfl_fme_bridge * -dfl_fme_create_bridge(struct dfl_feature_platform_data *pdata, int port_id) +dfl_fme_create_bridge(struct dfl_feature_dev_data *fdata, int port_id) { - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_fme_br_pdata br_pdata; struct dfl_fme_bridge *fme_br; int ret =3D -ENOMEM; @@ -237,7 +237,7 @@ dfl_fme_create_bridge(struct dfl_feature_platform_data = *pdata, int port_id) if (!fme_br) return ERR_PTR(ret); =20 - br_pdata.cdev =3D pdata->dfl_cdev; + br_pdata.cdev =3D fdata->dfl_cdev; br_pdata.port_id =3D port_id; =20 fme_br->br =3D platform_device_alloc(DFL_FPGA_FME_BRIDGE, @@ -273,11 +273,11 @@ static void dfl_fme_destroy_bridge(struct dfl_fme_bri= dge *fme_br) =20 /** * dfl_fme_destroy_bridges - destroy all fpga bridge platform device - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data */ -static void dfl_fme_destroy_bridges(struct dfl_feature_platform_data *pdat= a) +static void dfl_fme_destroy_bridges(struct dfl_feature_dev_data *fdata) { - struct dfl_fme *priv =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_fme *priv =3D dfl_fpga_fdata_get_private(fdata); struct dfl_fme_bridge *fbridge, *tmp; =20 list_for_each_entry_safe(fbridge, tmp, &priv->bridge_list, node) { @@ -289,7 +289,7 @@ static void dfl_fme_destroy_bridges(struct dfl_feature_= platform_data *pdata) /** * dfl_fme_create_region - create fpga region platform device as child * - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data * @mgr: mgr platform device needed for region * @br: br platform device needed for region * @port_id: port id @@ -297,12 +297,12 @@ static void dfl_fme_destroy_bridges(struct dfl_featur= e_platform_data *pdata) * Return: fme region if successful, and error code otherwise. */ static struct dfl_fme_region * -dfl_fme_create_region(struct dfl_feature_platform_data *pdata, +dfl_fme_create_region(struct dfl_feature_dev_data *fdata, struct platform_device *mgr, struct platform_device *br, int port_id) { struct dfl_fme_region_pdata region_pdata; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_fme_region *fme_region; int ret =3D -ENOMEM; =20 @@ -352,11 +352,11 @@ static void dfl_fme_destroy_region(struct dfl_fme_reg= ion *fme_region) =20 /** * dfl_fme_destroy_regions - destroy all fme regions - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data */ -static void dfl_fme_destroy_regions(struct dfl_feature_platform_data *pdat= a) +static void dfl_fme_destroy_regions(struct dfl_feature_dev_data *fdata) { - struct dfl_fme *priv =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_fme *priv =3D dfl_fpga_fdata_get_private(fdata); struct dfl_fme_region *fme_region, *tmp; =20 list_for_each_entry_safe(fme_region, tmp, &priv->region_list, node) { @@ -368,7 +368,7 @@ static void dfl_fme_destroy_regions(struct dfl_feature_= platform_data *pdata) static int pr_mgmt_init(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_fme_region *fme_region; struct dfl_fme_bridge *fme_br; struct platform_device *mgr; @@ -377,17 +377,17 @@ static int pr_mgmt_init(struct platform_device *pdev, int ret =3D -ENODEV, i =3D 0; u64 fme_cap, port_offset; =20 - fme_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + fme_hdr =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); - priv =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + priv =3D dfl_fpga_fdata_get_private(fdata); =20 /* Initialize the region and bridge sub device list */ INIT_LIST_HEAD(&priv->region_list); INIT_LIST_HEAD(&priv->bridge_list); =20 /* Create fpga mgr platform device */ - mgr =3D dfl_fme_create_mgr(pdata, feature); + mgr =3D dfl_fme_create_mgr(fdata, feature); if (IS_ERR(mgr)) { dev_err(&pdev->dev, "fail to create fpga mgr pdev\n"); goto unlock; @@ -403,7 +403,7 @@ static int pr_mgmt_init(struct platform_device *pdev, continue; =20 /* Create bridge for each port */ - fme_br =3D dfl_fme_create_bridge(pdata, i); + fme_br =3D dfl_fme_create_bridge(fdata, i); if (IS_ERR(fme_br)) { ret =3D PTR_ERR(fme_br); goto destroy_region; @@ -412,7 +412,7 @@ static int pr_mgmt_init(struct platform_device *pdev, list_add(&fme_br->node, &priv->bridge_list); =20 /* Create region for each port */ - fme_region =3D dfl_fme_create_region(pdata, mgr, + fme_region =3D dfl_fme_create_region(fdata, mgr, fme_br->br, i); if (IS_ERR(fme_region)) { ret =3D PTR_ERR(fme_region); @@ -421,30 +421,30 @@ static int pr_mgmt_init(struct platform_device *pdev, =20 list_add(&fme_region->node, &priv->region_list); } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; =20 destroy_region: - dfl_fme_destroy_regions(pdata); - dfl_fme_destroy_bridges(pdata); - dfl_fme_destroy_mgr(pdata); + dfl_fme_destroy_regions(fdata); + dfl_fme_destroy_bridges(fdata); + dfl_fme_destroy_mgr(fdata); unlock: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret; } =20 static void pr_mgmt_uinit(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 - dfl_fme_destroy_regions(pdata); - dfl_fme_destroy_bridges(pdata); - dfl_fme_destroy_mgr(pdata); - mutex_unlock(&pdata->lock); + dfl_fme_destroy_regions(fdata); + dfl_fme_destroy_bridges(fdata); + dfl_fme_destroy_mgr(fdata); + mutex_unlock(&fdata->lock); } =20 static long fme_pr_ioctl(struct platform_device *pdev, diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 9610ef1ec2ff..52f58d029ca4 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -150,7 +150,7 @@ static LIST_HEAD(dfl_port_ops_list); * * Please note that must dfl_fpga_port_ops_put after use the port_ops. */ -struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_platfor= m_data *pdata) +struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_dev_dat= a *fdata) { struct dfl_fpga_port_ops *ops =3D NULL; =20 @@ -160,7 +160,7 @@ struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct = dfl_feature_platform_data =20 list_for_each_entry(ops, &dfl_port_ops_list, node) { /* match port_ops using the name of platform device */ - if (!strcmp(pdata->dev->name, ops->name)) { + if (!strcmp(fdata->dev->name, ops->name)) { if (!try_module_get(ops->owner)) ops =3D NULL; goto done; @@ -216,21 +216,21 @@ EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del); * * Return: 1 if port device matches with given port id, otherwise 0. */ -int dfl_fpga_check_port_id(struct dfl_feature_platform_data *pdata, void *= pport_id) +int dfl_fpga_check_port_id(struct dfl_feature_dev_data *fdata, void *pport= _id) { struct dfl_fpga_port_ops *port_ops; =20 - if (pdata->id !=3D FEATURE_DEV_ID_UNUSED) - return pdata->id =3D=3D *(int *)pport_id; + if (fdata->id !=3D FEATURE_DEV_ID_UNUSED) + return fdata->id =3D=3D *(int *)pport_id; =20 - port_ops =3D dfl_fpga_port_ops_get(pdata); + port_ops =3D dfl_fpga_port_ops_get(fdata); if (!port_ops || !port_ops->get_id) return 0; =20 - pdata->id =3D port_ops->get_id(pdata); + fdata->id =3D port_ops->get_id(fdata); dfl_fpga_port_ops_put(port_ops); =20 - return pdata->id =3D=3D *(int *)pport_id; + return fdata->id =3D=3D *(int *)pport_id; } EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id); =20 @@ -339,10 +339,10 @@ static void release_dfl_dev(struct device *dev) } =20 static struct dfl_device * -dfl_dev_add(struct dfl_feature_platform_data *pdata, +dfl_dev_add(struct dfl_feature_dev_data *fdata, struct dfl_feature *feature) { - struct platform_device *pdev =3D pdata->dev; + struct platform_device *pdev =3D fdata->dev; struct resource *parent_res; struct dfl_device *ddev; int id, i, ret; @@ -368,11 +368,11 @@ dfl_dev_add(struct dfl_feature_platform_data *pdata, if (ret) goto put_dev; =20 - ddev->type =3D pdata->type; + ddev->type =3D fdata->type; ddev->feature_id =3D feature->id; ddev->revision =3D feature->revision; ddev->dfh_version =3D feature->dfh_version; - ddev->cdev =3D pdata->dfl_cdev; + ddev->cdev =3D fdata->dfl_cdev; if (feature->param_size) { ddev->params =3D kmemdup(feature->params, feature->param_size, GFP_KERNE= L); if (!ddev->params) { @@ -423,11 +423,11 @@ dfl_dev_add(struct dfl_feature_platform_data *pdata, return ERR_PTR(ret); } =20 -static void dfl_devs_remove(struct dfl_feature_platform_data *pdata) +static void dfl_devs_remove(struct dfl_feature_dev_data *fdata) { struct dfl_feature *feature; =20 - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (feature->ddev) { device_unregister(&feature->ddev->dev); feature->ddev =3D NULL; @@ -435,13 +435,13 @@ static void dfl_devs_remove(struct dfl_feature_platfo= rm_data *pdata) } } =20 -static int dfl_devs_add(struct dfl_feature_platform_data *pdata) +static int dfl_devs_add(struct dfl_feature_dev_data *fdata) { struct dfl_feature *feature; struct dfl_device *ddev; int ret; =20 - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (feature->ioaddr) continue; =20 @@ -450,7 +450,7 @@ static int dfl_devs_add(struct dfl_feature_platform_dat= a *pdata) goto err; } =20 - ddev =3D dfl_dev_add(pdata, feature); + ddev =3D dfl_dev_add(fdata, feature); if (IS_ERR(ddev)) { ret =3D PTR_ERR(ddev); goto err; @@ -462,7 +462,7 @@ static int dfl_devs_add(struct dfl_feature_platform_dat= a *pdata) return 0; =20 err: - dfl_devs_remove(pdata); + dfl_devs_remove(fdata); return ret; } =20 @@ -492,12 +492,12 @@ EXPORT_SYMBOL(dfl_driver_unregister); */ void dfl_fpga_dev_feature_uinit(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_feature *feature; =20 - dfl_devs_remove(pdata); + dfl_devs_remove(fdata); =20 - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (feature->ops) { if (feature->ops->uinit) feature->ops->uinit(pdev, feature); @@ -566,13 +566,13 @@ static bool dfl_feature_drv_match(struct dfl_feature = *feature, int dfl_fpga_dev_feature_init(struct platform_device *pdev, struct dfl_feature_driver *feature_drvs) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_feature_driver *drv =3D feature_drvs; struct dfl_feature *feature; int ret; =20 while (drv->ops) { - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (dfl_feature_drv_match(feature, drv)) { ret =3D dfl_feature_instance_init(pdev, feature, drv); if (ret) @@ -582,7 +582,7 @@ int dfl_fpga_dev_feature_init(struct platform_device *p= dev, drv++; } =20 - ret =3D dfl_devs_add(pdata); + ret =3D dfl_devs_add(fdata); if (ret) goto exit; =20 @@ -732,21 +732,21 @@ struct dfl_feature_info { }; =20 static void dfl_fpga_cdev_add_port_data(struct dfl_fpga_cdev *cdev, - struct dfl_feature_platform_data *pdata) + struct dfl_feature_dev_data *fdata) { mutex_lock(&cdev->lock); - list_add(&pdata->node, &cdev->port_dev_list); - get_device(&pdata->dev->dev); + list_add(&fdata->node, &cdev->port_dev_list); + get_device(&fdata->dev->dev); mutex_unlock(&cdev->lock); } =20 -static struct dfl_feature_platform_data * +static struct dfl_feature_dev_data * binfo_create_feature_dev_data(struct build_feature_devs_info *binfo) { enum dfl_id_type type =3D binfo->type; struct platform_device *fdev =3D binfo->feature_dev; - struct dfl_feature_platform_data *pdata; struct dfl_feature_info *finfo, *p; + struct dfl_feature_dev_data *fdata; int ret, index =3D 0, res_idx =3D 0; =20 if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) @@ -758,17 +758,17 @@ binfo_create_feature_dev_data(struct build_feature_de= vs_info *binfo) * it will be automatically freed by device's release() callback, * platform_device_release(). */ - pdata =3D kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_K= ERNEL); - if (!pdata) + fdata =3D kzalloc(struct_size(fdata, features, binfo->feature_num), GFP_K= ERNEL); + if (!fdata) return ERR_PTR(-ENOMEM); =20 - pdata->dev =3D fdev; - pdata->type =3D type; - pdata->num =3D binfo->feature_num; - pdata->dfl_cdev =3D binfo->cdev; - pdata->id =3D FEATURE_DEV_ID_UNUSED; - mutex_init(&pdata->lock); - lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type], + fdata->dev =3D fdev; + fdata->type =3D type; + fdata->num =3D binfo->feature_num; + fdata->dfl_cdev =3D binfo->cdev; + fdata->id =3D FEATURE_DEV_ID_UNUSED; + mutex_init(&fdata->lock); + lockdep_set_class_and_name(&fdata->lock, &dfl_pdata_keys[type], dfl_pdata_key_strings[type]); =20 /* @@ -777,9 +777,9 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) * works properly for port device. * and it should always be 0 for fme device. */ - WARN_ON(pdata->disable_count); + WARN_ON(fdata->disable_count); =20 - fdev->dev.platform_data =3D pdata; + fdev->dev.platform_data =3D fdata; =20 /* each sub feature has one MMIO resource */ fdev->num_resources =3D binfo->feature_num; @@ -790,7 +790,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) =20 /* fill features and resource information for feature dev */ list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { - struct dfl_feature *feature =3D &pdata->features[index++]; + struct dfl_feature *feature =3D &fdata->features[index++]; struct dfl_feature_irq_ctx *ctx; unsigned int i; =20 @@ -848,7 +848,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) kfree(finfo); } =20 - return pdata; + return fdata; } =20 static int @@ -882,19 +882,19 @@ build_info_create_dev(struct build_feature_devs_info = *binfo) =20 static int build_info_commit_dev(struct build_feature_devs_info *binfo) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret; =20 - pdata =3D binfo_create_feature_dev_data(binfo); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); + fdata =3D binfo_create_feature_dev_data(binfo); + if (IS_ERR(fdata)) + return PTR_ERR(fdata); =20 ret =3D platform_device_add(binfo->feature_dev); if (ret) return ret; =20 if (binfo->type =3D=3D PORT_ID) - dfl_fpga_cdev_add_port_data(binfo->cdev, pdata); + dfl_fpga_cdev_add_port_data(binfo->cdev, fdata); else binfo->cdev->fme_dev =3D get_device(&binfo->feature_dev->dev); =20 @@ -1517,13 +1517,13 @@ EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq); =20 static int remove_feature_dev(struct device *dev, void *data) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); struct platform_device *pdev =3D to_platform_device(dev); int id =3D pdev->id; =20 platform_device_unregister(pdev); =20 - dfl_id_free(pdata->type, id); + dfl_id_free(fdata->type, id); =20 return 0; } @@ -1658,15 +1658,15 @@ EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove); * * NOTE: you will need to drop the device reference with put_device() afte= r use. */ -struct dfl_feature_platform_data * +struct dfl_feature_dev_data * __dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct dfl_feature_platform_data *, void *)) + int (*match)(struct dfl_feature_dev_data *, void *)) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; =20 - list_for_each_entry(pdata, &cdev->port_dev_list, node) { - if (match(pdata, data) && get_device(&pdata->dev->dev)) - return pdata; + list_for_each_entry(fdata, &cdev->port_dev_list, node) { + if (match(fdata, data) && get_device(&fdata->dev->dev)) + return fdata; } =20 return NULL; @@ -1705,30 +1705,30 @@ static int __init dfl_fpga_init(void) */ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret =3D -ENODEV; =20 mutex_lock(&cdev->lock); - pdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, + fdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, dfl_fpga_check_port_id); - if (!pdata) + if (!fdata) goto unlock_exit; =20 - if (!device_is_registered(&pdata->dev->dev)) { + if (!device_is_registered(&fdata->dev->dev)) { ret =3D -EBUSY; goto put_dev_exit; } =20 - mutex_lock(&pdata->lock); - ret =3D dfl_feature_dev_use_begin(pdata, true); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + ret =3D dfl_feature_dev_use_begin(fdata, true); + mutex_unlock(&fdata->lock); if (ret) goto put_dev_exit; =20 - platform_device_del(pdata->dev); + platform_device_del(fdata->dev); cdev->released_port_num++; put_dev_exit: - put_device(&pdata->dev->dev); + put_device(&fdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1748,31 +1748,31 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port); */ int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret =3D -ENODEV; =20 mutex_lock(&cdev->lock); - pdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, + fdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, dfl_fpga_check_port_id); - if (!pdata) + if (!fdata) goto unlock_exit; =20 - if (device_is_registered(&pdata->dev->dev)) { + if (device_is_registered(&fdata->dev->dev)) { ret =3D -EBUSY; goto put_dev_exit; } =20 - ret =3D platform_device_add(pdata->dev); + ret =3D platform_device_add(fdata->dev); if (ret) goto put_dev_exit; =20 - mutex_lock(&pdata->lock); - dfl_feature_dev_use_end(pdata); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_feature_dev_use_end(fdata); + mutex_unlock(&fdata->lock); =20 cdev->released_port_num--; put_dev_exit: - put_device(&pdata->dev->dev); + put_device(&fdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1782,11 +1782,11 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port); static void config_port_access_mode(struct device *fme_dev, int port_id, bool is_vf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(fme_dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(fme_dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_PORT_OFST(port_id)); =20 @@ -1810,14 +1810,14 @@ static void config_port_access_mode(struct device *= fme_dev, int port_id, */ void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; =20 mutex_lock(&cdev->lock); - list_for_each_entry(pdata, &cdev->port_dev_list, node) { - if (device_is_registered(&pdata->dev->dev)) + list_for_each_entry(fdata, &cdev->port_dev_list, node) { + if (device_is_registered(&fdata->dev->dev)) continue; =20 - config_port_pf_mode(cdev->fme_dev, pdata->id); + config_port_pf_mode(cdev->fme_dev, fdata->id); } mutex_unlock(&cdev->lock); } @@ -1836,7 +1836,7 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf); */ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret =3D 0; =20 mutex_lock(&cdev->lock); @@ -1850,11 +1850,11 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_c= dev *cdev, int num_vfs) goto done; } =20 - list_for_each_entry(pdata, &cdev->port_dev_list, node) { - if (device_is_registered(&pdata->dev->dev)) + list_for_each_entry(fdata, &cdev->port_dev_list, node) { + if (device_is_registered(&fdata->dev->dev)) continue; =20 - config_port_vf_mode(cdev->fme_dev, pdata->id); + config_port_vf_mode(cdev->fme_dev, fdata->id); } done: mutex_unlock(&cdev->lock); @@ -1987,7 +1987,7 @@ long dfl_feature_ioctl_set_irq(struct platform_device= *pdev, struct dfl_feature *feature, unsigned long arg) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_fpga_irq_set hdr; s32 *fds; long ret; @@ -2007,9 +2007,9 @@ long dfl_feature_ioctl_set_irq(struct platform_device= *pdev, if (IS_ERR(fds)) return PTR_ERR(fds); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); ret =3D dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 kfree(fds); return ret; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index d3a8a8ef908b..bbd74e1744a8 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -208,6 +208,7 @@ #define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */ =20 struct dfl_feature_platform_data; +#define dfl_feature_dev_data dfl_feature_platform_data =20 /** * struct dfl_fpga_port_ops - port ops @@ -222,15 +223,15 @@ struct dfl_fpga_port_ops { const char *name; struct module *owner; struct list_head node; - int (*get_id)(struct dfl_feature_platform_data *pdata); - int (*enable_set)(struct dfl_feature_platform_data *pdata, bool enable); + int (*get_id)(struct dfl_feature_dev_data *fdata); + int (*enable_set)(struct dfl_feature_dev_data *fdata, bool enable); }; =20 void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops *ops); void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops *ops); -struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_platfor= m_data *pdata); +struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_dev_dat= a *fdata); void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops); -int dfl_fpga_check_port_id(struct dfl_feature_platform_data *pdata, void *= pport_id); +int dfl_fpga_check_port_id(struct dfl_feature_dev_data *fdata, void *pport= _id); =20 /** * struct dfl_feature_id - dfl private feature id @@ -336,51 +337,51 @@ struct dfl_feature_platform_data { }; =20 static inline -int dfl_feature_dev_use_begin(struct dfl_feature_platform_data *pdata, +int dfl_feature_dev_use_begin(struct dfl_feature_dev_data *fdata, bool excl) { - if (pdata->excl_open) + if (fdata->excl_open) return -EBUSY; =20 if (excl) { - if (pdata->open_count) + if (fdata->open_count) return -EBUSY; =20 - pdata->excl_open =3D true; + fdata->excl_open =3D true; } - pdata->open_count++; + fdata->open_count++; =20 return 0; } =20 static inline -void dfl_feature_dev_use_end(struct dfl_feature_platform_data *pdata) +void dfl_feature_dev_use_end(struct dfl_feature_dev_data *fdata) { - pdata->excl_open =3D false; + fdata->excl_open =3D false; =20 - if (WARN_ON(pdata->open_count <=3D 0)) + if (WARN_ON(fdata->open_count <=3D 0)) return; =20 - pdata->open_count--; + fdata->open_count--; } =20 static inline -int dfl_feature_dev_use_count(struct dfl_feature_platform_data *pdata) +int dfl_feature_dev_use_count(struct dfl_feature_dev_data *fdata) { - return pdata->open_count; + return fdata->open_count; } =20 static inline -void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata, +void dfl_fpga_fdata_set_private(struct dfl_feature_dev_data *fdata, void *private) { - pdata->private =3D private; + fdata->private =3D private; } =20 static inline -void *dfl_fpga_pdata_get_private(struct dfl_feature_platform_data *pdata) +void *dfl_fpga_fdata_get_private(struct dfl_feature_dev_data *fdata) { - return pdata->private; + return fdata->private; } =20 struct dfl_feature_ops { @@ -413,26 +414,26 @@ dfl_fpga_inode_to_feature_dev_data(struct inode *inod= e) return pdata; } =20 -#define dfl_fpga_dev_for_each_feature(pdata, feature) \ - for ((feature) =3D (pdata)->features; \ - (feature) < (pdata)->features + (pdata)->num; (feature)++) +#define dfl_fpga_dev_for_each_feature(fdata, feature) \ + for ((feature) =3D (fdata)->features; \ + (feature) < (fdata)->features + (fdata)->num; (feature)++) =20 -static inline -struct dfl_feature *dfl_get_feature_by_id(struct dfl_feature_platform_data= *pdata, u16 id) +static inline struct dfl_feature * +dfl_get_feature_by_id(struct dfl_feature_dev_data *fdata, u16 id) { struct dfl_feature *feature; =20 - dfl_fpga_dev_for_each_feature(pdata, feature) + dfl_fpga_dev_for_each_feature(fdata, feature) if (feature->id =3D=3D id) return feature; =20 return NULL; } =20 -static inline -void __iomem *dfl_get_feature_ioaddr_by_id(struct dfl_feature_platform_dat= a *pdata, u16 id) +static inline void __iomem * +dfl_get_feature_ioaddr_by_id(struct dfl_feature_dev_data *fdata, u16 id) { - struct dfl_feature *feature =3D dfl_get_feature_by_id(pdata, id); + struct dfl_feature *feature =3D dfl_get_feature_by_id(fdata, id); =20 if (feature && feature->ioaddr) return feature->ioaddr; @@ -441,10 +442,12 @@ void __iomem *dfl_get_feature_ioaddr_by_id(struct dfl= _feature_platform_data *pda return NULL; } =20 +#define to_dfl_feature_dev_data dev_get_platdata + static inline -struct device *dfl_fpga_pdata_to_parent(struct dfl_feature_platform_data *= pdata) +struct device *dfl_fpga_fdata_to_parent(struct dfl_feature_dev_data *fdata) { - return pdata->dev->dev.parent->parent; + return fdata->dev->dev.parent->parent; } =20 static inline bool dfl_feature_is_fme(void __iomem *base) @@ -531,21 +534,21 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev); * device returned by __dfl_fpga_cdev_find_port and dfl_fpga_cdev_find_port * functions. */ -struct dfl_feature_platform_data * +struct dfl_feature_dev_data * __dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct dfl_feature_platform_data *, void *)); + int (*match)(struct dfl_feature_dev_data *, void *)); =20 -static inline struct dfl_feature_platform_data * +static inline struct dfl_feature_dev_data * dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct dfl_feature_platform_data *, void *)) + int (*match)(struct dfl_feature_dev_data *, void *)) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; =20 mutex_lock(&cdev->lock); - pdata =3D __dfl_fpga_cdev_find_port_data(cdev, data, match); + fdata =3D __dfl_fpga_cdev_find_port_data(cdev, data, match); mutex_unlock(&cdev->lock); =20 - return pdata; + return fdata; } =20 int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id); --=20 2.46.1