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Thu, 19 Sep 2024 09:15:44 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 01/20] dt-bindings: arm: cpus: Add Apple A7-A11 CPU cores Date: Fri, 20 Sep 2024 00:05:50 +0800 Message-ID: <20240919161443.10340-2-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the following CPU cores: - apple,cyclone: A7 cores - apple,typhoon: A8 cores - apple,twister: A9 cores - apple,hurricane-zephyr: A10 logical cores - apple,monsoon: A11 performance cores - apple,mistral: A11 efficiency cores In the Apple A10, there are physical performance-efficiency cores that forms logical cores to software depending on the current p-state, and only one type of core may be active at one time. This follows the existing newest-first order. Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index f308ff6c3532..f69b75afd258 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -87,8 +87,14 @@ properties: enum: - apple,avalanche - apple,blizzard - - apple,icestorm + - apple,cyclone - apple,firestorm + - apple,hurricane-zephyr + - apple,icestorm + - apple,mistral + - apple,monsoon + - apple,twister + - apple,typhoon - arm,arm710t - arm,arm720t - arm,arm740t --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pg1-f182.google.com (mail-pg1-f182.google.com [209.85.215.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC70919CC13; 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charset="utf-8" The blocks on A7-A11 SoCs are compatible with the existing driver so add their per-SoC compatibles. Signed-off-by: Nick Chan Acked-by: Guenter Roeck Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Do= cumentation/devicetree/bindings/watchdog/apple,wdt.yaml index 21872e15916c..310832fa8c28 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -16,6 +16,11 @@ properties: compatible: items: - enum: + - apple,s5l8960x-wdt + - apple,t7000-wdt + - apple,s8000-wdt + - apple,t8010-wdt + - apple,t8015-wdt - apple,t8103-wdt - apple,t8112-wdt - apple,t6000-wdt --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f43.google.com (mail-pj1-f43.google.com [209.85.216.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D9A51A0BCC; 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charset="utf-8" The blocks found on Apple's A7-A11 SoCs are compatible with the existing driver so add their per-SoC compatibles. Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b= /Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml index 9c07935919ea..63737d858944 100644 --- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml @@ -18,6 +18,11 @@ properties: compatible: items: - enum: + - apple,s5l8960x-pinctrl + - apple,t7000-pinctrl + - apple,s8000-pinctrl + - apple,t8010-pinctrl + - apple,t8015-pinctrl - apple,t8103-pinctrl - apple,t8112-pinctrl - apple,t6000-pinctrl --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBE041A2551; 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charset="utf-8" This adds the following apple,s5l8960x platforms: - iPhone 5s - iPad Air (1) - iPad Mini 2 - iPad Mini 3 Acked-by: Conor Dooley Signed-off-by: Nick Chan --- .../devicetree/bindings/arm/apple.yaml | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 883fd67e3752..89c1e35e404b 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -12,7 +12,14 @@ maintainers: description: | ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon". =20 - This currently includes devices based on the "M1" SoC: + This currently includes devices based on the "A7" SoC: + + - iPhone 5s + - iPad Air (1) + - iPad mini 2 + - iPad mini 3 + + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) - MacBook Pro (13-inch, M1, 2020) @@ -65,6 +72,23 @@ properties: const: "/" compatible: oneOf: + - description: Apple A7 SoC based platforms + items: + - enum: + - apple,j71 # iPad Air (Wi-Fi) + - apple,j72 # iPad Air (Cellular) + - apple,j73 # iPad Air (Cellular, China) + - apple,j85 # iPad mini 2 (Wi-Fi) + - apple,j85m # iPad mini 3 (Wi-Fi) + - apple,j86 # iPad mini 2 (Cellular) + - apple,j86m # iPad mini 3 (Cellular) + - apple,j87 # iPad mini 2 (Cellular, China) + - apple,j87m # iPad mini 3 (Cellular, China) + - apple,n51 # iPhone 5s (GSM) + - apple,n53 # iPhone 5s (LTE) + - const: apple,s5l8960x + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pg1-f174.google.com (mail-pg1-f174.google.com [209.85.215.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D57B51A2866; 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charset="utf-8" This adds the following apple,t7000 based platforms: - iPhone 6 - iPhone 6 Plus - iPad mini 4 - iPod touch 6 - Apple TV HD The remaining HomePod is not supported as part of this patch. Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/arm/apple.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 89c1e35e404b..c05a4414c8b6 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -19,6 +19,14 @@ description: | - iPad mini 2 - iPad mini 3 =20 + Devices based on the "A8" SoC: + + - iPhone 6 + - iPhone 6 Plus + - iPad mini 4 + - iPod touch 6 + - Apple TV HD + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -89,6 +97,18 @@ properties: - const: apple,s5l8960x - const: apple,arm-platform =20 + - description: Apple A8 SoC based platforms + items: + - enum: + - apple,j42d # Apple TV HD + - apple,j96 # iPad mini 4 (Wi-Fi) + - apple,j97 # iPad mini 4 (Cellular) + - apple,n56 # iPhone 6 Plus + - apple,n61 # iPhone 6 + - apple,n102 # iPod touch 6 + - const: apple,t7000 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f50.google.com (mail-pj1-f50.google.com [209.85.216.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D17D91A2C23; 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charset="utf-8" Add the only platform based on apple,t7001, the iPad Air 2. Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/apple.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index c05a4414c8b6..fecc4953df33 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -27,6 +27,10 @@ description: | - iPod touch 6 - Apple TV HD =20 + Device based on the "A8X" SoC: + + - iPad Air 2 + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -109,6 +113,14 @@ properties: - const: apple,t7000 - const: apple,arm-platform =20 + - description: Apple A8X SoC based platforms + items: + - enum: + - apple,j81 # iPad Air 2 (Wi-Fi) + - apple,j82 # iPad Air 2 (Cellular) + - const: apple,t7001 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D97C01A08DD; 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charset="utf-8" Adds the following apple,s8000 and apple,s8003 based platforms: - iPhone 6s - iPhone 6s Plus - iPhone SE (2016) - iPad 5 apple,s8000 is the Samsung A9, while apple,s8003 is the TSMC A9. Signed-off-by: Nick Chan Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/arm/apple.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index fecc4953df33..01965890b4ef 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -31,6 +31,13 @@ description: | =20 - iPad Air 2 =20 + Devices based on the "A9" SoC: + + - iPhone 6s + - iPhone 6s Plus + - iPhone SE (2016) + - iPad 5 + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -121,6 +128,28 @@ properties: - const: apple,t7001 - const: apple,arm-platform =20 + - description: Apple Samsung A9 SoC based platforms + items: + - enum: + - apple,j71s # iPad 5 (Wi-Fi) (S8000) + - apple,j72s # iPad 5 (Cellular) (S8000) + - apple,n66 # iPhone 6s Plus (S8000) + - apple,n69u # iPhone SE (S8000) + - apple,n71 # iPhone 6S (S8000) + - const: apple,s8000 + - const: apple,arm-platform + + - description: Apple TSMC A9 SoC based platforms + items: + - enum: + - apple,j71t # iPad 5 (Wi-Fi) (S8003) + - apple,j72t # iPad 5 (Cellular) (S8003) + - apple,n66m # iPhone 6s Plus (S8003) + - apple,n69 # iPhone SE (S8003) + - apple,n71m # iPhone 6S (S8003) + - const: apple,s8003 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pg1-f171.google.com (mail-pg1-f171.google.com [209.85.215.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C3331A3BB4; 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charset="utf-8" Adds the following apple,s8001 based platforms: - iPad Pro (9.7 Inch) - iPad Pro (12.9 Inch) (1st generation) Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/apple.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 01965890b4ef..253dae759f10 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -38,6 +38,11 @@ description: | - iPhone SE (2016) - iPad 5 =20 + Devices based on the "A9X" SoC: + + - iPad Pro (9.7-inch) + - iPad Pro (12.9-inch) + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -150,6 +155,16 @@ properties: - const: apple,s8003 - const: apple,arm-platform =20 + - description: Apple A9X SoC based platforms + items: + - enum: + - apple,j127 # iPad Pro (9.7-inch) (Wi-Fi) + - apple,j128 # iPad Pro (9.7-inch) (Cellular) + - apple,j98a # iPad Pro (12.9-inch) (Wi-Fi) + - apple,j99a # iPad Pro (12.9-inch) (Cellular) + - const: apple,s8001 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f49.google.com (mail-pj1-f49.google.com [209.85.216.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48B281A3BB4; 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charset="utf-8" Adds the following apple,t8010 based platforms: - iPhone 7 - iPhone 7 Plus - iPod touch 7 - iPad 6 - iPad 7 Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/arm/apple.yaml | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 253dae759f10..b6a2916fb0f6 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -43,6 +43,14 @@ description: | - iPad Pro (9.7-inch) - iPad Pro (12.9-inch) =20 + Devices based on the "A10" SoC: + + - iPhone 7 + - iPhone 7 Plus + - iPod touch 7 + - iPad 6 + - iPad 7 + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -165,6 +173,21 @@ properties: - const: apple,s8001 - const: apple,arm-platform =20 + - description: Apple A10 SoC based platforms + items: + - enum: + - apple,d10 # iPhone 7 (Qualcomm) + - apple,d11 # iPhone 7 (Intel) + - apple,d101 # iPhone 7 Plus (Qualcomm) + - apple,d111 # iPhone 7 Plus (Intel) + - apple,j71b # iPad 6 (Wi-Fi) + - apple,j72b # iPad 6 (Cellular) + - apple,j171 # iPad 7 (Wi-Fi) + - apple,j172 # iPad 7 (Cellular) + - apple,n112 # iPod touch 7 + - const: apple,t8010 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pg1-f178.google.com (mail-pg1-f178.google.com [209.85.215.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71FB41A4AAB; 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charset="utf-8" Add the following apple,t8011 based platforms: - Apple TV 4K - iPad Pro (2nd Generation) (10.5 Inch) - iPad Pro (2nd Generation) (12.9 Inch) Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/arm/apple.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index b6a2916fb0f6..96efadad15a6 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -51,6 +51,12 @@ description: | - iPad 6 - iPad 7 =20 + Devices based on the "A10X" SoC: + + - Apple TV 4K (1st generation) + - iPad Pro (2nd Generation) (10.5 Inch) + - iPad Pro (2nd Generation) (12.9 Inch) + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -188,6 +194,17 @@ properties: - const: apple,t8010 - const: apple,arm-platform =20 + - description: Apple A10X SoC based platforms + items: + - enum: + - apple,j105a # Apple TV 4K (1st Generation) + - apple,j120 # iPad Pro 2 (12.9-inch) (Wi-Fi) + - apple,j121 # iPad Pro 2 (12.9-inch) (Cellular) + - apple,j207 # iPad Pro 2 (10.5-inch) (Wi-Fi) + - apple,j208 # iPad Pro 2 (10.5-inch) (Cellular) + - const: apple,t8011 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60A501A4B9F; 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charset="utf-8" Add the follow apple,t8015 based platforms: - iPhone 8 - iPhone 8 Plus - iPhone X Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/arm/apple.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 96efadad15a6..dc9aab19ff11 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -57,6 +57,12 @@ description: | - iPad Pro (2nd Generation) (10.5 Inch) - iPad Pro (2nd Generation) (12.9 Inch) =20 + Devices based on the "A11" SoC: + + - iPhone 8 + - iPhone 8 Plus + - iPhone X + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -205,6 +211,18 @@ properties: - const: apple,t8011 - const: apple,arm-platform =20 + - description: Apple A11 SoC based platforms + items: + - enum: + - apple,d20 # iPhone 8 (Global) + - apple,d21 # iPhone 8 Plus (Global) + - apple,d22 # iPhone X (Global) + - apple,d201 # iPhone 8 (GSM) + - apple,d211 # iPhone 8 Plus (GSM) + - apple,d221 # iPhone X (GSM) + - const: apple,t8015 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f53.google.com (mail-pj1-f53.google.com [209.85.216.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F081C1A4F14; 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charset="utf-8" From: Konrad Dybcio Add DTS files for the A7 SoC and the following devices based on it: - iPhone 5s - iPad Air (1) - iPad mini 2 - iPad mini 3 Signed-off-by: Konrad Dybcio [Nick: SMP and m1n1 support, gpio-keys additions] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 11 ++ arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi | 54 +++++++ arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi | 54 +++++++ arch/arm64/boot/dts/apple/s5l8960x-j71.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j72.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j73.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j85.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j85m.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j86.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j86m.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j87.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-j87m.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi | 54 +++++++ arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-n51.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x-n53.dts | 14 ++ arch/arm64/boot/dts/apple/s5l8960x.dtsi | 146 ++++++++++++++++++ 17 files changed, 487 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j71.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j72.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j73.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j85.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j85m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j86.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j86m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j87.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j87m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-n51.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-n53.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index aec5e29cdfb7..e1ee803f72a7 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -1,4 +1,15 @@ # SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j71.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j73.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j85m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j86m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j87m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-n53.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j72.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j85.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j86.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j87.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-n51.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi b/arch/arm64/boot/d= ts/apple/s5l8960x-5s.dtsi new file mode 100644 index 000000000000..4da68f610747 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 5s common device tree + * Based on A7 (APL0698), up to 1.3GHz + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "s5l8960x.dtsi" +#include + +/ { + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 2 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 3 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 4 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl 16 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi b/arch/arm64/boot= /dts/apple/s5l8960x-air1.dtsi new file mode 100644 index 000000000000..9afc1b0600b8 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air common device tree + * Based on A7 (APL5698), up to 1.4GHz + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "s5l8960x.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 2 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 3 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 4 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl 110 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j71.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-j71.dts new file mode 100644 index 000000000000..e13036dacb45 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j71.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air (Wi-Fi), J71, iPad4,1 (A1474) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-air1.dtsi" + +/ { + compatible =3D "apple,j71", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad Air (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j72.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-j72.dts new file mode 100644 index 000000000000..afb71b8885c6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j72.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air (Cellular), J72, iPad4,2 (A1475) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-air1.dtsi" + +/ { + compatible =3D "apple,j72", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad Air (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j73.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-j73.dts new file mode 100644 index 000000000000..c871962df529 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j73.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air (Cellular, China), J73, iPad4,2 (A1476) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-air1.dtsi" + +/ { + compatible =3D "apple,j73", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad Air (Cellular, China)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j85.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-j85.dts new file mode 100644 index 000000000000..aefb7b36d7aa --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j85.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 2 (Wi-Fi), J85, iPad4,4 (A1489) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-mini2.dtsi" + +/ { + compatible =3D "apple,j85", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad mini 2 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts b/arch/arm64/boot/= dts/apple/s5l8960x-j85m.dts new file mode 100644 index 000000000000..ec2bcaa6d1d5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j85m.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 3 (Wi-Fi), J85m, iPad4,7 (A1599) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-mini3.dtsi" + +/ { + compatible =3D "apple,j85m", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad mini 3 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j86.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-j86.dts new file mode 100644 index 000000000000..470f2f825e70 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j86.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 2 (Cellular), J86, iPad4,5 (A1490) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-mini2.dtsi" + +/ { + compatible =3D "apple,j86", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad mini 2 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts b/arch/arm64/boot/= dts/apple/s5l8960x-j86m.dts new file mode 100644 index 000000000000..90311d98aaad --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j86m.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 3 (Cellular), J86m, iPad4,8 (A1600) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-mini3.dtsi" + +/ { + compatible =3D "apple,j86m", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad mini 3 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j87.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-j87.dts new file mode 100644 index 000000000000..3580fd8e3831 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j87.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 2 (Cellular, China), J87, iPad4,6 (A1491) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-mini2.dtsi" + +/ { + compatible =3D "apple,j87", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad mini 2 (Cellular, China)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts b/arch/arm64/boot/= dts/apple/s5l8960x-j87m.dts new file mode 100644 index 000000000000..fa0da4fa6727 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-j87m.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 3 (Cellular, China), J87m, iPad4,9 (A1601) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-mini3.dtsi" + +/ { + compatible =3D "apple,j87m", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPad mini 3 (Cellular, China)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi b/arch/arm64/boo= t/dts/apple/s5l8960x-mini2.dtsi new file mode 100644 index 000000000000..778f470b5fd9 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 2 common device tree + * Based on A7 (APL0698), up to 1.3GHz + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "s5l8960x.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 2 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 3 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 4 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl 6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi b/arch/arm64/boo= t/dts/apple/s5l8960x-mini3.dtsi new file mode 100644 index 000000000000..4e397b3d7d7a --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 3 common device tree + * Based on A7 (APL0698), up to 1.3GHz + * + * Copyright (c) 2022, Konrad Dybcio + */ + +/* + * The Mini 3 seems to be only an iteration over the Mini 2 with some + * small changes, like the introduction of Touch ID, hence there is little + * to no differentiation between these 2 for now. + */ +#include "s5l8960x-mini2.dtsi" diff --git a/arch/arm64/boot/dts/apple/s5l8960x-n51.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-n51.dts new file mode 100644 index 000000000000..cd52f814fbf2 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-n51.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 5s (GSM), N51, iPhone6,1 (A1453/A1533) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-5s.dtsi" + +/ { + compatible =3D "apple,n51", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPhone 5s (GSM)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x-n53.dts b/arch/arm64/boot/d= ts/apple/s5l8960x-n53.dts new file mode 100644 index 000000000000..4795798a4444 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-n53.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 5s (LTE), N53, iPhone6,2 (A1457/A1518/A1528/A1530) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s5l8960x-5s.dtsi" + +/ { + compatible =3D "apple,n53", "apple,s5l8960x", "apple,arm-platform"; + model =3D "Apple iPhone 5s (LTE)"; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x.dtsi b/arch/arm64/boot/dts/= apple/s5l8960x.dtsi new file mode 100644 index 000000000000..b36c06a6d96c --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x.dtsi @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple S5L8960X "A7" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,cyclone"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,cyclone"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0a0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0a0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + wdt: watchdog@20e027000 { + compatible =3D "apple,s5l8960x-wdt", "apple,wdt"; + reg =3D <0x2 0x0e027000 0x0 0x1000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,s5l8960x-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl: pinctrl@20e300000 { + compatible =3D "apple,s5l8960x-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0e300000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl 0 0 200>; + apple,npins =3D <200>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt"; + /* Note that A7 doesn't actually have a hypervisor (EL2 is not implement= ed). */ + interrupts =3D , + ; + }; +}; --=20 2.46.0 From nobody Fri Nov 29 12:46:17 2024 Received: from mail-pj1-f49.google.com (mail-pj1-f49.google.com [209.85.216.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B06AE1A0BC6; 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Thu, 19 Sep 2024 09:16:35 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-2dd6eed1865sm2084674a91.34.2024.09.19.09.16.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Sep 2024 09:16:35 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 13/20] arm64: dts: apple: Add A8 devices Date: Fri, 20 Sep 2024 00:06:02 +0800 Message-ID: <20240919161443.10340-14-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add DTS files for the A8 SoC and the following devices based on it: - iPhone 6 - iPhone 6 Plus - iPad mini 4 - iPod touch 6 - Apple TV HD The remaining HomePod is not supported as part of this patch. Signed-off-by: Konrad Dybcio [Ivalyo: system memory bits, iPhone 6 gpio-keys, pinctrl] Co-developed-by: Ivaylo Ivanov Signed-off-by: Ivaylo Ivanov [Nick: SMP and m1n1 support, gpio-keys additions] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 6 + arch/arm64/boot/dts/apple/t7000-6.dtsi | 52 ++++++++ arch/arm64/boot/dts/apple/t7000-j42d.dts | 19 +++ arch/arm64/boot/dts/apple/t7000-j96.dts | 14 ++ arch/arm64/boot/dts/apple/t7000-j97.dts | 14 ++ arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 53 ++++++++ arch/arm64/boot/dts/apple/t7000-n102.dts | 50 +++++++ arch/arm64/boot/dts/apple/t7000-n56.dts | 14 ++ arch/arm64/boot/dts/apple/t7000-n61.dts | 14 ++ arch/arm64/boot/dts/apple/t7000.dtsi | 146 +++++++++++++++++++++ 10 files changed, 382 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t7000-6.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-j42d.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-j96.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-j97.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-mini4.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-n102.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-n56.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-n61.dts create mode 100644 arch/arm64/boot/dts/apple/t7000.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index e1ee803f72a7..d5dd1e2e4f4c 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -10,6 +10,12 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j85.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j86.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-j87.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s5l8960x-n51.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-j42d.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-j96.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-j97.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n102.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n56.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n61.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/t7000-6.dtsi b/arch/arm64/boot/dts/a= pple/t7000-6.dtsi new file mode 100644 index 000000000000..3802e853af42 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-6.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6 / 6 Plus common device tree + * Copyright (c) 2022, Konrad Dybcio + */ + +#include +#include "t7000.dtsi" + +/ { + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 32 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 33 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 45 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 46 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl 131 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-j42d.dts b/arch/arm64/boot/dts= /apple/t7000-j42d.dts new file mode 100644 index 000000000000..88bc6ff68f25 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-j42d.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple TV HD, J42d, AppleTV5,3 (A1625) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7000.dtsi" + +/ { + compatible =3D "apple,j42d", "apple,t7000", "apple,arm-platform"; + model =3D "Apple TV HD"; + chassis-type =3D "television"; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-j96.dts b/arch/arm64/boot/dts/= apple/t7000-j96.dts new file mode 100644 index 000000000000..8a32a50cc2df --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-j96.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 4 (Wi-Fi), J96, iPad5,1 (A1538) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7000-mini4.dtsi" + +/ { + compatible =3D "apple,j96", "apple,t7000", "apple,arm-platform"; + model =3D "Apple iPad mini 4 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-j97.dts b/arch/arm64/boot/dts/= apple/t7000-j97.dts new file mode 100644 index 000000000000..ac7d501f88d2 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-j97.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 4 (Cellular), J97, iPad5,2 (A1550) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7000-mini4.dtsi" + +/ { + compatible =3D "apple,j97", "apple,t7000", "apple,arm-platform"; + model =3D "Apple iPad mini 4 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi b/arch/arm64/boot/d= ts/apple/t7000-mini4.dtsi new file mode 100644 index 000000000000..c0fcdc900d01 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad mini 4 common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t7000.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 32 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 33 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 45 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 46 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl 36 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-n102.dts b/arch/arm64/boot/dts= /apple/t7000-n102.dts new file mode 100644 index 000000000000..81fb62dce5bc --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-n102.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPod touch 6, N102, iPod7,1 (A1574) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include +#include "t7000.dtsi" + +/ { + compatible =3D "apple,n102", "apple,t7000", "apple,arm-platform"; + model =3D "Apple iPod touch 6"; + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 32 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 33 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 46 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 45 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-n56.dts b/arch/arm64/boot/dts/= apple/t7000-n56.dts new file mode 100644 index 000000000000..2c358df14458 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-n56.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6 Plus, N56, iPhone7,2 (A1549/A1586/A1589) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7000-6.dtsi" + +/ { + compatible =3D "apple,n56", "apple,t7000", "apple,arm-platform"; + model =3D "Apple iPhone 6 Plus"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-n61.dts b/arch/arm64/boot/dts/= apple/t7000-n61.dts new file mode 100644 index 000000000000..10b4ca8babf7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000-n61.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6, N61, iPhone7,2 (A1549/A1586/A1589) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7000-6.dtsi" + +/ { + compatible =3D "apple,n61", "apple,t7000", "apple,arm-platform"; + model =3D "Apple iPhone 6"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/app= le/t7000.dtsi new file mode 100644 index 000000000000..b766129ad472 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7000.dtsi @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T7000 "A8" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,typhoon"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,typhoon"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + wdt: watchdog@20e027000 { + compatible =3D "apple,t7000-wdt", "apple,wdt"; + reg =3D <0x2 0x0e027000 0x0 0x1000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,t7000-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl: pinctrl@20e300000 { + compatible =3D "apple,t7000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0e300000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl 0 0 208>; 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Thu, 19 Sep 2024 09:16:40 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-2dd6eed1865sm2084674a91.34.2024.09.19.09.16.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Sep 2024 09:16:39 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 14/20] arm64: dts: apple: Add A8X devices Date: Fri, 20 Sep 2024 00:06:03 +0800 Message-ID: <20240919161443.10340-15-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add DTS files for the A8X SoC and the only device based on it, the iPad Air 2. Signed-off-by: Konrad Dybcio [Nick: SMP, m1n1 and gpio-keys support, pinctrl fixes] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 2 + arch/arm64/boot/dts/apple/t7001-air2.dtsi | 46 +++++++ arch/arm64/boot/dts/apple/t7001-j81.dts | 14 ++ arch/arm64/boot/dts/apple/t7001-j82.dts | 14 ++ arch/arm64/boot/dts/apple/t7001.dtsi | 154 ++++++++++++++++++++++ 5 files changed, 230 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t7001-air2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-j81.dts create mode 100644 arch/arm64/boot/dts/apple/t7001-j82.dts create mode 100644 arch/arm64/boot/dts/apple/t7001.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index d5dd1e2e4f4c..adda522ea490 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -16,6 +16,8 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-j97.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n102.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n56.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n61.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7001-j81.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t7001-j82.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/t7001-air2.dtsi b/arch/arm64/boot/dt= s/apple/t7001-air2.dtsi new file mode 100644 index 000000000000..8ecf2842e8e5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-air2.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air 2 common device tree + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t7001.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl 0 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl 1 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl 92 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl 93 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7001-j81.dts b/arch/arm64/boot/dts/= apple/t7001-j81.dts new file mode 100644 index 000000000000..ca90dc0c872c --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-j81.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air 2 (Wi-Fi), J81, iPad5,3 (A1566) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7001-air2.dtsi" + +/ { + compatible =3D "apple,j81", "apple,t7001", "apple,arm-platform"; + model =3D "Apple iPad Air 2 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t7001-j82.dts b/arch/arm64/boot/dts/= apple/t7001-j82.dts new file mode 100644 index 000000000000..d9fd16f48db7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-j82.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air 2 (Cellular), J82, iPad5,4 (A1567) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7001-air2.dtsi" + +/ { + compatible =3D "apple,j82", "apple,t7001", "apple,arm-platform"; + model =3D "Apple iPad Air 2 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t7001.dtsi b/arch/arm64/boot/dts/app= le/t7001.dtsi new file mode 100644 index 000000000000..9a5f0a4bde52 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001.dtsi @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T7001 "A8X" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,typhoon"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,typhoon"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu2: cpu@2 { + compatible =3D "apple,typhoon"; + reg =3D <0x0 0x2>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled in by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + wdt: watchdog@20e027000 { + compatible =3D "apple,t7000-wdt", "apple,wdt"; + reg =3D <0x2 0x0e027000 0x0 0x1000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,t7000-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl: pinctrl@20e300000 { + compatible =3D "apple,t7000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0e300000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl 0 0 184>; + apple,npins =3D <184>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt"; + /* Note that A8X doesn't actually have a hypervisor (EL2 is not implemen= ted). */ + interrupts =3D , + ; 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Thu, 19 Sep 2024 09:16:43 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 15/20] arm64: dts: apple: Add A9 devices Date: Fri, 20 Sep 2024 00:06:04 +0800 Message-ID: <20240919161443.10340-16-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add DTS files for the A9 SoC and the following devices based on it: - iPhone 6s - iPhone 6s Plus - iPhone SE (2016) - iPad 5 Signed-off-by: Konrad Dybcio [Nick: SMP, m1n1 and AOP pinctrl support] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 10 ++ arch/arm64/boot/dts/apple/s8000-j71s.dts | 15 ++ arch/arm64/boot/dts/apple/s8000-j72s.dts | 15 ++ arch/arm64/boot/dts/apple/s8000-n66.dts | 15 ++ arch/arm64/boot/dts/apple/s8000-n69u.dts | 15 ++ arch/arm64/boot/dts/apple/s8000-n71.dts | 15 ++ arch/arm64/boot/dts/apple/s8000.dtsi | 178 +++++++++++++++++++++ arch/arm64/boot/dts/apple/s8003-j71t.dts | 15 ++ arch/arm64/boot/dts/apple/s8003-j72t.dts | 15 ++ arch/arm64/boot/dts/apple/s8003-n66m.dts | 15 ++ arch/arm64/boot/dts/apple/s8003-n69.dts | 15 ++ arch/arm64/boot/dts/apple/s8003-n71m.dts | 15 ++ arch/arm64/boot/dts/apple/s8003.dtsi | 19 +++ arch/arm64/boot/dts/apple/s800x-6s.dtsi | 52 ++++++ arch/arm64/boot/dts/apple/s800x-ipad5.dtsi | 46 ++++++ arch/arm64/boot/dts/apple/s800x-se.dtsi | 52 ++++++ 16 files changed, 507 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/s8000-j71s.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-j72s.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n66.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n69u.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n71.dts create mode 100644 arch/arm64/boot/dts/apple/s8000.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8003-j71t.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-j72t.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n66m.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n69.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n71m.dts create mode 100644 arch/arm64/boot/dts/apple/s8003.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-6s.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-ipad5.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-se.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index adda522ea490..cbb7e409b7e3 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -18,6 +18,16 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n56.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t7000-n61.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t7001-j81.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t7001-j82.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8000-j71s.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8000-j72s.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8000-n66.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8000-n69u.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8000-n71.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-j71t.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-j72t.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n66m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n69.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n71m.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/s8000-j71s.dts b/arch/arm64/boot/dts= /apple/s8000-j71s.dts new file mode 100644 index 000000000000..b5a2dfa1121e --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8000-j71s.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 5 (Wi-Fi) (Samsung), J71s, iPad6,11 (A1822) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8000.dtsi" +#include "s800x-ipad5.dtsi" + +/ { + compatible =3D "apple,j71s", "apple,s8000", "apple,arm-platform"; + model =3D "Apple iPad 5 (Wi-Fi) (Samsung)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8000-j72s.dts b/arch/arm64/boot/dts= /apple/s8000-j72s.dts new file mode 100644 index 000000000000..8f3dea5adb09 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8000-j72s.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 5 (Cellular) (Samsung), J72s, iPad6,12 (A1823) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8000.dtsi" +#include "s800x-ipad5.dtsi" + +/ { + compatible =3D "apple,j72s", "apple,s8000", "apple,arm-platform"; + model =3D "Apple iPad 5 (Cellular) (Samsung)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8000-n66.dts b/arch/arm64/boot/dts/= apple/s8000-n66.dts new file mode 100644 index 000000000000..30b4b6630b60 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8000-n66.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6s Plus (Samsung), N66, iPhone8,2 (A1634/A1687/A1690/A1699) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8000.dtsi" +#include "s800x-6s.dtsi" + +/ { + compatible =3D "apple,n66", "apple,s8000", "apple,arm-platform"; + model =3D "Apple iPhone 6s Plus (Samsung)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8000-n69u.dts b/arch/arm64/boot/dts= /apple/s8000-n69u.dts new file mode 100644 index 000000000000..e63bc2e7f7c1 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8000-n69u.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone SE (Samsung), N69u, iPhone8,4 (A1662/A1723/A1724) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8000.dtsi" +#include "s800x-se.dtsi" + +/ { + compatible =3D "apple,n69u", "apple,s8000", "apple,arm-platform"; + model =3D "Apple iPhone SE (Samsung)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8000-n71.dts b/arch/arm64/boot/dts/= apple/s8000-n71.dts new file mode 100644 index 000000000000..f2964a1fc434 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8000-n71.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6s (Samsung), N71, iPhone8,1 (A1633/A1688/A1691/A1700) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8000.dtsi" +#include "s800x-6s.dtsi" + +/ { + compatible =3D "apple,n71", "apple,s8000", "apple,arm-platform"; + model =3D "Apple iPhone 6s (Samsung)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8000.dtsi b/arch/arm64/boot/dts/app= le/s8000.dtsi new file mode 100644 index 000000000000..18488f71a5c8 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8000.dtsi @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple S8000 "A9 (Samsung)" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,twister"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,twister"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,s8000-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl_ap: pinctrl@20f100000 { + compatible =3D "apple,s8000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0f100000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 208>; + apple,npins =3D <208>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2100f0000 { + compatible =3D "apple,s8000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x100f0000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 42>; + apple,npins =3D <42>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + wdt: watchdog@2102b0000 { + compatible =3D "apple,s8000-wdt", "apple,wdt"; + reg =3D <0x2 0x102b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt"; + /* Note that A9 doesn't actually have a hypervisor (EL2 is not implement= ed). */ + interrupts =3D , + ; + }; +}; + +/* + * The A9 was made by two separate fabs on two different process + * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made + * the S8003 (APL1022) on 16nm. While they are seemingly the same, + * they do have distinct part numbers and devices using them have + * distinct model names. There are currently no known differences + * between these as far as Linux is concerned, but let's keep things + * structured properly to make it easier to alter the behaviour of + * one of the chips if need be. + */ diff --git a/arch/arm64/boot/dts/apple/s8003-j71t.dts b/arch/arm64/boot/dts= /apple/s8003-j71t.dts new file mode 100644 index 000000000000..0d906ae80b07 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8003-j71t.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 5 (Wi-Fi) (TSMC), J71t, iPad6,11 (A1822) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8003.dtsi" +#include "s800x-ipad5.dtsi" + +/ { + compatible =3D "apple,j71t", "apple,s8003", "apple,arm-platform"; + model =3D "Apple iPad 5 (Wi-Fi) (TSMC)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8003-j72t.dts b/arch/arm64/boot/dts= /apple/s8003-j72t.dts new file mode 100644 index 000000000000..0cd7d88e9dfb --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8003-j72t.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 5 (Cellular) (TSMC), J72t, iPad6,12 (A1823) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8003.dtsi" +#include "s800x-ipad5.dtsi" + +/ { + compatible =3D "apple,j72t", "apple,s8003", "apple,arm-platform"; + model =3D "Apple iPad 5 (Cellular) (TSMC)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8003-n66m.dts b/arch/arm64/boot/dts= /apple/s8003-n66m.dts new file mode 100644 index 000000000000..4146cd28160d --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8003-n66m.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6s Plus (TSMC), N66m, iPhone8,2 (A1634/A1687/A1690/A1699) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8003.dtsi" +#include "s800x-6s.dtsi" + +/ { + compatible =3D "apple,n66m", "apple,s8003", "apple,arm-platform"; + model =3D "Apple iPhone 6s Plus (TSMC)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8003-n69.dts b/arch/arm64/boot/dts/= apple/s8003-n69.dts new file mode 100644 index 000000000000..8eed879b155e --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8003-n69.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone SE (TSMC), N69, iPhone8,4 (A1662/A1723/A1724) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8003.dtsi" +#include "s800x-se.dtsi" + +/ { + compatible =3D "apple,n69", "apple,s8003", "apple,arm-platform"; + model =3D "Apple iPhone SE (TSMC)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8003-n71m.dts b/arch/arm64/boot/dts= /apple/s8003-n71m.dts new file mode 100644 index 000000000000..7ec6d2cda0bf --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8003-n71m.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6s (TSMC), N71m, iPhone8,1 (A1633/A1688/A1691/A1700) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8003.dtsi" +#include "s800x-6s.dtsi" + +/ { + compatible =3D "apple,n71m", "apple,s8003", "apple,arm-platform"; + model =3D "Apple iPhone 6s (TSMC)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8003.dtsi b/arch/arm64/boot/dts/app= le/s8003.dtsi new file mode 100644 index 000000000000..52094a634678 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8003.dtsi @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple S8003 "A9 (TSMC)" SoC + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "s8000.dtsi" + +/* + * The A9 was made by two separate fabs on two different process + * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made + * the S8003 (APL1022) on 16nm. While they are seemingly the same, + * they do have distinct part numbers and devices using them have + * distinct model names. There are currently no known differences + * between these as far as Linux is concerned, but let's keep things + * structured properly to make it easier to alter the behaviour of + * one of the chips if need be. + */ diff --git a/arch/arm64/boot/dts/apple/s800x-6s.dtsi b/arch/arm64/boot/dts/= apple/s800x-6s.dtsi new file mode 100644 index 000000000000..b5610258da25 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s800x-6s.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 6s / 6S Plus common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include + +/ { + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 96 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 97 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 67 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 66 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl_ap 149 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi b/arch/arm64/boot/d= ts/apple/s800x-ipad5.dtsi new file mode 100644 index 000000000000..a831131f16f3 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s800x-ipad5.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 5 common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 96 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 97 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 143 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 144 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s800x-se.dtsi b/arch/arm64/boot/dts/= apple/s800x-se.dtsi new file mode 100644 index 000000000000..3699114188a8 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s800x-se.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone SE common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include + +/ { + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 96 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 97 GPIO_ACTIVE_LOW>; + linux,code =3D ; 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Thu, 19 Sep 2024 09:16:48 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-2dd6eed1865sm2084674a91.34.2024.09.19.09.16.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Sep 2024 09:16:48 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 16/20] arm64: dts: apple: Add A9X devices Date: Fri, 20 Sep 2024 00:06:05 +0800 Message-ID: <20240919161443.10340-17-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add the device tree for the A9X SoC and the devices based on it: - iPad Pro (9.7 Inch) - iPad Pro (12.9 Inch) (1st generation) Signed-off-by: Konrad Dybcio [Nick: SMP and m1n1 support, uart interrupt and pinctrl fixes] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 4 + arch/arm64/boot/dts/apple/s8001-j127.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-j128.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-j98a.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-j99a.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-pro.dtsi | 47 +++++++ arch/arm64/boot/dts/apple/s8001.dtsi | 167 +++++++++++++++++++++++ 7 files changed, 274 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/s8001-j127.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j128.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j98a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j99a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-pro.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index cbb7e409b7e3..f8cd10889d9f 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -28,6 +28,10 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-j72t.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n66m.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n69.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n71m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j127.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j128.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j98a.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j99a.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/s8001-j127.dts b/arch/arm64/boot/dts= /apple/s8001-j127.dts new file mode 100644 index 000000000000..8b522085cb3e --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j127.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (9.7-inch) (Wi-Fi), J127, iPad6,3 (A1673) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j127", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (9.7-inch) (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-j128.dts b/arch/arm64/boot/dts= /apple/s8001-j128.dts new file mode 100644 index 000000000000..cdd3d06dcbf1 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j128.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (9.7-inch) (Cellular), J128, iPad6,4 (A1674/A1675) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j128", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (9.7-inch) (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-j98a.dts b/arch/arm64/boot/dts= /apple/s8001-j98a.dts new file mode 100644 index 000000000000..6d6b841e7ab0 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j98a.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (12.9-inch) (Wi-Fi), J98a, iPad6,7 (A1584) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j98a", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (12.9-inch) (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-j99a.dts b/arch/arm64/boot/dts= /apple/s8001-j99a.dts new file mode 100644 index 000000000000..d20194b1cae7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j99a.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (12.9-inch) (Cellular), J99a, iPad6,8 (A1652) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j99a", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (12.9-inch) (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-pro.dtsi b/arch/arm64/boot/dts= /apple/s8001-pro.dtsi new file mode 100644 index 000000000000..214fbbcf66fd --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-pro.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (1st generation) common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "s8001.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 122 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 123 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 15 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 12 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001.dtsi b/arch/arm64/boot/dts/app= le/s8001.dtsi new file mode 100644 index 000000000000..ab22d7948f62 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001.dtsi @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple S8001 "A9X" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,twister"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,twister"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled in by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,s8000-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl_ap: pinctrl@20f100000 { + compatible =3D "apple,s8000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0f100000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 219>; + apple,npins =3D <219>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2100f0000 { + compatible =3D "apple,s8000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x100f0000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 28>; + apple,npins =3D <28>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + wdt: watchdog@2102b0000 { + compatible =3D "apple,s8000-wdt", "apple,wdt"; + reg =3D <0x2 0x102b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; 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Thu, 19 Sep 2024 09:16:52 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 17/20] arm64: dts: apple: Add A10 devices Date: Fri, 20 Sep 2024 00:06:06 +0800 Message-ID: <20240919161443.10340-18-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add DTS files for the A10 SoC and the following devices based on it: - iPhone 7 - iPhone 7 Plus - iPod touch 7 - iPad 6 - iPad 7 Signed-off-by: Konrad Dybcio [Nick: SMP, m1n1 and AOP pinctrl support] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 9 ++ arch/arm64/boot/dts/apple/t8010-7.dtsi | 47 ++++++ arch/arm64/boot/dts/apple/t8010-d10.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-d101.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-d11.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-d111.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-ipad6.dtsi | 47 ++++++ arch/arm64/boot/dts/apple/t8010-ipad7.dtsi | 15 ++ arch/arm64/boot/dts/apple/t8010-j171.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-j172.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-j71b.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-j72b.dts | 14 ++ arch/arm64/boot/dts/apple/t8010-n112.dts | 50 ++++++ arch/arm64/boot/dts/apple/t8010.dtsi | 167 +++++++++++++++++++++ 14 files changed, 447 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t8010-7.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-d10.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d101.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d11.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d111.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-ipad6.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-ipad7.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-j171.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j172.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j71b.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j72b.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-n112.dts create mode 100644 arch/arm64/boot/dts/apple/t8010.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index f8cd10889d9f..4a7002e289a0 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -32,6 +32,15 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j127.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j128.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j98a.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j99a.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-d101.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-d10.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-d111.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-d11.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j171.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j172.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j71b.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j72b.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-n112.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/t8010-7.dtsi b/arch/arm64/boot/dts/a= pple/t8010-7.dtsi new file mode 100644 index 000000000000..2739e2db4be7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-7.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 7 / 7 Plus common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t8010.dtsi" +#include + +/ { + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 179 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 180 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 23 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + switch-mute { + label =3D "Mute Switch"; + gpios =3D <&pinctrl_ap 86 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-d10.dts b/arch/arm64/boot/dts/= apple/t8010-d10.dts new file mode 100644 index 000000000000..39cdd12db6bf --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-d10.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 7 (Qualcomm), D10, iPhone9,1 (A1660/A1778/A1779/A1780) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-7.dtsi" + +/ { + compatible =3D "apple,d10", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPhone 7 (Qualcomm)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-d101.dts b/arch/arm64/boot/dts= /apple/t8010-d101.dts new file mode 100644 index 000000000000..6a9f0856f930 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-d101.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 7 (Intel), D101, iPhone9,3 (A1660/A1778/A1779/A1780) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-7.dtsi" + +/ { + compatible =3D "apple,d101", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPhone 7 (Intel)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-d11.dts b/arch/arm64/boot/dts/= apple/t8010-d11.dts new file mode 100644 index 000000000000..57e41c2cfbe2 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-d11.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 7 Plus (Qualcomm), D11, iPhone9,2 (A1661/A1784/A1785/A1786) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-7.dtsi" + +/ { + compatible =3D "apple,d11", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPhone 7 Plus (Qualcomm)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-d111.dts b/arch/arm64/boot/dts= /apple/t8010-d111.dts new file mode 100644 index 000000000000..37e395a48c1d --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-d111.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 7 Plus (Intel), D111, iPhone9,4 (A1661/A1784/A1785/A1786) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-7.dtsi" + +/ { + compatible =3D "apple,d111", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPhone 7 Plus (Intel)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi b/arch/arm64/boot/d= ts/apple/t8010-ipad6.dtsi new file mode 100644 index 000000000000..7ad3d6373083 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 6 common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t8010.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 180 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 179 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 89 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 90 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-ipad7.dtsi b/arch/arm64/boot/d= ts/apple/t8010-ipad7.dtsi new file mode 100644 index 000000000000..ea2728bdd47a --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-ipad7.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 7 common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t8010.dtsi" + +/* + * The iPad 7 seems to be only an iteration over the iPad 6 with some smal= l changes, like the + * a bigger screen and 1 GiB of RAM more, hence there is little to no diff= erentiation between + * these 2 generations for now. + */ +#include "t8010-ipad6.dtsi" diff --git a/arch/arm64/boot/dts/apple/t8010-j171.dts b/arch/arm64/boot/dts= /apple/t8010-j171.dts new file mode 100644 index 000000000000..6751bf3a4afd --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-j171.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 7 (Wi-Fi), J171, iPad7,11 (A2197) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-ipad7.dtsi" + +/ { + compatible =3D "apple,j171", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPad 7 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-j172.dts b/arch/arm64/boot/dts= /apple/t8010-j172.dts new file mode 100644 index 000000000000..51aaa950acd9 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-j172.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 7 (Cellular), J172, iPad7,12 (A2198/A2200) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-ipad7.dtsi" + +/ { + compatible =3D "apple,j172", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPad 7 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-j71b.dts b/arch/arm64/boot/dts= /apple/t8010-j71b.dts new file mode 100644 index 000000000000..534eb8413e08 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-j71b.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 6 (Wi-Fi), J71b, iPad7,5 (A1893) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-ipad6.dtsi" + +/ { + compatible =3D "apple,j71b", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPad 6 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-j72b.dts b/arch/arm64/boot/dts= /apple/t8010-j72b.dts new file mode 100644 index 000000000000..264924e41f42 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-j72b.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad 6 (Cellular), J72b, iPad7,6 (A1954) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010-ipad6.dtsi" + +/ { + compatible =3D "apple,j72b", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPad 6 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-n112.dts b/arch/arm64/boot/dts= /apple/t8010-n112.dts new file mode 100644 index 000000000000..94b67bf5cf64 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010-n112.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPod touch 7, N112, iPod9,1 (A2178) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8010.dtsi" +#include + +/ { + compatible =3D "apple,n112", "apple,t8010", "apple,arm-platform"; + model =3D "Apple iPod touch 7"; + chassis-type =3D "handset"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 86 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 179 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 180 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 23 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010.dtsi b/arch/arm64/boot/dts/app= le/t8010.dtsi new file mode 100644 index 000000000000..926a0f501477 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8010.dtsi @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Apple T8010 "A10" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,hurricane-zephyr"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,hurricane-zephyr"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,t8010-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl_ap: pinctrl@20f100000 { + compatible =3D "apple,t8010-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0f100000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 208>; + apple,npins =3D <208>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2100f0000 { + compatible =3D "apple,t8010-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x100f0000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 42>; + apple,npins =3D <42>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + wdt: watchdog@2102b0000 { + compatible =3D "apple,t8010-wdt", "apple,wdt"; + reg =3D <0x2 0x102b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; 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Thu, 19 Sep 2024 09:16:56 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 18/20] arm64: dts: apple: Add A10X devices Date: Fri, 20 Sep 2024 00:06:07 +0800 Message-ID: <20240919161443.10340-19-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add DTS files for the A10X SoC and the following devices based on it: - Apple TV 4K - iPad Pro (2nd Generation) (10.5 Inch) - iPad Pro (2nd Generation) (12.9 Inch) Signed-off-by: Konrad Dybcio [Nick: SMP, m1n1 and Apple TV 4K support, uart interrupt and pinctrl fixes] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 5 + arch/arm64/boot/dts/apple/t8011-j105a.dts | 15 ++ arch/arm64/boot/dts/apple/t8011-j120.dts | 14 ++ arch/arm64/boot/dts/apple/t8011-j121.dts | 14 ++ arch/arm64/boot/dts/apple/t8011-j207.dts | 14 ++ arch/arm64/boot/dts/apple/t8011-j208.dts | 14 ++ arch/arm64/boot/dts/apple/t8011-pro2.dtsi | 47 ++++++ arch/arm64/boot/dts/apple/t8011.dtsi | 175 ++++++++++++++++++++++ 8 files changed, 298 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t8011-j105a.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j120.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j121.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j207.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j208.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-pro2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8011.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 4a7002e289a0..a44c14fae7bc 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -41,6 +41,11 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j172.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j71b.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-j72b.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8010-n112.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j105a.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j120.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j121.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j207.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j208.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/t8011-j105a.dts b/arch/arm64/boot/dt= s/apple/t8011-j105a.dts new file mode 100644 index 000000000000..4efd02725963 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011-j105a.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple TV 4K (1st Generation), J105a, AppleTV6,2 (A1482) + * Copyright (c) 2024, Nick Chan + */ + +/dts-v1/; + +#include "t8011.dtsi" + +/ { + compatible =3D "apple,j105a", "apple,t8011", "apple,arm-platform"; + model =3D "Apple TV 4K (1st Generation)"; + chassis-type =3D "television"; +}; diff --git a/arch/arm64/boot/dts/apple/t8011-j120.dts b/arch/arm64/boot/dts= /apple/t8011-j120.dts new file mode 100644 index 000000000000..a620d8aaf468 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011-j120.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro 2 (12.9-inch) (Wi-Fi), J120, iPad7,1 (A1670) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8011-pro2.dtsi" + +/ { + compatible =3D "apple,j120", "apple,t8011", "apple,arm-platform"; + model =3D "Apple iPad Pro 2 (12.9-inch) (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8011-j121.dts b/arch/arm64/boot/dts= /apple/t8011-j121.dts new file mode 100644 index 000000000000..dfec25f7d54a --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011-j121.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro 2 (12.9-inch) (Cellular), J121, iPad7,2 (A1671) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8011-pro2.dtsi" + +/ { + compatible =3D "apple,j121", "apple,t8011", "apple,arm-platform"; + model =3D "Apple iPad Pro 2 (12.9-inch) (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8011-j207.dts b/arch/arm64/boot/dts= /apple/t8011-j207.dts new file mode 100644 index 000000000000..12582bfe7532 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011-j207.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro 2 (10.5-inch) (Wi-Fi), J207, iPad7,3 (A1701) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8011-pro2.dtsi" + +/ { + compatible =3D "apple,j207", "apple,t8011", "apple,arm-platform"; + model =3D "Apple iPad Pro 2 (10.5-inch) (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8011-j208.dts b/arch/arm64/boot/dts= /apple/t8011-j208.dts new file mode 100644 index 000000000000..c0cd18e0ab18 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011-j208.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro 2 (10.5-inch) (Cellular), J208, iPad7,4 (A1709) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8011-pro2.dtsi" + +/ { + compatible =3D "apple,j208", "apple,t8011", "apple,arm-platform"; + model =3D "Apple iPad Pro 2 (10.5-inch) (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8011-pro2.dtsi b/arch/arm64/boot/dt= s/apple/t8011-pro2.dtsi new file mode 100644 index 000000000000..9f681dd9d463 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011-pro2.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro 2 common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t8011.dtsi" +#include + +/ { + chassis-type =3D "tablet"; + + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 139 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 138 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 43 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 40 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8011.dtsi b/arch/arm64/boot/dts/app= le/t8011.dtsi new file mode 100644 index 000000000000..e9f7d54893fe --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8011.dtsi @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8011 "A10X" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,hurricane-zephyr"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,hurricane-zephyr"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu2: cpu@2 { + compatible =3D "apple,hurricane-zephyr"; + reg =3D <0x0 0x2>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,t8010-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl_ap: pinctrl@20f100000 { + compatible =3D "apple,t8010-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0f100000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 219>; + apple,npins =3D <219>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2100f0000 { + compatible =3D "apple,t8010-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x100f0000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 42>; + apple,npins =3D <42>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + wdt: watchdog@2102b0000 { + compatible =3D "apple,t8010-wdt", "apple,wdt"; + reg =3D <0x2 0x102b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt"; + /* Note that A10X doesn't actually have a hypervisor (EL2 is not impleme= nted). */ + interrupts =3D , + ; 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Thu, 19 Sep 2024 09:17:00 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 19/20] arm64: dts: apple: Add A11 devices Date: Fri, 20 Sep 2024 00:06:08 +0800 Message-ID: <20240919161443.10340-20-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add DTS files for the A11 SoC and the following devices based on it: - iPhone 8 - iPhone 8 Plus - iPhone X On A11, Apple has introduced independent performance and efficiency core clusters, so indicate it in the device tree as well. Signed-off-by: Konrad Dybcio [Nick: SMP and m1n1 support, disabled SMC pinctrl] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 6 + arch/arm64/boot/dts/apple/t8015-8.dtsi | 16 ++ arch/arm64/boot/dts/apple/t8015-8plus.dtsi | 9 + arch/arm64/boot/dts/apple/t8015-d20.dts | 14 ++ arch/arm64/boot/dts/apple/t8015-d201.dts | 14 ++ arch/arm64/boot/dts/apple/t8015-d21.dts | 14 ++ arch/arm64/boot/dts/apple/t8015-d211.dts | 14 ++ arch/arm64/boot/dts/apple/t8015-d22.dts | 14 ++ arch/arm64/boot/dts/apple/t8015-d221.dts | 14 ++ arch/arm64/boot/dts/apple/t8015-x.dtsi | 16 ++ arch/arm64/boot/dts/apple/t8015.dtsi | 268 +++++++++++++++++++++ 11 files changed, 399 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t8015-8.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-8plus.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-d20.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d201.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d21.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d211.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d22.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d221.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-x.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index a44c14fae7bc..ab6ebb53218a 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -46,6 +46,12 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j120.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j121.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j207.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8011-j208.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8015-d201.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8015-d20.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8015-d211.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8015-d21.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8015-d221.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8015-d22.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/t8015-8.dtsi b/arch/arm64/boot/dts/a= pple/t8015-8.dtsi new file mode 100644 index 000000000000..cac1d47285a1 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-8.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 8 common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t8015.dtsi" + +/ { + chassis-type =3D "handset"; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-8plus.dtsi b/arch/arm64/boot/d= ts/apple/t8015-8plus.dtsi new file mode 100644 index 000000000000..ea291a95f028 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-8plus.dtsi @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 8 Plus common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +/* The 8 Plus has minor differences like 1 more camera, 1 GiB of RAM more = and a bigger display. */ +#include "t8015-8.dtsi" diff --git a/arch/arm64/boot/dts/apple/t8015-d20.dts b/arch/arm64/boot/dts/= apple/t8015-d20.dts new file mode 100644 index 000000000000..35d79e2ceebc --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-d20.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 8 (Global), D20 iPhone10,1 (A1863/A1906/A1907) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8015-8.dtsi" + +/ { + compatible =3D "apple,d20", "apple,t8015", "apple,arm-platform"; + model =3D "Apple iPhone 8 (Global)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-d201.dts b/arch/arm64/boot/dts= /apple/t8015-d201.dts new file mode 100644 index 000000000000..31e0947fee70 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-d201.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 8 (GSM), D20 iPhone10,4 (A1905) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8015-8.dtsi" + +/ { + compatible =3D "apple,d201", "apple,t8015", "apple,arm-platform"; + model =3D "Apple iPhone 8 (GSM)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-d21.dts b/arch/arm64/boot/dts/= apple/t8015-d21.dts new file mode 100644 index 000000000000..a902ba7f1133 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-d21.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 8 Plus (Global), D21 iPhone10,2 (A1864/A1897/A1898) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8015-8plus.dtsi" + +/ { + compatible =3D "apple,d21", "apple,t8015", "apple,arm-platform"; + model =3D "Apple iPhone 8 Plus (Global)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-d211.dts b/arch/arm64/boot/dts= /apple/t8015-d211.dts new file mode 100644 index 000000000000..3b3f886c0c09 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-d211.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone 8 Plus (GSM), D211 iPhone10,5 (A1899) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8015-8plus.dtsi" + +/ { + compatible =3D "apple,d211", "apple,t8015", "apple,arm-platform"; + model =3D "Apple iPhone 8 Plus (GSM)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-d22.dts b/arch/arm64/boot/dts/= apple/t8015-d22.dts new file mode 100644 index 000000000000..5a7a6092c2d0 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-d22.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone X (Global), D22, iPhone10,3 (A1865) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8015-x.dtsi" + +/ { + compatible =3D "apple,d22", "apple,t8015", "apple,arm-platform"; + model =3D "Apple iPhone X (Global)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-d221.dts b/arch/arm64/boot/dts= /apple/t8015-d221.dts new file mode 100644 index 000000000000..dd920c945bd6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-d221.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone X (GSM), D221, iPhone10,6 (A1901) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t8015-x.dtsi" + +/ { + compatible =3D "apple,d221", "apple,t8015", "apple,arm-platform"; + model =3D "Apple iPhone X (GSM)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015-x.dtsi b/arch/arm64/boot/dts/a= pple/t8015-x.dtsi new file mode 100644 index 000000000000..afba4944656b --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015-x.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPhone X common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t8015.dtsi" + +/ { + chassis-type =3D "handset"; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8015.dtsi b/arch/arm64/boot/dts/app= le/t8015.dtsi new file mode 100644 index 000000000000..ceb245e270b3 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8015.dtsi @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8015 "A11" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + core1 { + cpu =3D <&cpu_e1>; + }; + core2 { + cpu =3D <&cpu_e2>; + }; + core3 { + cpu =3D <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + core1 { + cpu =3D <&cpu_p1>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible =3D "apple,mistral"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu_e1: cpu@1 { + compatible =3D "apple,mistral"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu_e2: cpu@2 { + compatible =3D "apple,mistral"; + reg =3D <0x0 0x2>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu_e3: cpu@3 { + compatible =3D "apple,mistral"; + reg =3D <0x0 0x3>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu_p0: cpu@10004 { + compatible =3D "apple,monsoon"; + reg =3D <0x0 0x10004>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu_p1: cpu@10005 { + compatible =3D "apple,monsoon"; + reg =3D <0x0 0x10005>; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@22e600000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x2e600000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + aic: interrupt-controller@232100000 { + compatible =3D "apple,t8015-aic", "apple,aic"; + reg =3D <0x2 0x32100000 0x0 0x8000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl_ap: pinctrl@233100000 { + compatible =3D "apple,t8015-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x33100000 0x0 0x1000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 223>; + apple,npins =3D <223>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2340f0000 { + compatible =3D "apple,t8015-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x340f0000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 49>; + apple,npins =3D <49>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_nub: pinctrl@2351f0000 { + compatible =3D "apple,t8015-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x351f0000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_nub 0 0 8>; + apple,npins =3D <8>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + ; + }; + + wdt: watchdog@2352b0000 { + compatible =3D "apple,t8015-wdt", "apple,wdt"; + reg =3D <0x2 0x352b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pinctrl_smc: pinctrl@236024000 { + compatible =3D "apple,t8015-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x36024000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; 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Thu, 19 Sep 2024 09:17:05 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-2dd6eed1865sm2084674a91.34.2024.09.19.09.17.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Sep 2024 09:17:05 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 20/20] arm64: Kconfig: Update help text for CONFIG_ARCH_APPLE Date: Fri, 20 Sep 2024 00:06:09 +0800 Message-ID: <20240919161443.10340-21-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240919161443.10340-1-towinchenmi@gmail.com> References: <20240919161443.10340-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Apple's A7-A11 SoC is now supported, so the original help text is no longer accurate. Signed-off-by: Nick Chan Acked-by: Krzysztof Kozlowski --- arch/arm64/Kconfig.platforms | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 6c6d11536b42..370a9d2b6919 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -37,8 +37,8 @@ config ARCH_APPLE bool "Apple Silicon SoC family" select APPLE_AIC help - This enables support for Apple's in-house ARM SoC family, starting - with the Apple M1. + This enables support for Apple's in-house ARM SoC family, such + as the Apple M1. =20 menuconfig ARCH_BCM bool "Broadcom SoC Support" --=20 2.46.0