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charset="utf-8" For SW mode, the oversampling and scales attributes are always present. So, they can be implemented via a 'read_avail' hook in iio_info. For HW mode, it's a bit tricky, as these attributes get assigned based on GPIO definitions. So, for SW mode, we define a separate AD7606_SW_CHANNEL() macro, and use that for the SW channels. And 'ad7606_info_os_range_and_debug' can be renamed to 'ad7606_info_sw_mode' as it is only used for SW mode. For the 'read_avail' hook, we'll need to allocate the SW scales, so that they are just returned userspace without any extra processing. The allocation will happen when then ad7606_state struct is allocated. The oversampling available parameters don't need any extra processing; they can just be passed back to userspace (as they are). Signed-off-by: Alexandru Ardelean --- drivers/iio/adc/ad7606.c | 52 ++++++++++++++++++++++++++++++++++--- drivers/iio/adc/ad7606.h | 32 ++++++++++++++++++++--- drivers/iio/adc/ad7606_spi. | 0 3 files changed, 77 insertions(+), 7 deletions(-) create mode 100644 drivers/iio/adc/ad7606_spi. diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 94a254c0725e..b909ee14fd81 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -512,6 +512,37 @@ static int ad7606_buffer_predisable(struct iio_dev *in= dio_dev) return 0; } =20 +static int ad7606_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) +{ + struct ad7606_state *st =3D iio_priv(indio_dev); + struct ad7606_chan_scale *cs; + unsigned int ch =3D 0; + + switch (info) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *vals =3D st->oversampling_avail; + *length =3D st->num_os_ratios; + *type =3D IIO_VAL_INT; + + return IIO_AVAIL_LIST; + + case IIO_CHAN_INFO_SCALE: + if (st->sw_mode_en) + ch =3D chan->address; + + cs =3D &st->chan_scales[ch]; + *vals =3D cs->scale_avail_show; + *length =3D cs->num_scales * 2; + *type =3D IIO_VAL_INT_PLUS_MICRO; + + return IIO_AVAIL_LIST; + } + return -EINVAL; +} + static const struct iio_buffer_setup_ops ad7606_buffer_ops =3D { .postenable =3D &ad7606_buffer_postenable, .predisable =3D &ad7606_buffer_predisable, @@ -529,11 +560,11 @@ static const struct iio_info ad7606_info_os_and_range= =3D { .validate_trigger =3D &ad7606_validate_trigger, }; =20 -static const struct iio_info ad7606_info_os_range_and_debug =3D { +static const struct iio_info ad7606_info_sw_mode =3D { .read_raw =3D &ad7606_read_raw, .write_raw =3D &ad7606_write_raw, + .read_avail =3D &ad7606_read_avail, .debugfs_reg_access =3D &ad7606_reg_access, - .attrs =3D &ad7606_attribute_group_os_and_range, .validate_trigger =3D &ad7606_validate_trigger, }; =20 @@ -564,7 +595,7 @@ static int ad7606_sw_mode_setup(struct iio_dev *indio_d= ev) if (!st->sw_mode_en) return 0; =20 - indio_dev->info =3D &ad7606_info_os_range_and_debug; + indio_dev->info =3D &ad7606_info_sw_mode; =20 return st->bops->sw_mode_config(indio_dev); } @@ -576,9 +607,24 @@ static int ad7606_chan_scales_setup(struct iio_dev *in= dio_dev) int ch, ret; =20 for (ch =3D 0; ch < num_channels; ch++) { + struct ad7606_chan_scale *cs; + int i; + ret =3D st->chip_info->scale_setup_cb(st, ch); if (ret) return ret; + + cs =3D &st->chan_scales[ch]; + + if (cs->num_scales * 2 > AD760X_MAX_SCALE_SHOW) + return dev_err_probe(st->dev, -ERANGE, + "Driver error: scale range too big"); + + /* Generate a scale_avail list for showing to userspace */ + for (i =3D 0; i < cs->num_scales; i++) { + cs->scale_avail_show[i * 2] =3D 0; + cs->scale_avail_show[i * 2 + 1] =3D cs->scale_avail[i]; + } } =20 return 0; diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 2b90f52affba..25e84efd15c3 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -27,6 +27,29 @@ }, \ } =20 +#define AD7606_SW_CHANNEL(num, bits) { \ + .type =3D IIO_VOLTAGE, \ + .indexed =3D 1, \ + .channel =3D num, \ + .address =3D num, \ + .info_mask_separate =3D \ + BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_separate_available =3D \ + BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_all =3D \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available =3D \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .scan_index =3D num, \ + .scan_type =3D { \ + .sign =3D 's', \ + .realbits =3D (bits), \ + .storagebits =3D (bits) > 16 ? 32 : 16, \ + .endianness =3D IIO_CPU, \ + }, \ +} + #define AD7605_CHANNEL(num) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ BIT(IIO_CHAN_INFO_SCALE), 0, 16) @@ -36,10 +59,6 @@ BIT(IIO_CHAN_INFO_SCALE), \ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) =20 -#define AD7606_SW_CHANNEL(num, bits) \ - AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\ - 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) - #define AD7616_CHANNEL(num) AD7606_SW_CHANNEL(num, 16) =20 struct ad7606_state; @@ -71,11 +90,16 @@ struct ad7606_chip_info { /** * struct ad7606_chan_scale - channel scale configuration * @scale_avail pointer to the array which stores the available scales + * @scale_avail_show a duplicate of 'scale_avail' which is readily formatt= ed + * such that it can be read via the 'read_avail' hook * @num_scales number of elements stored in the scale_avail array * @range voltage range selection, selects which scale to apply */ struct ad7606_chan_scale { +#define AD760X_MAX_SCALES 16 +#define AD760X_MAX_SCALE_SHOW (AD760X_MAX_SCALES * 2) const unsigned int *scale_avail; + int scale_avail_show[AD760X_MAX_SCALE_SHOW]; unsigned int num_scales; unsigned int range; }; diff --git a/drivers/iio/adc/ad7606_spi. b/drivers/iio/adc/ad7606_spi. new file mode 100644 index 000000000000..e69de29bb2d1 --=20 2.46.0