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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-207946010f9sm61021875ad.84.2024.09.18.02.03.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Sep 2024 02:03:16 -0700 (PDT) From: Hui-Ping Chen To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, sumit.semwal@linaro.org, christian.koenig@amd.com, esben@geanix.com Cc: linux-arm-kernel@lists.infradead.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, Hui-Ping Chen , Krzysztof Kozlowski Subject: [PATCH v4 1/2] dt-bindings: mtd: nuvoton,ma35d1-nand: add new bindings Date: Wed, 18 Sep 2024 09:03:07 +0000 Message-Id: <20240918090308.292617-2-hpchen0nvt@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240918090308.292617-1-hpchen0nvt@gmail.com> References: <20240918090308.292617-1-hpchen0nvt@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. Signed-off-by: Hui-Ping Chen Reviewed-by: Krzysztof Kozlowski --- .../bindings/mtd/nuvoton,ma35d1-nand.yaml | 93 +++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-na= nd.yaml diff --git a/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml= b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml new file mode 100644 index 000000000000..a8a549644c98 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller + +maintainers: + - Hui-Ping Chen + +allOf: + - $ref: nand-controller.yaml# + +properties: + compatible: + enum: + - nuvoton,ma35d1-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +patternProperties: + "^nand@[a-f0-9]$": + type: object + $ref: raw-nand-chip.yaml + properties: + nand-ecc-step-size: + enum: [512, 1024] + + nand-ecc-strength: + enum: [8, 12, 24] + + required: + - nand-ecc-step-size + - nand-ecc-strength + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + nand-controller@401A0000 { + compatible =3D "nuvoton,ma35d1-nand-controller"; + reg =3D <0x0 0x401A0000 0x0 0x1000>; + interrupts =3D ; + clocks =3D <&clk NAND_GATE>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + nand@0 { + reg =3D <0>; + + nand-on-flash-bbt; + nand-ecc-step-size =3D <512>; + nand-ecc-strength =3D <8>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + uboot@0 { + label =3D "nand-uboot"; + read-only; + reg =3D <0x0 0x300000>; + }; + }; + }; + }; + }; + +... --=20 2.25.1