From nobody Fri Nov 29 18:27:42 2024 Received: from chessie.everett.org (chessie.fmt1.pfcs.com [66.220.13.234]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A17AD165EED; Tue, 17 Sep 2024 09:50:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=66.220.13.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726566654; cv=none; b=j7qUrIoSXGs4FIEwRBK8tJ4j7ZvZFsPw0ayC2s4eihi+h9Ctr2qOdxEuLbD6fUEbzcAenAZniWRU3Vn1dUJo3uDrGJTRkviUg0EzdMIWZSeS4iXMHT1bLuowttVrb7rfL7Ly50zvJHDajLmd55CEV8LGdvfogPJ3pjbesvuZrUs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726566654; c=relaxed/simple; bh=9hsifZHo+jNzG7HnFv2SlQq6WgrK3ateaOFRSVBxWjc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ssEWrGDt8AwW1KXlvWD3N1yza6cHGBXWXrLd6N4f+P1VHSTqyq5cIbQ4ouQZlMet90yL08Go0dEXW+EugBXnPb/cvaZkYy98S7lwNAQbJFZVmUzpoUbXI88eZw5vUZTBbWWLApOc7k4QOZNYVfJm7IGQF8nJ+f7sSCPOabS9lpY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=nwtime.org; spf=pass smtp.mailfrom=nwtime.org; arc=none smtp.client-ip=66.220.13.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=nwtime.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nwtime.org Received: from localhost.localdomain (unknown [31.16.248.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by chessie.everett.org (Postfix) with ESMTPSA id 4X7H8d2MjQzMR62; Tue, 17 Sep 2024 09:50:41 +0000 (UTC) From: Erez Geva To: linux-mtd@lists.infradead.org, Tudor Ambarus , Pratyush Yadav , Michael Walle Cc: linux-kernel@vger.kernel.org, Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Esben Haabendal , Erez Geva Subject: [PATCH v4 4/5] mtd: spi-nor: macronix: add support for OTP Date: Tue, 17 Sep 2024 11:49:55 +0200 Message-Id: <20240917094956.437078-5-erezgeva@nwtime.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20240917094956.437078-1-erezgeva@nwtime.org> References: <20240917094956.437078-1-erezgeva@nwtime.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Erez Geva Macronix SPI-NOR support OTP. Add callbacks to read, write and lock the OTP. Notice Macronix OTP do not support erase. Every bit written with '0', can not be changed further. Notice Macronix OTP do not support single region lock! The locking include all regions at once! Signed-off-by: Erez Geva --- drivers/mtd/spi-nor/macronix.c | 167 +++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 9 ++ 2 files changed, 176 insertions(+) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index ea6be95e75a5..02aa844d641b 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -8,6 +8,162 @@ =20 #include "core.h" =20 +/** + * macronix_nor_otp_enter() - Send Enter Secured OTP instruction to the ch= ip. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 0 on success, -errno otherwise. + */ +static int macronix_nor_otp_enter(struct spi_nor *nor) +{ + int error; + + error =3D spi_nor_send_cmd(nor, SPINOR_OP_ENSO); + if (error) + dev_dbg(nor->dev, "error %d on Macronix Enter Secured OTP\n", error); + + return error; +} + +/** + * macronix_nor_otp_exit() - Send Exit Secured OTP instruction to the chip. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 0 on success, -errno otherwise. + */ +static int macronix_nor_otp_exit(struct spi_nor *nor) +{ + int error; + + error =3D spi_nor_send_cmd(nor, SPINOR_OP_EXSO); + if (error) + dev_dbg(nor->dev, "error %d on Macronix Exit Secured OTP\n", error); + + return error; +} + +/** + * macronix_nor_otp_read() - read security register + * @nor: pointer to 'struct spi_nor' + * @addr: offset to read from + * @len: number of bytes to read + * @buf: pointer to dst buffer + * + * Return: number of bytes read successfully, -errno otherwise + */ +static int macronix_nor_otp_read(struct spi_nor *nor, loff_t addr, size_t = len, u8 *buf) +{ + int ret, error; + + error =3D macronix_nor_otp_enter(nor); + if (error) + return error; + + ret =3D spi_nor_read_data(nor, addr, len, buf); + + error =3D macronix_nor_otp_exit(nor); + + if (ret < 0) + dev_dbg(nor->dev, "error %d on Macronix read OTP data\n", ret); + else if (error) + return error; + + return ret; +} + +/** + * macronix_nor_otp_write() - write security register + * @nor: pointer to 'struct spi_nor' + * @addr: offset to write to + * @len: number of bytes to write + * @buf: pointer to src buffer + * + * Return: number of bytes written successfully, -errno otherwise + */ +static int macronix_nor_otp_write(struct spi_nor *nor, loff_t addr, size_t= len, const u8 *buf) +{ + int error, ret =3D 0; + + error =3D macronix_nor_otp_enter(nor); + if (error) + return error; + + error =3D spi_nor_write_enable(nor); + if (error) + goto otp_write_err; + + ret =3D spi_nor_write_data(nor, addr, len, buf); + if (ret < 0) { + dev_dbg(nor->dev, "error %d on Macronix write OTP data\n", ret); + goto otp_write_err; + } + + error =3D spi_nor_wait_till_ready(nor); + if (error) + dev_dbg(nor->dev, "error %d on Macronix waiting write OTP finish\n", err= or); + +otp_write_err: + + error =3D macronix_nor_otp_exit(nor); + + return ret; +} + +/** + * macronix_nor_otp_lock() - lock the OTP region + * @nor: pointer to 'struct spi_nor' + * @region: OTP region + * + * Return: 0 on success, -errno otherwise. + */ +static int macronix_nor_otp_lock(struct spi_nor *nor, unsigned int region) +{ + int error; + u8 *rdscur =3D nor->bouncebuf; + + error =3D spi_nor_read_reg(nor, SPINOR_OP_RDSCUR, 1); + if (error) { + dev_dbg(nor->dev, "error %d on read security register\n", error); + return error; + } + + if (rdscur[0] & SEC_REG_LDSO) + return 0; + + error =3D spi_nor_write_enable(nor); + if (error) { + dev_dbg(nor->dev, "error %d on enable write before update security regis= ter\n", + error); + return error; + } + + error =3D spi_nor_send_cmd(nor, SPINOR_OP_WRSCUR); + if (error) + dev_dbg(nor->dev, "error %d on update security register\n", error); + + return error; +} + +/** + * macronix_nor_otp_is_locked() - get the OTP region lock status + * @nor: pointer to 'struct spi_nor' + * @region: OTP region + * + * Return: 1 on lock, 0 on not locked, -errno otherwise. + */ +static int macronix_nor_otp_is_locked(struct spi_nor *nor, unsigned int re= gion) +{ + int error; + u8 *rdscur =3D nor->bouncebuf; + + error =3D spi_nor_read_reg(nor, SPINOR_OP_RDSCUR, 1); + if (error) { + dev_dbg(nor->dev, "error %d on read security register\n", error); + return error; + } + return rdscur[0] & SEC_REG_LDSO ? 1 : 0; +} + static int mx25l25635_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, @@ -190,8 +346,19 @@ static void macronix_nor_default_init(struct spi_nor *= nor) nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; } =20 +static const struct spi_nor_otp_ops macronix_nor_otp_ops =3D { + .read =3D macronix_nor_otp_read, + .write =3D macronix_nor_otp_write, + /* .erase =3D Macronix OTP do not support erase, */ + .lock =3D macronix_nor_otp_lock, + .is_locked =3D macronix_nor_otp_is_locked, +}; + static int macronix_nor_late_init(struct spi_nor *nor) { + if (nor->params->otp.org.n_regions) + nor->params->otp.ops =3D ¯onix_nor_otp_ops; + if (!nor->params->set_4byte_addr_mode) nor->params->set_4byte_addr_mode =3D spi_nor_set_4byte_addr_mode_en4b_ex= 4b; =20 diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index cdcfe0fd2e7d..ef834e7fc0ac 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -81,6 +81,15 @@ #define SPINOR_OP_BP 0x02 /* Byte program */ #define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */ =20 +/* Macronix OTP registers. */ +#define SPINOR_OP_RDSCUR 0x2b /* read security register */ +#define SPINOR_OP_WRSCUR 0x2f /* write security register */ +#define SPINOR_OP_ENSO 0xb1 /* enter secured OTP */ +#define SPINOR_OP_EXSO 0xc1 /* exit secured OTP */ + +/* Macronix security register values */ +#define SEC_REG_LDSO BIT(1) /* Lock-down Secured OTP */ + /* Used for Macronix and Winbond flashes. */ #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ --=20 2.39.5