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Lin" , Singo Chang , "Nancy Lin" , Subject: [PATCH v2] drm/mediatek: ovl: Add fmt_support_man for MT8192 and MT8195 Date: Mon, 16 Sep 2024 00:12:45 +0800 Message-ID: <20240915161245.30296-1-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--12.635900-8.000000 X-TMASE-MatchedRID: LIcGYmSXSDozP1+hKLmUcMu00lnG8+PWIaLR+2xKRDLb6Y+fnTZUL0/3 ZkXeY1OA6eS1Op7zNynNm52TpbFN7NMd/xz9OgvcA9lly13c/gHmELBDcs0dnQqiCYa6w8tv5sZ TwYHfBM5BHv20aQGKCx1+KsAVmYZiXHEPHmpuRH0URSScn+QSXt0H8LFZNFG7bkV4e2xSge79/t TnQt11ajNTj3nkQ/kevBS707Nog9ImKZteJCYG+0sMHBii02BH X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--12.635900-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 8B727294A5D89EEAA7E4A3D476C35C50F3980071A25ADD2361203F28CC166F6F2000:8 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" OVL_CON_CLRFMT_MAN is an configuration for extending color format settings of DISP_REG_OVL_CON(n). It will change some of the original color format settings. Take the settings of (3 << 12) for example. - If OVL_CON_CLRFMT_MAN =3D 0 means OVL_CON_CLRFMT_RGBA8888. - If OVL_CON_CLRFMT_MAN =3D 1 means OVL_CON_CLRFMT_PARGB8888. Since OVL_CON_CLRFMT_MAN is not supported on previous SoCs, It breaks the OVL color format setting of MT8173. So add fmt_support_man to the driver data of MT8192 and MT8195 to solve the downgrade problem. Fixes: a3f7f7ef4bfe ("drm/mediatek: Support "Pre-multiplied" blending in OV= L") Signed-off-by: Jason-JH.Lin Tested-by: Alper Nebi Yasak --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 43 ++++++++++++++++++++----- 1 file changed, 35 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 89b439dcf3a6..7b053ca25b10 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -70,10 +70,33 @@ #define OVL_CON_CLRFMT_UYVY (4 << 12) #define OVL_CON_CLRFMT_YUYV (5 << 12) #define OVL_CON_MTX_YUV_TO_RGB (6 << 16) -#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN) -#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_S= WAP) -#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_= SWAP) -#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_= SWAP) + +#define OVL_CON_CLRFMT_PARGB8888(ovl) ({ \ + struct mtk_disp_ovl *_ovl =3D (ovl); \ + (_ovl->data->fmt_support_man ? \ + ((3 << 12) | OVL_CON_CLRFMT_MAN) : OVL_CON_CLRFMT_ARGB8888); \ +}) + +#define OVL_CON_CLRFMT_PABGR8888(ovl) ({ \ + struct mtk_disp_ovl *_ovl =3D (ovl); \ + (_ovl->data->fmt_support_man ? \ + (OVL_CON_CLRFMT_PARGB8888(_ovl) | OVL_CON_RGB_SWAP) : OVL_CON_CLRFMT_ABGR= 8888); \ +}) + +#define OVL_CON_CLRFMT_PBGRA8888(ovl) ({ \ + struct mtk_disp_ovl *_ovl =3D (ovl); \ + (_ovl->data->fmt_support_man ? \ + (OVL_CON_CLRFMT_PARGB8888(_ovl) | OVL_CON_BYTE_SWAP) : \ + OVL_CON_CLRFMT_BGRA8888); \ +}) + +#define OVL_CON_CLRFMT_PRGBA8888(ovl) ({ \ + struct mtk_disp_ovl *_ovl =3D (ovl); \ + (_ovl->data->fmt_support_man ? \ + (OVL_CON_CLRFMT_PABGR8888(_ovl) | OVL_CON_BYTE_SWAP) : \ + OVL_CON_CLRFMT_RGBA8888); \ +}) + #define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \ 0 : OVL_CON_CLRFMT_RGB) #define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \ @@ -144,6 +167,7 @@ struct mtk_disp_ovl_data { unsigned int gmc_bits; unsigned int layer_nr; bool fmt_rgb565_is_0; + bool fmt_support_man; bool smi_id_en; bool supports_afbc; const u32 *formats; @@ -410,28 +434,28 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_o= vl *ovl, unsigned int fmt, case DRM_FORMAT_RGBA1010102: return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? OVL_CON_CLRFMT_RGBA8888 : - OVL_CON_CLRFMT_PRGBA8888; + OVL_CON_CLRFMT_PRGBA8888(ovl); case DRM_FORMAT_BGRX8888: case DRM_FORMAT_BGRA8888: case DRM_FORMAT_BGRX1010102: case DRM_FORMAT_BGRA1010102: return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? OVL_CON_CLRFMT_BGRA8888 : - OVL_CON_CLRFMT_PBGRA8888; + OVL_CON_CLRFMT_PBGRA8888(ovl); case DRM_FORMAT_XRGB8888: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_XRGB2101010: case DRM_FORMAT_ARGB2101010: return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? OVL_CON_CLRFMT_ARGB8888 : - OVL_CON_CLRFMT_PARGB8888; + OVL_CON_CLRFMT_PARGB8888(ovl); case DRM_FORMAT_XBGR8888: case DRM_FORMAT_ABGR8888: case DRM_FORMAT_XBGR2101010: case DRM_FORMAT_ABGR2101010: return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? OVL_CON_CLRFMT_ABGR8888 : - OVL_CON_CLRFMT_PABGR8888; + OVL_CON_CLRFMT_PABGR8888(ovl); case DRM_FORMAT_UYVY: return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB; case DRM_FORMAT_YUYV: @@ -662,6 +686,7 @@ static const struct mtk_disp_ovl_data mt8192_ovl_driver= _data =3D { .gmc_bits =3D 10, .layer_nr =3D 4, .fmt_rgb565_is_0 =3D true, + .fmt_support_man =3D true, .smi_id_en =3D true, .formats =3D mt8173_formats, .num_formats =3D ARRAY_SIZE(mt8173_formats), @@ -672,6 +697,7 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_dri= ver_data =3D { .gmc_bits =3D 10, .layer_nr =3D 2, .fmt_rgb565_is_0 =3D true, + .fmt_support_man =3D true, .smi_id_en =3D true, .formats =3D mt8173_formats, .num_formats =3D ARRAY_SIZE(mt8173_formats), @@ -682,6 +708,7 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver= _data =3D { .gmc_bits =3D 10, .layer_nr =3D 4, .fmt_rgb565_is_0 =3D true, + .fmt_support_man =3D true, .smi_id_en =3D true, .supports_afbc =3D true, .formats =3D mt8195_formats, --=20 2.43.0