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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2024 15:22:47.0219 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f57d30ab-1a8d-446b-c2b7-08dcd407ec1d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000009C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8846 Content-Type: text/plain; charset="utf-8" Preparation for the addition of per-core RAPL energy counter support for AMD CPUs. Post which, one cpu might be mapped to more than one rapl_pmu (package/die one or per-core one), also makes sense to use the get_rapl_pmu_idx macro which is anyway used to index into the rapl_pmus->pmus[] array. Signed-off-by: Dhananjay Ugwekar --- arch/x86/events/rapl.c | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index ce04dc5844c4..b997899233c3 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -162,17 +162,6 @@ static inline unsigned int get_rapl_pmu_idx(int cpu) topology_logical_die_id(cpu); } =20 -static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu) -{ - unsigned int rapl_pmu_idx =3D get_rapl_pmu_idx(cpu); - - /* - * The unsigned check also catches the '-1' return value for non - * existent mappings in the topology map. - */ - return rapl_pmu_idx < rapl_pmus->nr_rapl_pmu ? rapl_pmus->pmus[rapl_pmu_i= dx] : NULL; -} - static inline u64 rapl_read_counter(struct perf_event *event) { u64 raw; @@ -348,7 +337,7 @@ static void rapl_pmu_event_del(struct perf_event *event= , int flags) static int rapl_pmu_event_init(struct perf_event *event) { u64 cfg =3D event->attr.config & RAPL_EVENT_MASK; - int bit, ret =3D 0; + int bit, rapl_pmu_idx, ret =3D 0; struct rapl_pmu *pmu; =20 /* only look at RAPL events */ @@ -376,8 +365,12 @@ static int rapl_pmu_event_init(struct perf_event *even= t) if (event->attr.sample_period) /* no sampling */ return -EINVAL; =20 + rapl_pmu_idx =3D get_rapl_pmu_idx(event->cpu); + if (rapl_pmu_idx >=3D rapl_pmus->nr_rapl_pmu) + return -EINVAL; + /* must be done before validate_group */ - pmu =3D cpu_to_rapl_pmu(event->cpu); + pmu =3D rapl_pmus->pmus[rapl_pmu_idx]; if (!pmu) return -EINVAL; event->pmu_private =3D pmu; @@ -623,12 +616,16 @@ static const struct attribute_group *rapl_attr_update= [] =3D { static void __init init_rapl_pmu(void) { struct rapl_pmu *pmu; - int cpu; + int cpu, rapl_pmu_idx; =20 cpus_read_lock(); =20 for_each_cpu(cpu, cpu_online_mask) { - pmu =3D cpu_to_rapl_pmu(cpu); + rapl_pmu_idx =3D get_rapl_pmu_idx(cpu); + if (rapl_pmu_idx >=3D rapl_pmus->nr_rapl_pmu) + continue; + + pmu =3D rapl_pmus->pmus[rapl_pmu_idx]; if (pmu) continue; pmu =3D kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu)); @@ -640,7 +637,7 @@ static void __init init_rapl_pmu(void) pmu->timer_interval =3D ms_to_ktime(rapl_timer_ms); rapl_hrtimer_init(pmu); =20 - rapl_pmus->pmus[get_rapl_pmu_idx(cpu)] =3D pmu; + rapl_pmus->pmus[rapl_pmu_idx] =3D pmu; } =20 cpus_read_unlock(); --=20 2.34.1