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There is no good fit in generic names list for the embedded trace extension. ETE is abbreviation of embedded trace extension and the number is the CPU number that ete is associated. Signed-off-by: Mao Jinlong --- .../bindings/arm/arm,embedded-trace-extension.yaml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/arm,embedded-trace-exten= sion.yaml b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extens= ion.yaml index f725e6940993..0a88e14e7db3 100644 --- a/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.ya= ml +++ b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.ya= ml @@ -23,7 +23,7 @@ description: | =20 properties: $nodename: - pattern: "^ete([0-9a-f]+)$" + pattern: "^ete-[0-9]+$" compatible: items: - const: arm,embedded-trace-extension @@ -55,13 +55,13 @@ examples: =20 # An ETE node without legacy CoreSight connections - | - ete0 { + ete-0 { compatible =3D "arm,embedded-trace-extension"; cpu =3D <&cpu_0>; }; # An ETE node with legacy CoreSight connections - | - ete1 { + ete-1 { compatible =3D "arm,embedded-trace-extension"; cpu =3D <&cpu_1>; =20 --=20 2.46.0 From nobody Sat Nov 30 00:33:25 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23A8B1D5CC1; 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Fri, 13 Sep 2024 09:24:43 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48D9OgkR007135 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Sep 2024 09:24:42 GMT Received: from hu-jinlmao-lv.qualcomm.com (10.49.16.6) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 13 Sep 2024 02:24:41 -0700 From: Mao Jinlong To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , "Bjorn Andersson" , Konrad Dybcio CC: Mao Jinlong , , , , , Subject: [PATCH v4 2/2] arm64: dts: qcom: sm8450: Add coresight nodes Date: Fri, 13 Sep 2024 02:24:29 -0700 Message-ID: <20240913092430.31569-3-quic_jinlmao@quicinc.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240913092430.31569-1-quic_jinlmao@quicinc.com> References: <20240913092430.31569-1-quic_jinlmao@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Pz8UHVH1OP-T9Ur0IlWoKufHBIpujEw4 X-Proofpoint-GUID: Pz8UHVH1OP-T9Ur0IlWoKufHBIpujEw4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 clxscore=1015 phishscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 mlxscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409130065 Content-Type: text/plain; charset="utf-8" Add coresight components on Qualcomm SM8450 Soc. The components include TMC ETF/ETR, ETE, STM, TPDM, CTI. Signed-off-by: Mao Jinlong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 726 +++++++++++++++++++++++++++ 1 file changed, 726 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 9bafb3b350ff..6d90d6045628 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -287,6 +287,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 { }; }; =20 + ete-0 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU0>; + + out-ports { + port { + ete0_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete0>; + }; + }; + }; + }; + + ete-1 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU1>; + + out-ports { + port { + ete1_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete1>; + }; + }; + }; + }; + + ete-2 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU2>; + + out-ports { + port { + ete2_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete2>; + }; + }; + }; + }; + + ete-3 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU3>; + + out-ports { + port { + ete3_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete3>; + }; + }; + }; + }; + + ete-4 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU4>; + + out-ports { + port { + ete4_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete4>; + }; + }; + }; + }; + + ete-5 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU5>; + + out-ports { + port { + ete5_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete5>; + }; + }; + }; + }; + + ete-6 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU6>; + + out-ports { + port { + ete6_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete6>; + }; + }; + }; + }; + + ete-7 { + compatible =3D "arm,embedded-trace-extension"; + cpu =3D <&CPU7>; + + out-ports { + port { + ete7_out_funnel_ete: endpoint { + remote-endpoint =3D <&funnel_ete_in_ete7>; + }; + }; + }; + }; + + funnel-ete { + compatible =3D "arm,coresight-static-funnel"; + + out-ports { + port { + funnel_ete_out_funnel_apss: endpoint { + remote-endpoint =3D + <&funnel_apss_in_funnel_ete>; + }; + }; + }; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + funnel_ete_in_ete0: endpoint { + remote-endpoint =3D + <&ete0_out_funnel_ete>; + }; + }; + + port@1 { + reg =3D <1>; + funnel_ete_in_ete1: endpoint { + remote-endpoint =3D + <&ete1_out_funnel_ete>; + }; + }; + + port@2 { + reg =3D <2>; + funnel_ete_in_ete2: endpoint { + remote-endpoint =3D + <&ete2_out_funnel_ete>; + }; + }; + + port@3 { + reg =3D <3>; + funnel_ete_in_ete3: endpoint { + remote-endpoint =3D + <&ete3_out_funnel_ete>; + }; + }; + + port@4 { + reg =3D <4>; + funnel_ete_in_ete4: endpoint { + remote-endpoint =3D + <&ete4_out_funnel_ete>; + }; + }; + + port@5 { + reg =3D <5>; + funnel_ete_in_ete5: endpoint { + remote-endpoint =3D + <&ete5_out_funnel_ete>; + }; + }; + + port@6 { + reg =3D <6>; + funnel_ete_in_ete6: endpoint { + remote-endpoint =3D + <&ete6_out_funnel_ete>; + }; + }; + + port@7 { + reg =3D <7>; + funnel_ete_in_ete7: endpoint { + remote-endpoint =3D + <&ete7_out_funnel_ete>; + }; + }; + }; + }; + firmware { scm: scm { compatible =3D "qcom,scm-sm8450", "qcom,scm"; @@ -4141,6 +4327,546 @@ data-pins { }; }; =20 + stm@10002000 { + compatible =3D "arm,coresight-stm", "arm,primecell"; + reg =3D <0x0 0x10002000 0x0 0x1000>, + <0x0 0x16280000 0x0 0x180000>; + reg-names =3D "stm-base", "stm-stimulus-base"; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + out-ports { + port { + stm_out_funnel_in0: endpoint { + remote-endpoint =3D + <&funnel_in0_in_stm>; + }; + }; + }; + }; + + funnel@10041000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + reg =3D <0x0 0x10041000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@7 { + reg =3D <7>; + funnel_in0_in_stm: endpoint { + remote-endpoint =3D + <&stm_out_funnel_in0>; + }; + }; + }; + + out-ports { + port { + funnel_in0_out_funnel_qdss: endpoint { + remote-endpoint =3D + <&funnel_qdss_in_funnel_in0>; + }; + }; + }; + }; + + funnel@10042000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg =3D <0x0 0x10042000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@4 { + reg =3D <4>; + funnel_in1_in_funnel_apss: endpoint { + remote-endpoint =3D + <&funnel_apss_out_funnel_in1>; + }; + }; + + port@6 { + reg =3D <6>; + funnel_in1_in_funnel_dl_center: endpoint { + remote-endpoint =3D + <&funnel_dl_center_out_funnel_in1>; + }; + }; + }; + + out-ports { + port { + funnel_in1_out_funnel_qdss: endpoint { + remote-endpoint =3D + <&funnel_qdss_in_funnel_in1>; + }; + }; + }; + }; + + funnel@10045000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + reg =3D <0x0 0x10045000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + funnel_qdss_in_funnel_in0: endpoint { + remote-endpoint =3D + <&funnel_in0_out_funnel_qdss>; + }; + }; + + port@1 { + reg =3D <1>; + funnel_qdss_in_funnel_in1: endpoint { + remote-endpoint =3D + <&funnel_in1_out_funnel_qdss>; + }; + }; + }; + + out-ports { + port { + funnel_qdss_out_funnel_aoss: endpoint { + remote-endpoint =3D + <&funnel_aoss_in_funnel_qdss>; + }; + }; + }; + }; + + replicator@10046000 { + compatible =3D "arm,coresight-dynamic-replicator", "arm,primecell"; + reg =3D <0x0 0x10046000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + replicator_qdss_in_replicator_swao: endpoint { + remote-endpoint =3D + <&replicator_swao_out_replicator_qdss>; + }; + }; + }; + + out-ports { + + port { + replicator_qdss_out_replicator_etr: endpoint { + remote-endpoint =3D + <&replicator_etr_in_replicator_qdss>; + }; + }; + }; + }; + + tmc_etr: tmc@10048000 { + compatible =3D "arm,coresight-tmc", "arm,primecell"; + reg =3D <0x0 0x10048000 0x0 0x1000>; + + iommus =3D <&apps_smmu 0x0600 0>; + arm,buffer-size =3D <0x10000>; + + arm,scatter-gather; + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + tmc_etr_in_replicator_etr: endpoint { + remote-endpoint =3D + <&replicator_etr_out_tmc_etr>; + }; + }; + }; + }; + + replicator@1004e000 { + compatible =3D "arm,coresight-dynamic-replicator", "arm,primecell"; + reg =3D <0x0 0x1004e000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + replicator_etr_in_replicator_qdss: endpoint { + remote-endpoint =3D + <&replicator_qdss_out_replicator_etr>; + }; + }; + }; + + out-ports { + + port { + + replicator_etr_out_tmc_etr: endpoint { + remote-endpoint =3D + <&tmc_etr_in_replicator_etr>; + }; + }; + }; + }; + + funnel@10b04000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg =3D <0x0 0x10b04000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@6 { + reg =3D <6>; + funnel_aoss_in_tpda_aoss: endpoint { + remote-endpoint =3D + <&tpda_aoss_out_funnel_aoss>; + }; + }; + + port@7 { + reg =3D <7>; + funnel_aoss_in_funnel_qdss: endpoint { + remote-endpoint =3D + <&funnel_qdss_out_funnel_aoss>; + }; + }; + }; + + out-ports { + port { + funnel_aoss_out_tmc_etf: endpoint { + remote-endpoint =3D + <&tmc_etf_in_funnel_aoss>; + }; + }; + }; + }; + + tmc@10b05000 { + compatible =3D "arm,coresight-tmc", "arm,primecell"; + reg =3D <0x0 0x10b05000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + tmc_etf_in_funnel_aoss: endpoint { + remote-endpoint =3D + <&funnel_aoss_out_tmc_etf>; + }; + }; + }; + + out-ports { + port { + tmc_etf_out_replicator_swao: endpoint { + remote-endpoint =3D + <&replicator_swao_in_tmc_etf>; + }; + }; + }; + }; + + replicator@10b06000 { + compatible =3D "arm,coresight-dynamic-replicator", "arm,primecell"; + reg =3D <0x0 0x10b06000 0x0 0x1000>; + + qcom,replicator-loses-context; + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + replicator_swao_in_tmc_etf: endpoint { + remote-endpoint =3D + <&tmc_etf_out_replicator_swao>; + }; + }; + }; + + out-ports { + + port { + replicator_swao_out_replicator_qdss: endpoint { + remote-endpoint =3D + <&replicator_qdss_in_replicator_swao>; + }; + }; + }; + }; + + tpda@10b08000 { + compatible =3D "qcom,coresight-tpda", "arm,primecell"; + + reg =3D <0x0 0x10b08000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + tpda_aoss_in_tpdm_swao_prio_0: endpoint { + remote-endpoint =3D + <&tpdm_swao_prio_0_out_tpda_aoss>; + }; + }; + + port@4 { + reg =3D <4>; + tpda_aoss_in_tpdm_swao: endpoint { + remote-endpoint =3D + <&tpdm_swao_out_tpda_aoss>; + }; + }; + }; + + out-ports { + + port { + tpda_aoss_out_funnel_aoss: endpoint { + remote-endpoint =3D + <&funnel_aoss_in_tpda_aoss>; + }; + }; + }; + }; + + tpdm@10b09000 { + compatible =3D "qcom,coresight-tpdm", "arm,primecell"; + reg =3D <0x0 0x10b09000 0x0 0x1000>; + + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + out-ports { + port { + tpdm_swao_prio_0_out_tpda_aoss: endpoint { + remote-endpoint =3D + <&tpda_aoss_in_tpdm_swao_prio_0>; + }; + }; + }; + }; + + tpdm@10b0d000 { + compatible =3D "qcom,coresight-tpdm", "arm,primecell"; + reg =3D <0x0 0x10b0d000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + out-ports { + port { + tpdm_swao_out_tpda_aoss: endpoint { + remote-endpoint =3D + <&tpda_aoss_in_tpdm_swao>; + }; + }; + }; + }; + + tpdm@10c28000 { + compatible =3D "qcom,coresight-tpdm", "arm,primecell"; + reg =3D <0x0 0x10c28000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + out-ports { + port { + tpdm_dlct_out_tpda_dl_center_26: endpoint { + remote-endpoint =3D + <&tpda_dl_center_26_in_tpdm_dlct>; + }; + }; + }; + }; + + tpdm@10c29000 { + compatible =3D "qcom,coresight-tpdm", "arm,primecell"; + reg =3D <0x0 0x10c29000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + out-ports { + port { + tpdm_ipcc_out_tpda_dl_center_27: endpoint { + remote-endpoint =3D + <&tpda_dl_center_27_in_tpdm_ipcc>; + }; + }; + }; + }; + + cti@10c2a000 { + compatible =3D "arm,coresight-cti", "arm,primecell"; + reg =3D <0x0 0x10c2a000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + }; + + cti@10c2b000 { + compatible =3D "arm,coresight-cti", "arm,primecell"; + reg =3D <0x0 0x10c2b000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + }; + + tpda@10c2e000 { + compatible =3D "qcom,coresight-tpda", "arm,primecell"; + reg =3D <0x0 0x10c2e000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1a { + reg =3D <26>; + tpda_dl_center_26_in_tpdm_dlct: endpoint { + remote-endpoint =3D + <&tpdm_dlct_out_tpda_dl_center_26>; + }; + }; + + port@1b { + reg =3D <27>; + tpda_dl_center_27_in_tpdm_ipcc: endpoint { + remote-endpoint =3D + <&tpdm_ipcc_out_tpda_dl_center_27>; + }; + }; + }; + + out-ports { + + port { + tpda_dl_center_out_funnel_dl_center: endpoint { + remote-endpoint =3D + <&funnel_dl_center_in_tpda_dl_center>; + }; + }; + }; + }; + + funnel@10c2f000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + reg =3D <0x0 0x10c2f000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + + port { + funnel_dl_center_in_tpda_dl_center: endpoint { + remote-endpoint =3D + <&tpda_dl_center_out_funnel_dl_center>; + }; + }; + }; + + out-ports { + port { + funnel_dl_center_out_funnel_in1: endpoint { + remote-endpoint =3D + <&funnel_in1_in_funnel_dl_center>; + }; + }; + }; + }; + + funnel@13810000 { + compatible =3D "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg =3D <0x0 0x13810000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + + port { + funnel_apss_in_funnel_ete: endpoint { + remote-endpoint =3D + <&funnel_ete_out_funnel_apss>; + }; + }; + }; + + out-ports { + port { + funnel_apss_out_funnel_in1: endpoint { + remote-endpoint =3D + <&funnel_in1_in_funnel_apss>; + }; + }; + }; + }; + + cti@138e0000 { + compatible =3D "arm,coresight-cti", "arm,primecell"; + reg =3D <0x0 0x138e0000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + }; + + cti@138f0000 { + compatible =3D "arm,coresight-cti", "arm,primecell"; + reg =3D <0x0 0x138f0000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + }; + + cti@13900000 { + compatible =3D "arm,coresight-cti", "arm,primecell"; + reg =3D <0x0 0x13900000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + }; + sram@146aa000 { compatible =3D "qcom,sm8450-imem", "syscon", "simple-mfd"; reg =3D <0 0x146aa000 0 0x1000>; --=20 2.46.0