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Fri, 13 Sep 2024 16:32:38 -0400 (EDT) From: Jiaxun Yang Date: Fri, 13 Sep 2024 21:32:05 +0100 Subject: [PATCH v3 2/4] LoongArch: cpu-probe: Move IOCSR probing out of cpu_probe_common Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240913-iocsr-v3-2-81a57f60350d@flygoat.com> References: <20240913-iocsr-v3-0-81a57f60350d@flygoat.com> In-Reply-To: <20240913-iocsr-v3-0-81a57f60350d@flygoat.com> To: Huacai Chen , WANG Xuerui , "Rafael J. Wysocki" , Viresh Kumar , Thomas Gleixner , Thomas Bogendoerfer Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-mips@vger.kernel.org, kvm@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3243; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=CxkMsd4bJJkWrqyEQFy6R/lqvKTJ2ykNLfa/bCFXErY=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrQnC6PPHFaLeGKy3nenkkaU9V1Rx/ZCQY+eHOkbl+RmW XWazD/ZUcrCIMbFICumyBIioNS3ofHigusPsv7AzGFlAhnCwMUpABPZncbwP6hjX27j5l7PJOOt uccEnzyUM1iiYV5nkdYu2O4/OSRVgOEPb133Svm2nZ0H8t41Zm4/Izij1KY47rtp6b19Kvd87kx nAAA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 IOCSR register definition appears to be a platform specific spec instead of architecture spec, even for Loongson CPUs there is no guarantee that IOCSR will always present. Thus it's dangerous to perform IOCSR probing without checking CPU type and instruction availability. Signed-off-by: Jiaxun Yang --- arch/loongarch/kernel/cpu-probe.c | 50 +++++++++++++++++++++--------------= ---- 1 file changed, 27 insertions(+), 23 deletions(-) diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-= probe.c index a5473bb673e5..8a868a10df9c 100644 --- a/arch/loongarch/kernel/cpu-probe.c +++ b/arch/loongarch/kernel/cpu-probe.c @@ -182,22 +182,6 @@ static void cpu_probe_common(struct cpuinfo_loongarch = *c) if (config & CPUCFG6_PMP) c->options |=3D LOONGARCH_CPU_PMP; =20 - config =3D iocsr_read32(LOONGARCH_IOCSR_FEATURES); - if (config & IOCSRF_CSRIPI) - c->options |=3D LOONGARCH_CPU_CSRIPI; - if (config & IOCSRF_EXTIOI) - c->options |=3D LOONGARCH_CPU_EXTIOI; - if (config & IOCSRF_FREQSCALE) - c->options |=3D LOONGARCH_CPU_SCALEFREQ; - if (config & IOCSRF_FLATMODE) - c->options |=3D LOONGARCH_CPU_FLATMODE; - if (config & IOCSRF_EIODECODE) - c->options |=3D LOONGARCH_CPU_EIODECODE; - if (config & IOCSRF_AVEC) - c->options |=3D LOONGARCH_CPU_AVECINT; - if (config & IOCSRF_VM) - c->options |=3D LOONGARCH_CPU_HYPERVISOR; - config =3D csr_read32(LOONGARCH_CSR_ASID); config =3D (config & CSR_ASID_BIT) >> CSR_ASID_BIT_SHIFT; asid_mask =3D GENMASK(config - 1, 0); @@ -240,15 +224,10 @@ static char cpu_full_name[MAX_NAME_LEN] =3D " = - "; =20 static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigne= d int cpu) { + uint32_t config; + const char *core_name =3D "Unknown"; uint64_t *vendor =3D (void *)(&cpu_full_name[VENDOR_OFFSET]); uint64_t *cpuname =3D (void *)(&cpu_full_name[CPUNAME_OFFSET]); - const char *core_name =3D "Unknown"; - - if (!__cpu_full_name[cpu]) - __cpu_full_name[cpu] =3D cpu_full_name; - - *vendor =3D iocsr_read64(LOONGARCH_IOCSR_VENDOR); - *cpuname =3D iocsr_read64(LOONGARCH_IOCSR_CPUNAME); =20 switch (BIT(fls(c->isa_level) - 1)) { case LOONGARCH_CPU_ISA_LA32R: @@ -284,6 +263,31 @@ static inline void cpu_probe_loongson(struct cpuinfo_l= oongarch *c, unsigned int } =20 pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name); + + if (!(c->options & LOONGARCH_CPU_IOCSR)) + return; + + *vendor =3D iocsr_read64(LOONGARCH_IOCSR_VENDOR); + *cpuname =3D iocsr_read64(LOONGARCH_IOCSR_CPUNAME); + + if (!__cpu_full_name[cpu]) + __cpu_full_name[cpu] =3D cpu_full_name; + + config =3D iocsr_read32(LOONGARCH_IOCSR_FEATURES); + if (config & IOCSRF_CSRIPI) + c->options |=3D LOONGARCH_CPU_CSRIPI; + if (config & IOCSRF_EXTIOI) + c->options |=3D LOONGARCH_CPU_EXTIOI; + if (config & IOCSRF_FREQSCALE) + c->options |=3D LOONGARCH_CPU_SCALEFREQ; + if (config & IOCSRF_FLATMODE) + c->options |=3D LOONGARCH_CPU_FLATMODE; + if (config & IOCSRF_EIODECODE) + c->options |=3D LOONGARCH_CPU_EIODECODE; + if (config & IOCSRF_AVEC) + c->options |=3D LOONGARCH_CPU_AVECINT; + if (config & IOCSRF_VM) + c->options |=3D LOONGARCH_CPU_HYPERVISOR; } =20 #ifdef CONFIG_64BIT --=20 2.46.0