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AJvYcCUDk6S1JxiJ/vgrEbxFy1zdEnaUNa6SHruiIgB0JoJZzCAt64qr4v/R+Zl3GuQJj67S19lXJ36ibj3p@vger.kernel.org, AJvYcCVTMTbDjJLsvXSWnHO5l06hxDr/tYHNDKUWiHw9eqcFHgVGwlSxLBY4A1+US1YjiPTojiEG+eJByK3DSTl/@vger.kernel.org, AJvYcCWo8A8M6SMtXgtCUUCEnSyzpc5Me4xbAgvuVkyfqzamdT1cXKaZmIBydWQ6ziWX1v7TFIH5usoZ/Xa/@vger.kernel.org X-Gm-Message-State: AOJu0Yxab8SjaAzosy62X7zmSSnk7t+sge/wfunLUXKBWhHG0De70qI8 f1ItNj7yQ0IN8LfnQyC31tXqZRLhwuAjeU/Cm7VnEZuJHd/mmelwI9bVSvn8 X-Google-Smtp-Source: AGHT+IGenkjEZ9iPYzzQ53EWO3gfWZR5S3ReCPXsdQk3v34mKgKb+DNAYWlvKA7k91POyeaMDxgTJg== X-Received: by 2002:a05:6402:270a:b0:5c2:50a2:98a2 with SMTP id 4fb4d7f45d1cf-5c41df9e26cmr504183a12.6.1726183966120; Thu, 12 Sep 2024 16:32:46 -0700 (PDT) Received: from localhost.localdomain ([2a04:ee41:82:7577:85e4:cf41:16db:65d5]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c421aab306sm26693a12.73.2024.09.12.16.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Sep 2024 16:32:45 -0700 (PDT) From: Vasileios Amoiridis To: jic23@kernel.org, lars@metafoo.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com Cc: vassilisamir@gmail.com, ang.iglesiasg@gmail.com, linus.walleij@linaro.org, biju.das.jz@bp.renesas.com, javier.carrasco.cruz@gmail.com, semen.protsenko@linaro.org, 579lpy@gmail.com, ak@it-klinger.de, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, christophe.jaillet@wanadoo.fr Subject: [PATCH v6 3/4] iio: pressure: bmp280: Add data ready trigger support Date: Fri, 13 Sep 2024 01:32:33 +0200 Message-Id: <20240912233234.45519-4-vassilisamir@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240912233234.45519-1-vassilisamir@gmail.com> References: <20240912233234.45519-1-vassilisamir@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The BMP3xx and BMP5xx sensors have an interrupt pin which can be used as a trigger for when there are data ready in the sensor for pick up. This use case is used along with NORMAL_MODE in the sensor, which allows the sensor to do consecutive measurements depending on the ODR rate value. The trigger pin can be configured to be open-drain or push-pull and either rising or falling edge. No support is added yet for interrupts for FIFO, WATERMARK and out of range values. Signed-off-by: Vasileios Amoiridis --- drivers/iio/pressure/bmp280-core.c | 225 ++++++++++++++++++++++++++++- drivers/iio/pressure/bmp280.h | 21 +++ 2 files changed, 244 insertions(+), 2 deletions(-) diff --git a/drivers/iio/pressure/bmp280-core.c b/drivers/iio/pressure/bmp2= 80-core.c index 8c87f7ef28c9..0edd756ef8da 100644 --- a/drivers/iio/pressure/bmp280-core.c +++ b/drivers/iio/pressure/bmp280-core.c @@ -42,12 +42,14 @@ #include #include #include +#include #include #include #include =20 #include #include +#include #include #include =20 @@ -1278,6 +1280,63 @@ static irqreturn_t bme280_trigger_handler(int irq, v= oid *p) return IRQ_HANDLED; } =20 +static int __bmp280_trigger_probe(struct iio_dev *indio_dev, + const struct iio_trigger_ops *trigger_ops, + int (*int_pin_config)(struct bmp280_data *data), + irq_handler_t irq_thread_handler) +{ + struct bmp280_data *data =3D iio_priv(indio_dev); + struct device *dev =3D data->dev; + u32 irq_type; + int ret, irq; + + irq =3D fwnode_irq_get(dev_fwnode(dev), 0); + if (irq < 0) + return dev_err_probe(dev, irq, "No interrupt found.\n"); + + irq_type =3D irq_get_trigger_type(irq); + switch (irq_type) { + case IRQF_TRIGGER_RISING: + data->trig_active_high =3D true; + break; + case IRQF_TRIGGER_FALLING: + data->trig_active_high =3D false; + break; + default: + return dev_err_probe(dev, -EINVAL, "Invalid interrupt type specified.\n"= ); + } + + data->trig_open_drain =3D + fwnode_property_read_bool(dev_fwnode(dev), "int-open-drain"); + + ret =3D int_pin_config(data); + if (ret) + return ret; + + data->trig =3D devm_iio_trigger_alloc(data->dev, "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); + if (!data->trig) + return -ENOMEM; + + data->trig->ops =3D trigger_ops; + iio_trigger_set_drvdata(data->trig, data); + + ret =3D devm_request_threaded_irq(data->dev, irq, NULL, + irq_thread_handler, IRQF_ONESHOT, + indio_dev->name, indio_dev); + if (ret) + return dev_err_probe(dev, ret, "request IRQ failed.\n"); + + ret =3D devm_iio_trigger_register(data->dev, data->trig); + if (ret) + return dev_err_probe(dev, ret, "iio trigger register failed.\n"); + + indio_dev->trig =3D iio_trigger_get(data->trig); + + return 0; +} + static const u8 bme280_chip_ids[] =3D { BME280_CHIP_ID }; static const int bme280_humid_coeffs[] =3D { 1000, 1024 }; =20 @@ -1779,6 +1838,81 @@ static int bmp380_chip_config(struct bmp280_data *da= ta) return ret; } =20 +static void bmp380_trigger_reenable(struct iio_trigger *trig) +{ + struct bmp280_data *data =3D iio_trigger_get_drvdata(trig); + unsigned int tmp; + int ret; + + ret =3D regmap_read(data->regmap, BMP380_REG_INT_STATUS, &tmp); + if (ret) + dev_err(data->dev, "Failed to reset interrupt.\n"); +} + +static int bmp380_data_rdy_trigger_set_state(struct iio_trigger *trig, + bool state) +{ + struct bmp280_data *data =3D iio_trigger_get_drvdata(trig); + int ret; + + guard(mutex)(&data->lock); + + ret =3D regmap_update_bits(data->regmap, BMP380_REG_INT_CONTROL, + BMP380_INT_CTRL_DRDY_EN, + FIELD_PREP(BMP380_INT_CTRL_DRDY_EN, !!state)); + if (ret) + dev_err(data->dev, + "Could not %s interrupt.\n", str_enable_disable(state)); + return ret; +} + +static const struct iio_trigger_ops bmp380_trigger_ops =3D { + .set_trigger_state =3D &bmp380_data_rdy_trigger_set_state, + .reenable =3D &bmp380_trigger_reenable, +}; + +static int bmp380_int_pin_config(struct bmp280_data *data) +{ + int pin_drive_cfg =3D FIELD_PREP(BMP380_INT_CTRL_OPEN_DRAIN, + data->trig_open_drain); + int pin_level_cfg =3D FIELD_PREP(BMP380_INT_CTRL_LEVEL, + data->trig_active_high); + int ret, int_pin_cfg =3D pin_drive_cfg | pin_level_cfg; + + ret =3D regmap_update_bits(data->regmap, BMP380_REG_INT_CONTROL, + BMP380_INT_CTRL_SETTINGS_MASK, int_pin_cfg); + if (ret) + dev_err(data->dev, "Could not set interrupt settings.\n"); + + return ret; +} + +static irqreturn_t bmp380_irq_thread_handler(int irq, void *p) +{ + struct iio_dev *indio_dev =3D p; + struct bmp280_data *data =3D iio_priv(indio_dev); + unsigned int int_ctrl; + int ret; + + scoped_guard(mutex, &data->lock) { + ret =3D regmap_read(data->regmap, BMP380_REG_INT_STATUS, &int_ctrl); + if (ret) + return IRQ_NONE; + } + + if (FIELD_GET(BMP380_INT_STATUS_DRDY, int_ctrl)) + iio_trigger_poll_nested(data->trig); + + return IRQ_HANDLED; +} + +static int bmp380_trigger_probe(struct iio_dev *indio_dev) +{ + return __bmp280_trigger_probe(indio_dev, &bmp380_trigger_ops, + bmp380_int_pin_config, + bmp380_irq_thread_handler); +} + static irqreturn_t bmp380_trigger_handler(int irq, void *p) { struct iio_poll_func *pf =3D p; @@ -1873,6 +2007,7 @@ const struct bmp280_chip_info bmp380_chip_info =3D { .wait_conv =3D bmp380_wait_conv, .preinit =3D bmp380_preinit, =20 + .trigger_probe =3D bmp380_trigger_probe, .trigger_handler =3D bmp380_trigger_handler, }; EXPORT_SYMBOL_NS(bmp380_chip_info, IIO_BMP280); @@ -2420,6 +2555,88 @@ static int bmp580_chip_config(struct bmp280_data *da= ta) return 0; } =20 +static void bmp580_trigger_reenable(struct iio_trigger *trig) +{ + struct bmp280_data *data =3D iio_trigger_get_drvdata(trig); + unsigned int tmp; + int ret; + + ret =3D regmap_read(data->regmap, BMP580_REG_INT_STATUS, &tmp); + if (ret) + dev_err(data->dev, "Failed to reset interrupt.\n"); +} + +static int bmp580_data_rdy_trigger_set_state(struct iio_trigger *trig, + bool state) +{ + struct bmp280_data *data =3D iio_trigger_get_drvdata(trig); + int ret; + + guard(mutex)(&data->lock); + + ret =3D regmap_update_bits(data->regmap, BMP580_REG_INT_CONFIG, + BMP580_INT_CONFIG_INT_EN, + FIELD_PREP(BMP580_INT_CONFIG_INT_EN, !!state)); + if (ret) + dev_err(data->dev, + "Could not %s interrupt.\n", str_enable_disable(state)); + return ret; +} + +static const struct iio_trigger_ops bmp580_trigger_ops =3D { + .set_trigger_state =3D &bmp580_data_rdy_trigger_set_state, + .reenable =3D &bmp580_trigger_reenable, +}; + +static int bmp580_int_pin_config(struct bmp280_data *data) +{ + int pin_drive_cfg =3D FIELD_PREP(BMP580_INT_CONFIG_OPEN_DRAIN, + data->trig_open_drain); + int pin_level_cfg =3D FIELD_PREP(BMP580_INT_CONFIG_LEVEL, + data->trig_active_high); + int ret, int_pin_cfg =3D pin_drive_cfg | pin_level_cfg; + + ret =3D regmap_update_bits(data->regmap, BMP580_REG_INT_CONFIG, + BMP580_INT_CONFIG_MASK, int_pin_cfg); + if (ret) { + dev_err(data->dev, "Could not set interrupt settings.\n"); + return ret; + } + + ret =3D regmap_set_bits(data->regmap, BMP580_REG_INT_SOURCE, + BMP580_INT_SOURCE_DRDY); + if (ret) + dev_err(data->dev, "Could not set interrupt source.\n"); + + return ret; +} + +static irqreturn_t bmp580_irq_thread_handler(int irq, void *p) +{ + struct iio_dev *indio_dev =3D p; + struct bmp280_data *data =3D iio_priv(indio_dev); + unsigned int int_ctrl; + int ret; + + scoped_guard(mutex, &data->lock) { + ret =3D regmap_read(data->regmap, BMP580_REG_INT_STATUS, &int_ctrl); + if (ret) + return IRQ_NONE; + } + + if (FIELD_GET(BMP580_INT_STATUS_DRDY_MASK, int_ctrl)) + iio_trigger_poll_nested(data->trig); + + return IRQ_HANDLED; +} + +static int bmp580_trigger_probe(struct iio_dev *indio_dev) +{ + return __bmp280_trigger_probe(indio_dev, &bmp580_trigger_ops, + bmp580_int_pin_config, + bmp580_irq_thread_handler); +} + static irqreturn_t bmp580_trigger_handler(int irq, void *p) { struct iio_poll_func *pf =3D p; @@ -2496,6 +2713,7 @@ const struct bmp280_chip_info bmp580_chip_info =3D { .wait_conv =3D bmp580_wait_conv, .preinit =3D bmp580_preinit, =20 + .trigger_probe =3D bmp580_trigger_probe, .trigger_handler =3D bmp580_trigger_handler, }; EXPORT_SYMBOL_NS(bmp580_chip_info, IIO_BMP280); @@ -3043,8 +3261,11 @@ int bmp280_common_probe(struct device *dev, * however as it happens, the BMP085 shares the chip ID of BMP180 * so we look for an IRQ if we have that. */ - if (irq > 0 && (chip_id =3D=3D BMP180_CHIP_ID)) { - ret =3D bmp085_fetch_eoc_irq(dev, name, irq, data); + if (irq > 0) { + if (chip_id =3D=3D BMP180_CHIP_ID) + ret =3D bmp085_fetch_eoc_irq(dev, name, irq, data); + if (data->chip_info->trigger_probe) + ret =3D data->chip_info->trigger_probe(indio_dev); if (ret) return ret; } diff --git a/drivers/iio/pressure/bmp280.h b/drivers/iio/pressure/bmp280.h index c9840b8d58b0..0c32b6430677 100644 --- a/drivers/iio/pressure/bmp280.h +++ b/drivers/iio/pressure/bmp280.h @@ -55,8 +55,17 @@ #define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0 #define BMP580_CMD_SOFT_RESET 0xB6 =20 +#define BMP580_INT_STATUS_DRDY_MASK BIT(0) #define BMP580_INT_STATUS_POR_MASK BIT(4) =20 +#define BMP580_INT_SOURCE_DRDY BIT(0) + +#define BMP580_INT_CONFIG_MASK GENMASK(3, 0) +#define BMP580_INT_CONFIG_LATCH BIT(0) +#define BMP580_INT_CONFIG_LEVEL BIT(1) +#define BMP580_INT_CONFIG_OPEN_DRAIN BIT(2) +#define BMP580_INT_CONFIG_INT_EN BIT(3) + #define BMP580_STATUS_CORE_RDY_MASK BIT(0) #define BMP580_STATUS_NVM_RDY_MASK BIT(1) #define BMP580_STATUS_NVM_ERR_MASK BIT(2) @@ -175,6 +184,14 @@ #define BMP380_TEMP_MEAS_OFFSET 163 #define BMP380_PRESS_MEAS_OFFSET 392 =20 +#define BMP380_INT_STATUS_DRDY BIT(3) + +#define BMP380_INT_CTRL_SETTINGS_MASK GENMASK(2, 0) +#define BMP380_INT_CTRL_OPEN_DRAIN BIT(0) +#define BMP380_INT_CTRL_LEVEL BIT(1) +#define BMP380_INT_CTRL_LATCH BIT(2) +#define BMP380_INT_CTRL_DRDY_EN BIT(6) + #define BMP380_MIN_TEMP -4000 #define BMP380_MAX_TEMP 8500 #define BMP380_MIN_PRES 3000000 @@ -406,6 +423,9 @@ struct bmp280_data { struct regmap *regmap; struct completion done; bool use_eoc; + bool trig_open_drain; + bool trig_active_high; + struct iio_trigger *trig; const struct bmp280_chip_info *chip_info; union { struct bmp180_calib bmp180; @@ -510,6 +530,7 @@ struct bmp280_chip_info { int (*set_mode)(struct bmp280_data *data, enum bmp280_op_mode mode); int (*wait_conv)(struct bmp280_data *data); =20 + int (*trigger_probe)(struct iio_dev *indio_dev); irqreturn_t (*trigger_handler)(int irq, void *p); }; =20 --=20 2.25.1