From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AF221AC8A3; Wed, 11 Sep 2024 15:48:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069710; cv=none; b=UcUJ/eOkWXX+S8i86K8nom61+49uNCfnu9zoYaoTBirPRRFKv3EdSIVLj9ktK0tImGXtElRfBFTqWxdCiFlKzOAUnWbCZ1Hucb6jmjNs50u2NfkW16yCdlubfOYIvxIY3+iYkGdRGIkCRtn6a2uplPeeRsNxZcTezs4SQvvUPtc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069710; c=relaxed/simple; bh=fbdMbu/WJ3UEOautWFpku/qMpEGheGBW2zuf4DXNYiQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=njjT93FF56nheXTeEhZq9O51quxeWogP+6/EAU1igC0JRJKyyy83zyyOn2NsBUcnewJMtjDcfDNExytwuqrDC4B7FYp+ziy6RSLEDM6gxJg5bVwt3sCut7ERrOo4R87m6i3QZygu957Kk2IqME4QN/MsxC0bqs1VvAs/mYb0cpM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Fgzpf+wO; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Fgzpf+wO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069709; x=1757605709; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fbdMbu/WJ3UEOautWFpku/qMpEGheGBW2zuf4DXNYiQ=; b=Fgzpf+wOPL4nOWRbRdLFOBap4n2VutwoZUEtCbXutbOnJURPFz3C0b5+ Pfc6MPeDB6gVNwLqKvS7w0v+2DBCzK3O3JHr9b3EMFaE4Hu/6tYdbH0Xu WTyV9JjG+0uQ23/8Ov4X75kq4YPYVcyohHvyXdkcv0sYi9d481yO2JCWb 5H6dKvBhiPYXQO07kdNnB2Ryk0FHJubJob4eGMHzZ9aaJxuPc1ctEwHmw ikVNv98oi6LavHy/N9HGLmn3zlRdsJQJl1jpomFNeeSUvqWEg7bAgsjun NpBo0ctzjD8knmIA9k9s1HJnjt9mNm7O0GsyL62fpQEupIsDtXs6eK9vD Q==; X-CSE-ConnectionGUID: 3LBulcMFQWO2op0qRR3izg== X-CSE-MsgGUID: rj7F/FjmQgax2WZL6LFvEA== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701828" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701828" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:24 -0700 X-CSE-ConnectionGUID: AUjjk1B3QVOV311pcL8wig== X-CSE-MsgGUID: C+fM6kAzR4+7YVs5WgffvQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="67255177" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa010.jf.intel.com with ESMTP; 11 Sep 2024 08:48:23 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 573B3170; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 01/12] i2c: isch: Add missed 'else' Date: Wed, 11 Sep 2024 18:39:14 +0300 Message-ID: <20240911154820.2846187-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In accordance with the existing comment and code analysis it is quite likely that there is a missed 'else' when adapter times out. Add it. Fixes: 5bc1200852c3 ("i2c: Add Intel SCH SMBus support") Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 33dbc19d3848..f59158489ad9 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -99,8 +99,7 @@ static int sch_transaction(void) if (retries > MAX_RETRIES) { dev_err(&sch_adapter.dev, "SMBus Timeout!\n"); result =3D -ETIMEDOUT; - } - if (temp & 0x04) { + } else if (temp & 0x04) { result =3D -EIO; dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be " "locked until next hard reset. (sorry!)\n"); --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FE871AC891; Wed, 11 Sep 2024 15:48:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069712; cv=none; b=TALnaAl97uEf78r7UIkfvck7kDwJYHkoFm4tJpQHOeXTaEGDg9wHm2Kg0SiuAP9qVCvmDOkcYLTOEUK5660iQA6b4ZoPN5md27tR0ibB/PWSpvDpboTfxRMkUcvJMURuPIH9WPpxFr7zoWjquv0/h0OzxaCjKqC++XuY0Ltff58= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069712; c=relaxed/simple; bh=WxtYlBGVCCxL+Las691qhrqx8d/+iyr6qXtIQAGc/Ic=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Dpik0xcntvj0k5E+ON5lUDGPKbRofWkpJO3laiF4/vKE6WAQZCgnMVJbeD72T4b5E9XyHdQqSCInslMcXWfmZuJGoTRp29/HoKyk6EfnQlMbqPanr65uiY94dq0CqmKaXPzpXQ9Rz0xv6ntW68QkgtcrZT2McT1BoedbZiIx1kA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=YKHeTNVq; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YKHeTNVq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069709; x=1757605709; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WxtYlBGVCCxL+Las691qhrqx8d/+iyr6qXtIQAGc/Ic=; b=YKHeTNVqZb0TvcxGJCOP3ZVBhSDGKKY91K9tcQ5wHgvCnJvBoUO82xpr QR1SktTwvOuK6M4U764bI9tHRV8jS4AjP80P21bcq89TiNXHUouqgnx0p DF1FnykbY7M8SCMeYjOOio4RRZyu3eawBMejBxr7hvtsWgXTBC680rYv3 IBEK8IopoWUkyTqnrElZG1Z0qQbZHfC9X2BfzYZaczZGvHJ61NyqmC9dC uUBTPXGoTHgA7YuSK1GH2VhTmPLPRrPf88xADkT6Zg/VftnloNZoHTq5E oAScKC3sGZcuThU2QsQJYzj79+qxMUUT+58RyBkkkcvS+HuLRuyw5hvM6 Q==; X-CSE-ConnectionGUID: 47DMqu3NRg+s/DtyBszISA== X-CSE-MsgGUID: TMb3YVfgRe6jkiFt40yi4w== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701831" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701831" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:24 -0700 X-CSE-ConnectionGUID: INwMGD0+S+GR9cQH3BYEEQ== X-CSE-MsgGUID: IwqPKdIvRFuAvHy2Y450yA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="67255179" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa010.jf.intel.com with ESMTP; 11 Sep 2024 08:48:23 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5C769432; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 02/12] i2c: isch: Pass pointer to struct i2c_adapter down Date: Wed, 11 Sep 2024 18:39:15 +0300 Message-ID: <20240911154820.2846187-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There are a lot of messaging calls that use global variable of struct i2c_adapter. Instead, to make code better and flexible for further improvements, pass the pointer to the actual adapter used for transfers. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 53 +++++++++++++++-------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index f59158489ad9..96ee73fe6e81 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -55,14 +55,15 @@ MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz= , (default =3D 33000)"); * and this function will execute it. * return 0 for success and others for failure. */ -static int sch_transaction(void) +static int sch_transaction(struct i2c_adapter *adap) { int temp; int result =3D 0; int retries =3D 0; =20 - dev_dbg(&sch_adapter.dev, "Transaction (pre): CNT=3D%02x, CMD=3D%02x, " - "ADD=3D%02x, DAT0=3D%02x, DAT1=3D%02x\n", inb(SMBHSTCNT), + dev_dbg(&adap->dev, + "Transaction (pre): CNT=3D%02x, CMD=3D%02x, ADD=3D%02x, DAT0=3D%02x, DAT= 1=3D%02x\n", + inb(SMBHSTCNT), inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), inb(SMBHSTDAT1)); =20 @@ -70,19 +71,14 @@ static int sch_transaction(void) temp =3D inb(SMBHSTSTS) & 0x0f; if (temp) { /* Can not be busy since we checked it in sch_access */ - if (temp & 0x01) { - dev_dbg(&sch_adapter.dev, "Completion (%02x). " - "Clear...\n", temp); - } - if (temp & 0x06) { - dev_dbg(&sch_adapter.dev, "SMBus error (%02x). " - "Resetting...\n", temp); - } + if (temp & 0x01) + dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); + if (temp & 0x06) + dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); outb(temp, SMBHSTSTS); temp =3D inb(SMBHSTSTS) & 0x0f; if (temp) { - dev_err(&sch_adapter.dev, - "SMBus is not ready: (%02x)\n", temp); + dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; } } @@ -97,31 +93,30 @@ static int sch_transaction(void) =20 /* If the SMBus is still busy, we give up */ if (retries > MAX_RETRIES) { - dev_err(&sch_adapter.dev, "SMBus Timeout!\n"); + dev_err(&adap->dev, "SMBus Timeout!\n"); result =3D -ETIMEDOUT; } else if (temp & 0x04) { result =3D -EIO; - dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be " - "locked until next hard reset. (sorry!)\n"); + dev_dbg(&adap->dev, "Bus collision! SMBus may be locked until next hard = reset. (sorry!)\n"); /* Clock stops and target is stuck in mid-transmission */ } else if (temp & 0x02) { result =3D -EIO; - dev_err(&sch_adapter.dev, "Error: no response!\n"); + dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { - dev_dbg(&sch_adapter.dev, "Post complete!\n"); + dev_dbg(&adap->dev, "Post complete!\n"); outb(temp, SMBHSTSTS); temp =3D inb(SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ - dev_dbg(&sch_adapter.dev, "Failed reset at end of " - "transaction (%02x), Bus error!\n", temp); + dev_dbg(&adap->dev, + "Failed reset at end of transaction (%02x), Bus error!\n", temp); } } else { result =3D -ENXIO; - dev_dbg(&sch_adapter.dev, "No such address.\n"); + dev_dbg(&adap->dev, "No such address.\n"); } - dev_dbg(&sch_adapter.dev, "Transaction (post): CNT=3D%02x, CMD=3D%02x, " - "ADD=3D%02x, DAT0=3D%02x, DAT1=3D%02x\n", inb(SMBHSTCNT), + dev_dbg(&adap->dev, "Transaction (post): CNT=3D%02x, CMD=3D%02x, ADD=3D%0= 2x, DAT0=3D%02x, DAT1=3D%02x\n", + inb(SMBHSTCNT), inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), inb(SMBHSTDAT1)); return result; @@ -143,7 +138,7 @@ static s32 sch_access(struct i2c_adapter *adap, u16 add= r, /* Make sure the SMBus host is not busy */ temp =3D inb(SMBHSTSTS) & 0x0f; if (temp & 0x08) { - dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp); + dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); return -EAGAIN; } temp =3D inw(SMBHSTCLK); @@ -154,13 +149,11 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, * 100 kHz. If we actually run at 25 MHz the bus will be * run ~75 kHz instead which should do no harm. */ - dev_notice(&sch_adapter.dev, - "Clock divider uninitialized. Setting defaults\n"); + dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"= ); outw(backbone_speed / (4 * 100), SMBHSTCLK); } =20 - dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size, - (read_write)?"READ":"WRITE"); + dev_dbg(&adap->dev, "access size: %d %s\n", size, (read_write)?"READ":"WR= ITE"); switch (size) { case I2C_SMBUS_QUICK: outb((addr << 1) | read_write, SMBHSTADD); @@ -205,10 +198,10 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, dev_warn(&adap->dev, "Unsupported transaction %d\n", size); return -EOPNOTSUPP; } - dev_dbg(&sch_adapter.dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); + dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT); =20 - rc =3D sch_transaction(); + rc =3D sch_transaction(adap); if (rc) /* Error in transaction */ return rc; =20 --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A463B19CC19; Wed, 11 Sep 2024 15:48:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069708; cv=none; b=tg4InurhTkLltTIHAxsRAtxqorq1Si5OelEsx5x7MclEGGsjMI40nVHkZK8UFIQIGJXHOc1SGwRabQREWOmTWfi+X68NViYNA8MmNraCiozcz7Pzcyd1DT4NewWrFhF4t/NtCgQtomLNm1gVtoACM+HDLDKHadEIzVDR4X4Jdrk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069708; c=relaxed/simple; bh=Taa17+tLPBdmnRuoMJ/IqSoAFLOrHizGCjbHljk5goo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eADBe6WfhGlxN/8aO2zpLFT7E1tfUvacVs7niml1U0OOXTAsKKiSbRhxVOm1hRdsGgvh3RJ+0jEiBSBVafr9BPZZfus4IIR7kCFQ4PuAId23ndSYbEQZIjNyEIMvb8t8BglB7HAxdfEE9/jWXdPK7iNcggKMZVnf7wb41yEdYEg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JmkKexNn; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JmkKexNn" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069707; x=1757605707; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Taa17+tLPBdmnRuoMJ/IqSoAFLOrHizGCjbHljk5goo=; b=JmkKexNnJkMaLNVXNqbmnGJoDD79NfiMVaUn9RvZypfCplGdGUoE+7tY DKb1ih+D3gsiInDxWmvdAmEq/fIr+BC5zbjbfun9VpqZOC90gx0xk2rBp ne2kTHZGIOIq54rEy9KXxIlOSwGK8l3EVu6l2MCOK70CfjD2J1RuC+po1 oK6SklsDHiAB/BAS+vSXySb/5gfTx2HkxmVAHghr7A9lZGjydBxlAGgFs g1Ggcno719h42ONosua2swJU/2C1L+tarADMEwzwaZkrYCW46eVfRBT30 NsSm4L3O2IdBc8zxhQKAUe93MVLWUyOE9/wN81DBzMNbgEvi4ybs3yxEM g==; X-CSE-ConnectionGUID: ph9cYR6yQIWUkamHJfo70g== X-CSE-MsgGUID: A8gBdP22SWaTxKOydqps8w== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701824" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701824" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:24 -0700 X-CSE-ConnectionGUID: scawFjl2TCCIbXh63Rur3w== X-CSE-MsgGUID: URChb2e2TJ+0RRbFp6VtOg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="67255176" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa010.jf.intel.com with ESMTP; 11 Sep 2024 08:48:23 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 61A3E44A; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 03/12] i2c: isch: Use string_choices API instead of ternary operator Date: Wed, 11 Sep 2024 18:39:16 +0300 Message-ID: <20240911154820.2846187-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use modern string_choices API instead of manually determining the output using ternary operator. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 96ee73fe6e81..f44c5fa276dc 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -19,10 +19,11 @@ #include #include #include -#include #include #include #include +#include +#include =20 /* SCH SMBus address offsets */ #define SMBHSTCNT (0 + sch_smba) @@ -153,7 +154,7 @@ static s32 sch_access(struct i2c_adapter *adap, u16 add= r, outw(backbone_speed / (4 * 100), SMBHSTCLK); } =20 - dev_dbg(&adap->dev, "access size: %d %s\n", size, (read_write)?"READ":"WR= ITE"); + dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_wri= te)); switch (size) { case I2C_SMBUS_QUICK: outb((addr << 1) | read_write, SMBHSTADD); --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09D561AC88D; Wed, 11 Sep 2024 15:48:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069713; cv=none; b=GDN6f9GMj+mcVdwu01AyM3wo7r2Ve16zoa4Wbfmmx6/PC2bC7yjaAj6uinwatHZ0bdnk+JqMtEmy1odUgbykJ0OajVw4YqWqE84YYkUw7LXoqBwCDl095oUHxfICEpIMw3HhVdk0y0f8l6N7eWNkO/nsFZFzLxBhGdLE0D6ziR8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069713; c=relaxed/simple; bh=yjaFY7nnLhagAzQ5YObAjZVeoGqHQoN8mznJsgkusn4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cgnNZDsEn6VMXQppR7icB/Y5fwMatoYHynDNXSAPnr4r6oBWAooyEb7c0kRv3bXiZYp1jeKRR50tc73lOlw0cAE2w3la3U2O4eAByCeLTjOHiFtVU5DtYEFeIAaVHPc2cLobbOzBQ+23lBNuvqQ9MyJUEd4ZN1NPGc4gU6SD1wU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XI9L3Kaw; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XI9L3Kaw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069709; x=1757605709; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yjaFY7nnLhagAzQ5YObAjZVeoGqHQoN8mznJsgkusn4=; b=XI9L3KawmhgQfvEvcMZGB6zzUc2DObmmbjFj5/0LgT40z7X2tmPVJbPD cGHNnmrMeUzgBhYkUQmf2D8zFZ5Amm8lJyXr8mqVFAvhFd3+wVc0Mt5MJ afqg/eO/exd2E6gt/pIi6Q3hreubM/6IFzRlTwUbJ6i6B4lFSIctx+dsU OO+JqwZVZxm8lm7bXjvKINspQVzFqa7xZPTVMMdJqmqVIQGozEskZDLAZ Xtd1VLtHHmlP/nwVaMHlKpDBL9myyvXSZbiBgBh15o+/xXMDH3Ot4xNPy nd4tk+Y+R0bF7Ob7E9Ga9MrIYl5uypT2TezHCxHT8VzIeMCExNJM9rIWW g==; X-CSE-ConnectionGUID: AmfAYkppRqizbpDN4nfEwA== X-CSE-MsgGUID: tGkcICBGQLKrMa1kn6AcWQ== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701816" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701816" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:24 -0700 X-CSE-ConnectionGUID: vEoEUQsKREOFD+I0cQSNqA== X-CSE-MsgGUID: UUfL63XBQXGlsUZyl27biQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="72388552" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:22 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6F98B457; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 04/12] i2c: isch: Switch to memory mapped IO accessors Date: Wed, 11 Sep 2024 18:39:17 +0300 Message-ID: <20240911154820.2846187-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert driver to use memory mapped IO accessors. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 133 ++++++++++++++++++++-------------- 1 file changed, 78 insertions(+), 55 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index f44c5fa276dc..8d34d4398f9b 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -24,16 +24,17 @@ #include #include #include +#include =20 /* SCH SMBus address offsets */ -#define SMBHSTCNT (0 + sch_smba) -#define SMBHSTSTS (1 + sch_smba) -#define SMBHSTCLK (2 + sch_smba) -#define SMBHSTADD (4 + sch_smba) /* TSA */ -#define SMBHSTCMD (5 + sch_smba) -#define SMBHSTDAT0 (6 + sch_smba) -#define SMBHSTDAT1 (7 + sch_smba) -#define SMBBLKDAT (0x20 + sch_smba) +#define SMBHSTCNT 0x00 +#define SMBHSTSTS 0x01 +#define SMBHSTCLK 0x02 +#define SMBHSTADD 0x04 /* TSA */ +#define SMBHSTCMD 0x05 +#define SMBHSTDAT0 0x06 +#define SMBHSTDAT1 0x07 +#define SMBBLKDAT 0x20 =20 /* Other settings */ #define MAX_RETRIES 5000 @@ -45,12 +46,33 @@ #define SCH_WORD_DATA 0x03 #define SCH_BLOCK_DATA 0x05 =20 -static unsigned short sch_smba; static struct i2c_adapter sch_adapter; +static void __iomem *sch_smba; + static int backbone_speed =3D 33000; /* backbone speed in kHz */ module_param(backbone_speed, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default =3D 3300= 0)"); =20 +static inline u8 sch_io_rd8(void __iomem *smba, unsigned int offset) +{ + return ioread8(smba + offset); +} + +static inline void sch_io_wr8(void __iomem *smba, unsigned int offset, u8 = value) +{ + iowrite8(value, smba + offset); +} + +static inline u16 sch_io_rd16(void __iomem *smba, unsigned int offset) +{ + return ioread16(smba + offset); +} + +static inline void sch_io_wr16(void __iomem *smba, unsigned int offset, u1= 6 value) +{ + iowrite16(value, smba + offset); +} + /* * Start the i2c transaction -- the i2c_access will prepare the transaction * and this function will execute it. @@ -64,20 +86,20 @@ static int sch_transaction(struct i2c_adapter *adap) =20 dev_dbg(&adap->dev, "Transaction (pre): CNT=3D%02x, CMD=3D%02x, ADD=3D%02x, DAT0=3D%02x, DAT= 1=3D%02x\n", - inb(SMBHSTCNT), - inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), - inb(SMBHSTDAT1)); + sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), + sch_io_rd8(sch_smba, SMBHSTADD), + sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); =20 /* Make sure the SMBus host is ready to start transmitting */ - temp =3D inb(SMBHSTSTS) & 0x0f; + temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; if (temp) { /* Can not be busy since we checked it in sch_access */ if (temp & 0x01) dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); if (temp & 0x06) dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); - outb(temp, SMBHSTSTS); - temp =3D inb(SMBHSTSTS) & 0x0f; + sch_io_wr8(sch_smba, SMBHSTSTS, temp); + temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; if (temp) { dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; @@ -85,11 +107,13 @@ static int sch_transaction(struct i2c_adapter *adap) } =20 /* start the transaction by setting bit 4 */ - outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT); + temp =3D sch_io_rd8(sch_smba, SMBHSTCNT); + temp |=3D 0x10; + sch_io_wr8(sch_smba, SMBHSTCNT, temp); =20 do { usleep_range(100, 200); - temp =3D inb(SMBHSTSTS) & 0x0f; + temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); =20 /* If the SMBus is still busy, we give up */ @@ -105,8 +129,8 @@ static int sch_transaction(struct i2c_adapter *adap) dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); - outb(temp, SMBHSTSTS); - temp =3D inb(SMBHSTSTS) & 0x07; + sch_io_wr8(sch_smba, SMBHSTSTS, temp); + temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ dev_dbg(&adap->dev, @@ -117,9 +141,9 @@ static int sch_transaction(struct i2c_adapter *adap) dev_dbg(&adap->dev, "No such address.\n"); } dev_dbg(&adap->dev, "Transaction (post): CNT=3D%02x, CMD=3D%02x, ADD=3D%0= 2x, DAT0=3D%02x, DAT1=3D%02x\n", - inb(SMBHSTCNT), - inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), - inb(SMBHSTDAT1)); + sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), + sch_io_rd8(sch_smba, SMBHSTADD), + sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); return result; } =20 @@ -137,12 +161,12 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, int i, len, temp, rc; =20 /* Make sure the SMBus host is not busy */ - temp =3D inb(SMBHSTSTS) & 0x0f; + temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; if (temp & 0x08) { dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); return -EAGAIN; } - temp =3D inw(SMBHSTCLK); + temp =3D sch_io_rd16(sch_smba, SMBHSTCLK); if (!temp) { /* * We can't determine if we have 33 or 25 MHz clock for @@ -151,47 +175,47 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, * run ~75 kHz instead which should do no harm. */ dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"= ); - outw(backbone_speed / (4 * 100), SMBHSTCLK); + sch_io_wr16(sch_smba, SMBHSTCLK, backbone_speed / (4 * 100)); } =20 dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_wri= te)); switch (size) { case I2C_SMBUS_QUICK: - outb((addr << 1) | read_write, SMBHSTADD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); size =3D SCH_QUICK; break; case I2C_SMBUS_BYTE: - outb((addr << 1) | read_write, SMBHSTADD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); if (read_write =3D=3D I2C_SMBUS_WRITE) - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTCMD, command); size =3D SCH_BYTE; break; case I2C_SMBUS_BYTE_DATA: - outb((addr << 1) | read_write, SMBHSTADD); - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(sch_smba, SMBHSTCMD, command); if (read_write =3D=3D I2C_SMBUS_WRITE) - outb(data->byte, SMBHSTDAT0); + sch_io_wr8(sch_smba, SMBHSTDAT0, data->byte); size =3D SCH_BYTE_DATA; break; case I2C_SMBUS_WORD_DATA: - outb((addr << 1) | read_write, SMBHSTADD); - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(sch_smba, SMBHSTCMD, command); if (read_write =3D=3D I2C_SMBUS_WRITE) { - outb(data->word & 0xff, SMBHSTDAT0); - outb((data->word & 0xff00) >> 8, SMBHSTDAT1); + sch_io_wr8(sch_smba, SMBHSTDAT0, data->word >> 0); + sch_io_wr8(sch_smba, SMBHSTDAT1, data->word >> 8); } size =3D SCH_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: - outb((addr << 1) | read_write, SMBHSTADD); - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(sch_smba, SMBHSTCMD, command); if (read_write =3D=3D I2C_SMBUS_WRITE) { len =3D data->block[0]; if (len =3D=3D 0 || len > I2C_SMBUS_BLOCK_MAX) return -EINVAL; - outb(len, SMBHSTDAT0); + sch_io_wr8(sch_smba, SMBHSTDAT0, len); for (i =3D 1; i <=3D len; i++) - outb(data->block[i], SMBBLKDAT+i-1); + sch_io_wr8(sch_smba, SMBBLKDAT + i - 1, data->block[i]); } size =3D SCH_BLOCK_DATA; break; @@ -200,7 +224,10 @@ static s32 sch_access(struct i2c_adapter *adap, u16 ad= dr, return -EOPNOTSUPP; } dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); - outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT); + + temp =3D sch_io_rd8(sch_smba, SMBHSTCNT); + temp =3D (temp & 0xb0) | (size & 0x7); + sch_io_wr8(sch_smba, SMBHSTCNT, temp); =20 rc =3D sch_transaction(adap); if (rc) /* Error in transaction */ @@ -212,17 +239,18 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, switch (size) { case SCH_BYTE: case SCH_BYTE_DATA: - data->byte =3D inb(SMBHSTDAT0); + data->byte =3D sch_io_rd8(sch_smba, SMBHSTDAT0); break; case SCH_WORD_DATA: - data->word =3D inb(SMBHSTDAT0) + (inb(SMBHSTDAT1) << 8); + data->word =3D (sch_io_rd8(sch_smba, SMBHSTDAT0) << 0) + + (sch_io_rd8(sch_smba, SMBHSTDAT1) << 8); break; case SCH_BLOCK_DATA: - data->block[0] =3D inb(SMBHSTDAT0); + data->block[0] =3D sch_io_rd8(sch_smba, SMBHSTDAT0); if (data->block[0] =3D=3D 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX) return -EPROTO; for (i =3D 1; i <=3D data->block[0]; i++) - data->block[i] =3D inb(SMBBLKDAT+i-1); + data->block[i] =3D sch_io_rd8(sch_smba, SMBBLKDAT + i - 1); break; } return 0; @@ -255,26 +283,21 @@ static int smbus_sch_probe(struct platform_device *de= v) if (!res) return -EBUSY; =20 - if (!devm_request_region(&dev->dev, res->start, resource_size(res), - dev->name)) { - dev_err(&dev->dev, "SMBus region 0x%x already in use!\n", - sch_smba); + sch_smba =3D devm_ioport_map(&dev->dev, res->start, resource_size(res)); + if (!sch_smba) { + dev_err(&dev->dev, "SMBus region %pR already in use!\n", res); return -EBUSY; } =20 - sch_smba =3D res->start; - - dev_dbg(&dev->dev, "SMBA =3D 0x%X\n", sch_smba); - /* set up the sysfs linkage to our parent device */ sch_adapter.dev.parent =3D &dev->dev; =20 snprintf(sch_adapter.name, sizeof(sch_adapter.name), - "SMBus SCH adapter at %04x", sch_smba); + "SMBus SCH adapter at %04x", res->start); =20 retval =3D i2c_add_adapter(&sch_adapter); if (retval) - sch_smba =3D 0; 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d="scan'208";a="72388564" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 7FE324C7; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 05/12] i2c: isch: Use custom private data structure Date: Wed, 11 Sep 2024 18:39:18 +0300 Message-ID: <20240911154820.2846187-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use custom private data structure instead of global variables. With that, remove not anymore true comment. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 145 ++++++++++++++++++---------------- 1 file changed, 75 insertions(+), 70 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 8d34d4398f9b..4ec6c0a66a96 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -9,16 +9,14 @@ =20 */ =20 -/* - Supports: - Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) - Note: we assume there can only be one device, with one SMBus interface. -*/ +/* Supports: Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) */ =20 #include #include #include +#include #include +#include #include #include #include @@ -46,31 +44,33 @@ #define SCH_WORD_DATA 0x03 #define SCH_BLOCK_DATA 0x05 =20 -static struct i2c_adapter sch_adapter; -static void __iomem *sch_smba; +struct sch_i2c { + struct i2c_adapter adapter; + void __iomem *smba; +}; =20 static int backbone_speed =3D 33000; /* backbone speed in kHz */ module_param(backbone_speed, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default =3D 3300= 0)"); =20 -static inline u8 sch_io_rd8(void __iomem *smba, unsigned int offset) +static inline u8 sch_io_rd8(struct sch_i2c *priv, unsigned int offset) { - return ioread8(smba + offset); + return ioread8(priv->smba + offset); } =20 -static inline void sch_io_wr8(void __iomem *smba, unsigned int offset, u8 = value) +static inline void sch_io_wr8(struct sch_i2c *priv, unsigned int offset, u= 8 value) { - iowrite8(value, smba + offset); + iowrite8(value, priv->smba + offset); } =20 -static inline u16 sch_io_rd16(void __iomem *smba, unsigned int offset) +static inline u16 sch_io_rd16(struct sch_i2c *priv, unsigned int offset) { - return ioread16(smba + offset); + return ioread16(priv->smba + offset); } =20 -static inline void sch_io_wr16(void __iomem *smba, unsigned int offset, u1= 6 value) +static inline void sch_io_wr16(struct sch_i2c *priv, unsigned int offset, = u16 value) { - iowrite16(value, smba + offset); + iowrite16(value, priv->smba + offset); } =20 /* @@ -80,26 +80,27 @@ static inline void sch_io_wr16(void __iomem *smba, unsi= gned int offset, u16 valu */ static int sch_transaction(struct i2c_adapter *adap) { + struct sch_i2c *priv =3D container_of(adap, struct sch_i2c, adapter); int temp; int result =3D 0; int retries =3D 0; =20 dev_dbg(&adap->dev, "Transaction (pre): CNT=3D%02x, CMD=3D%02x, ADD=3D%02x, DAT0=3D%02x, DAT= 1=3D%02x\n", - sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), - sch_io_rd8(sch_smba, SMBHSTADD), - sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); + sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), + sch_io_rd8(priv, SMBHSTADD), + sch_io_rd8(priv, SMBHSTDAT0), sch_io_rd8(priv, SMBHSTDAT1)); =20 /* Make sure the SMBus host is ready to start transmitting */ - temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp) { /* Can not be busy since we checked it in sch_access */ if (temp & 0x01) dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); if (temp & 0x06) dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); - sch_io_wr8(sch_smba, SMBHSTSTS, temp); - temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + sch_io_wr8(priv, SMBHSTSTS, temp); + temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp) { dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; @@ -107,13 +108,13 @@ static int sch_transaction(struct i2c_adapter *adap) } =20 /* start the transaction by setting bit 4 */ - temp =3D sch_io_rd8(sch_smba, SMBHSTCNT); + temp =3D sch_io_rd8(priv, SMBHSTCNT); temp |=3D 0x10; - sch_io_wr8(sch_smba, SMBHSTCNT, temp); + sch_io_wr8(priv, SMBHSTCNT, temp); =20 do { usleep_range(100, 200); - temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x0f; } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); =20 /* If the SMBus is still busy, we give up */ @@ -129,8 +130,8 @@ static int sch_transaction(struct i2c_adapter *adap) dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); - sch_io_wr8(sch_smba, SMBHSTSTS, temp); - temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x07; + sch_io_wr8(priv, SMBHSTSTS, temp); + temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ dev_dbg(&adap->dev, @@ -141,9 +142,9 @@ static int sch_transaction(struct i2c_adapter *adap) dev_dbg(&adap->dev, "No such address.\n"); } dev_dbg(&adap->dev, "Transaction (post): CNT=3D%02x, CMD=3D%02x, ADD=3D%0= 2x, DAT0=3D%02x, DAT1=3D%02x\n", - sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), - sch_io_rd8(sch_smba, SMBHSTADD), - sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); + sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), + sch_io_rd8(priv, SMBHSTADD), + sch_io_rd8(priv, SMBHSTDAT0), sch_io_rd8(priv, SMBHSTDAT1)); return result; } =20 @@ -158,15 +159,16 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data) { + struct sch_i2c *priv =3D container_of(adap, struct sch_i2c, adapter); int i, len, temp, rc; =20 /* Make sure the SMBus host is not busy */ - temp =3D sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp & 0x08) { dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); return -EAGAIN; } - temp =3D sch_io_rd16(sch_smba, SMBHSTCLK); + temp =3D sch_io_rd16(priv, SMBHSTCLK); if (!temp) { /* * We can't determine if we have 33 or 25 MHz clock for @@ -175,47 +177,47 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, * run ~75 kHz instead which should do no harm. */ dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"= ); - sch_io_wr16(sch_smba, SMBHSTCLK, backbone_speed / (4 * 100)); + sch_io_wr16(priv, SMBHSTCLK, backbone_speed / (4 * 100)); } =20 dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_wri= te)); switch (size) { case I2C_SMBUS_QUICK: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); size =3D SCH_QUICK; break; case I2C_SMBUS_BYTE: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); if (read_write =3D=3D I2C_SMBUS_WRITE) - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTCMD, command); size =3D SCH_BYTE; break; case I2C_SMBUS_BYTE_DATA: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTCMD, command); if (read_write =3D=3D I2C_SMBUS_WRITE) - sch_io_wr8(sch_smba, SMBHSTDAT0, data->byte); + sch_io_wr8(priv, SMBHSTDAT0, data->byte); size =3D SCH_BYTE_DATA; break; case I2C_SMBUS_WORD_DATA: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTCMD, command); if (read_write =3D=3D I2C_SMBUS_WRITE) { - sch_io_wr8(sch_smba, SMBHSTDAT0, data->word >> 0); - sch_io_wr8(sch_smba, SMBHSTDAT1, data->word >> 8); + sch_io_wr8(priv, SMBHSTDAT0, data->word >> 0); + sch_io_wr8(priv, SMBHSTDAT1, data->word >> 8); } size =3D SCH_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTCMD, command); if (read_write =3D=3D I2C_SMBUS_WRITE) { len =3D data->block[0]; if (len =3D=3D 0 || len > I2C_SMBUS_BLOCK_MAX) return -EINVAL; - sch_io_wr8(sch_smba, SMBHSTDAT0, len); + sch_io_wr8(priv, SMBHSTDAT0, len); for (i =3D 1; i <=3D len; i++) - sch_io_wr8(sch_smba, SMBBLKDAT + i - 1, data->block[i]); + sch_io_wr8(priv, SMBBLKDAT + i - 1, data->block[i]); } size =3D SCH_BLOCK_DATA; break; @@ -225,9 +227,9 @@ static s32 sch_access(struct i2c_adapter *adap, u16 add= r, } dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); =20 - temp =3D sch_io_rd8(sch_smba, SMBHSTCNT); + temp =3D sch_io_rd8(priv, SMBHSTCNT); temp =3D (temp & 0xb0) | (size & 0x7); - sch_io_wr8(sch_smba, SMBHSTCNT, temp); + sch_io_wr8(priv, SMBHSTCNT, temp); =20 rc =3D sch_transaction(adap); if (rc) /* Error in transaction */ @@ -239,18 +241,18 @@ static s32 sch_access(struct i2c_adapter *adap, u16 a= ddr, switch (size) { case SCH_BYTE: case SCH_BYTE_DATA: - data->byte =3D sch_io_rd8(sch_smba, SMBHSTDAT0); + data->byte =3D sch_io_rd8(priv, SMBHSTDAT0); break; case SCH_WORD_DATA: - data->word =3D (sch_io_rd8(sch_smba, SMBHSTDAT0) << 0) + - (sch_io_rd8(sch_smba, SMBHSTDAT1) << 8); + data->word =3D (sch_io_rd8(priv, SMBHSTDAT0) << 0) + + (sch_io_rd8(priv, SMBHSTDAT1) << 8); break; case SCH_BLOCK_DATA: - data->block[0] =3D sch_io_rd8(sch_smba, SMBHSTDAT0); + data->block[0] =3D sch_io_rd8(priv, SMBHSTDAT0); if (data->block[0] =3D=3D 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX) return -EPROTO; for (i =3D 1; i <=3D data->block[0]; i++) - data->block[i] =3D sch_io_rd8(sch_smba, SMBBLKDAT + i - 1); + data->block[i] =3D sch_io_rd8(priv, SMBBLKDAT + i - 1); break; } return 0; @@ -268,46 +270,49 @@ static const struct i2c_algorithm smbus_algorithm =3D= { .functionality =3D sch_func, }; =20 -static struct i2c_adapter sch_adapter =3D { - .owner =3D THIS_MODULE, - .class =3D I2C_CLASS_HWMON, - .algo =3D &smbus_algorithm, -}; - static int smbus_sch_probe(struct platform_device *dev) { + struct sch_i2c *priv; struct resource *res; int retval; =20 + priv =3D devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + res =3D platform_get_resource(dev, IORESOURCE_IO, 0); if (!res) return -EBUSY; =20 - sch_smba =3D devm_ioport_map(&dev->dev, res->start, resource_size(res)); - if (!sch_smba) { + priv->smba =3D devm_ioport_map(&dev->dev, res->start, resource_size(res)); + if (!priv->smba) { dev_err(&dev->dev, "SMBus region %pR already in use!\n", res); return -EBUSY; } =20 /* set up the sysfs linkage to our parent device */ - sch_adapter.dev.parent =3D &dev->dev; + priv->adapter.dev.parent =3D &dev->dev; + priv->adapter.owner =3D THIS_MODULE, + priv->adapter.class =3D I2C_CLASS_HWMON, + priv->adapter.algo =3D &smbus_algorithm, =20 - snprintf(sch_adapter.name, sizeof(sch_adapter.name), + snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus SCH adapter at %04x", res->start); =20 - retval =3D i2c_add_adapter(&sch_adapter); + retval =3D i2c_add_adapter(&priv->adapter); if (retval) - sch_smba =3D NULL; + return retval; =20 - return retval; + platform_set_drvdata(dev, priv); + + return 0; } =20 static void smbus_sch_remove(struct platform_device *pdev) { - if (sch_smba) { - i2c_del_adapter(&sch_adapter); - sch_smba =3D NULL; - } + struct sch_i2c *priv =3D platform_get_drvdata(pdev); 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11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 85D3449D; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 06/12] i2c: isch: switch i2c registration to devm functions Date: Wed, 11 Sep 2024 18:39:19 +0300 Message-ID: <20240911154820.2846187-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Switch from i2c_add_adapter() to resource managed devm_i2c_add_adapter() for matching rest of driver initialization, and more concise code. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 4ec6c0a66a96..679fe3049299 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -274,7 +274,6 @@ static int smbus_sch_probe(struct platform_device *dev) { struct sch_i2c *priv; struct resource *res; - int retval; =20 priv =3D devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -299,20 +298,7 @@ static int smbus_sch_probe(struct platform_device *dev) snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus SCH adapter at %04x", res->start); =20 - retval =3D i2c_add_adapter(&priv->adapter); - if (retval) - return retval; - - platform_set_drvdata(dev, priv); - - return 0; -} - -static void smbus_sch_remove(struct platform_device *pdev) -{ - struct sch_i2c *priv =3D platform_get_drvdata(pdev); - - i2c_del_adapter(&priv->adapter); + return devm_i2c_add_adapter(&dev->dev, &priv->adapter); } =20 static struct platform_driver smbus_sch_driver =3D { @@ -320,7 +306,6 @@ static struct platform_driver smbus_sch_driver =3D { .name =3D "isch_smbus", }, .probe =3D smbus_sch_probe, - .remove_new =3D smbus_sch_remove, }; =20 module_platform_driver(smbus_sch_driver); --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C948C1AE84D; Wed, 11 Sep 2024 15:48:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069712; cv=none; b=nLlfLRQiLJqazjQ0CFclRyz68Msl8eGjzH2okpCLsZhoHqS+ZBfpCXo2st3VTju9+jzQBVzInPK8T6Kkxo8HYVVt3PlrRYI/Mu4XEAYjGCy1kTs4D8nBhZPSSNb0dhX/0rLgWJxO8KE3KnUap6JDOqeNcUroeIzYTcUutdpJ0Sc= ARC-Message-Signature: i=1; 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d="scan'208";a="72388562" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9987C580; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 07/12] i2c: isch: Utilize temporary variable to hold device pointer Date: Wed, 11 Sep 2024 18:39:20 +0300 Message-ID: <20240911154820.2846187-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a temporary variable to hold a device pointer. It can be utilized in the ->probe() and save a bit of LoCs. To make it consistent, rename currently used dev to pdev. While at it, convert the only error message to dev_err_probe(). Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 679fe3049299..bbcfa3218a81 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -270,27 +270,26 @@ static const struct i2c_algorithm smbus_algorithm =3D= { .functionality =3D sch_func, }; =20 -static int smbus_sch_probe(struct platform_device *dev) +static int smbus_sch_probe(struct platform_device *pdev) { + struct device *dev =3D &pdev->dev; struct sch_i2c *priv; struct resource *res; =20 - priv =3D devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; =20 - res =3D platform_get_resource(dev, IORESOURCE_IO, 0); + res =3D platform_get_resource(pdev, IORESOURCE_IO, 0); if (!res) return -EBUSY; =20 - priv->smba =3D devm_ioport_map(&dev->dev, res->start, resource_size(res)); - if (!priv->smba) { - dev_err(&dev->dev, "SMBus region %pR already in use!\n", res); - return -EBUSY; - } + priv->smba =3D devm_ioport_map(dev, res->start, resource_size(res)); + if (!priv->smba) + return dev_err_probe(dev, -EBUSY, "SMBus region %pR already in use!\n", = res); =20 /* set up the sysfs linkage to our parent device */ - priv->adapter.dev.parent =3D &dev->dev; + priv->adapter.dev.parent =3D dev; priv->adapter.owner =3D THIS_MODULE, priv->adapter.class =3D I2C_CLASS_HWMON, priv->adapter.algo =3D &smbus_algorithm, @@ -298,7 +297,7 @@ static int smbus_sch_probe(struct platform_device *dev) snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus SCH adapter at %04x", res->start); =20 - return devm_i2c_add_adapter(&dev->dev, &priv->adapter); + return devm_i2c_add_adapter(dev, &priv->adapter); } =20 static struct platform_driver smbus_sch_driver =3D { --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEF271AE872; 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X-CSE-ConnectionGUID: ltDU6JOaTDiApxHQ+rp+/w== X-CSE-MsgGUID: 33ORBX76T1WwrBgSGAxepQ== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701852" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701852" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:26 -0700 X-CSE-ConnectionGUID: 3ucPdmHlTyiXxveHpE2h9Q== X-CSE-MsgGUID: uMHDS7ACTBK1MUN/mBYmdQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="72388565" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9F30C575; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 08/12] i2c: isch: Use read_poll_timeout() Date: Wed, 11 Sep 2024 18:39:21 +0300 Message-ID: <20240911154820.2846187-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Simplify the code by using read_poll_timeout(). Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index bbcfa3218a81..3a8cf7efb592 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -17,9 +17,9 @@ #include #include #include -#include #include -#include +#include +#include #include #include #include @@ -34,9 +34,6 @@ #define SMBHSTDAT1 0x07 #define SMBBLKDAT 0x20 =20 -/* Other settings */ -#define MAX_RETRIES 5000 - /* I2C constants */ #define SCH_QUICK 0x00 #define SCH_BYTE 0x01 @@ -83,7 +80,6 @@ static int sch_transaction(struct i2c_adapter *adap) struct sch_i2c *priv =3D container_of(adap, struct sch_i2c, adapter); int temp; int result =3D 0; - int retries =3D 0; =20 dev_dbg(&adap->dev, "Transaction (pre): CNT=3D%02x, CMD=3D%02x, ADD=3D%02x, DAT0=3D%02x, DAT= 1=3D%02x\n", @@ -112,15 +108,11 @@ static int sch_transaction(struct i2c_adapter *adap) temp |=3D 0x10; sch_io_wr8(priv, SMBHSTCNT, temp); =20 - do { - usleep_range(100, 200); - temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x0f; - } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); - + result =3D read_poll_timeout(sch_io_rd8, temp, !(temp & 0x08), 200, 50000= 0, true, + priv, SMBHSTSTS); /* If the SMBus is still busy, we give up */ - if (retries > MAX_RETRIES) { + if (result) { dev_err(&adap->dev, "SMBus Timeout!\n"); - result =3D -ETIMEDOUT; } else if (temp & 0x04) { result =3D -EIO; dev_dbg(&adap->dev, "Bus collision! SMBus may be locked until next hard = reset. (sorry!)\n"); @@ -130,7 +122,7 @@ static int sch_transaction(struct i2c_adapter *adap) dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); - sch_io_wr8(priv, SMBHSTSTS, temp); + sch_io_wr8(priv, SMBHSTSTS, temp & 0x0f); temp =3D sch_io_rd8(priv, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F1A21AE87D; Wed, 11 Sep 2024 15:48:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069713; cv=none; b=toWauFBy4dTJYORG0BpCt7fnmspGDlchcZiz0UUNQ1OF6mwKF8XFezbMsQ4HPHzhJIV6vNQwb8NSNBNppcgs3CSfsn8CD/eLaY34Pvv1WEUT87RV2U+GJlv9/WcOuOyBAApC4Iq+pnivBbHDYGGGfkBCK6/ovfGk1YU/ChqWN10= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069713; c=relaxed/simple; bh=isi+04wbl8vH0mvOh/b/CSiA5S3TK2K3TxOhAVvzGfE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=u08dMMY406mPb9rXK8KaaoD+JJ+8HxC5BuJOHVaM06bkpJ1CwrSeNaCNi9uAyKW7Djo03rma+ZwxduyF1oLvTUBsGSufw/vnRaAJGn39CYtYAZRYMGtJAmZFCAQSOQ09QJOY8mE6ZjpvQqLLR94fFpSACkfVBJPP+5GqwV+x2CE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Stl3OhyW; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Stl3OhyW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069712; x=1757605712; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=isi+04wbl8vH0mvOh/b/CSiA5S3TK2K3TxOhAVvzGfE=; b=Stl3OhyWdUmyYvs/ZgtXhnbZdhAMbZh3FFPbkivBMLoVt/bq06TlCxP4 5JzeDaIOw08VFJ9YxAhHLOAXj6HHokKpF4JKg4kNYqUjVbyd8W8nk8uEp pTSSy0K8JBFhBxLw6+SK9XXMrymMFKCAVu38flqL4p17jCNEipEandXwC TF/i+FyiJnmeW0JHd9HUdkisf/Rq5YH1EgQe5mNSGqTMBPgm40uDkLAEV B2wSeInvfT8ePkv3I0Dg2b0E3y3KGfCtzlaqtTYjPIUwhtaEHV3LwzT1p iw0JMZlaxWl9BVV4ExHiqABY3vQW432lq42RzDYuChmzzQT1SXe+Yw2K9 w==; X-CSE-ConnectionGUID: Ty8TfGYPTzm1qVIKzo599g== X-CSE-MsgGUID: g0g9qWYkTUaJToRunQ7BIA== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701843" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701843" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:26 -0700 X-CSE-ConnectionGUID: jy1tDTlASMmK7lfLgc+VLg== X-CSE-MsgGUID: mj57lbU3RYO9smA72hPDAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="72388566" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B1569598; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 09/12] i2c: isch: Unify the name of the variable to hold an error code Date: Wed, 11 Sep 2024 18:39:22 +0300 Message-ID: <20240911154820.2846187-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There are two different names used for the variable that holds an error code. Unify to use one variant in all cases. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 3a8cf7efb592..bb5e09feea61 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -79,7 +79,7 @@ static int sch_transaction(struct i2c_adapter *adap) { struct sch_i2c *priv =3D container_of(adap, struct sch_i2c, adapter); int temp; - int result =3D 0; + int rc; =20 dev_dbg(&adap->dev, "Transaction (pre): CNT=3D%02x, CMD=3D%02x, ADD=3D%02x, DAT0=3D%02x, DAT= 1=3D%02x\n", @@ -108,17 +108,16 @@ static int sch_transaction(struct i2c_adapter *adap) temp |=3D 0x10; sch_io_wr8(priv, SMBHSTCNT, temp); =20 - result =3D read_poll_timeout(sch_io_rd8, temp, !(temp & 0x08), 200, 50000= 0, true, - priv, SMBHSTSTS); + rc =3D read_poll_timeout(sch_io_rd8, temp, !(temp & 0x08), 200, 500000, t= rue, priv, SMBHSTSTS); /* If the SMBus is still busy, we give up */ - if (result) { + if (rc) { dev_err(&adap->dev, "SMBus Timeout!\n"); } else if (temp & 0x04) { - result =3D -EIO; + rc =3D -EIO; dev_dbg(&adap->dev, "Bus collision! SMBus may be locked until next hard = reset. (sorry!)\n"); /* Clock stops and target is stuck in mid-transmission */ } else if (temp & 0x02) { - result =3D -EIO; + rc =3D -EIO; dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); @@ -130,14 +129,14 @@ static int sch_transaction(struct i2c_adapter *adap) "Failed reset at end of transaction (%02x), Bus error!\n", temp); } } else { - result =3D -ENXIO; + rc =3D -ENXIO; dev_dbg(&adap->dev, "No such address.\n"); } dev_dbg(&adap->dev, "Transaction (post): CNT=3D%02x, CMD=3D%02x, ADD=3D%0= 2x, DAT0=3D%02x, DAT1=3D%02x\n", sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), sch_io_rd8(priv, SMBHSTADD), sch_io_rd8(priv, SMBHSTDAT0), sch_io_rd8(priv, SMBHSTDAT1)); - return result; + return rc; } =20 /* --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3702B1B29DD; Wed, 11 Sep 2024 15:48:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069716; cv=none; b=FQMD85KTz/A6yukktG82P3ogjYqBwutxW/wJdphei782ixC6V9lZxb5fS75zyQC4YVd6SCevqeCSz2S4r3LzL+JwtRlj2ODYWhXUvLR5bpyuMhq6TvfW6T6HCbmvJf79KJ9CPdwKEx1vdRWUBZHZeAO8QCukfkG63rzla/x81Vw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069716; c=relaxed/simple; bh=SC6aPHjvdUPkLLyTAuTyV/dPbapcW7yTm63oCTE93ew=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cMNFhyRlQgJEgksZ8AX1Ug00+Ooz1w7h5sfH8sAYMHj8rxTt8j0rnW/ID5ZrLXUQ/cUEsiC3F6I1jBbLoWSXMdluQHRd/Fgr6T0yIN6iotNwUjtM79OILe1TKpH9Gh9x9ETsNmSmPsRzhVscwKIlxboV7MvaWspgQCze0DQcWSU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fEup0Q8q; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fEup0Q8q" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069715; x=1757605715; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SC6aPHjvdUPkLLyTAuTyV/dPbapcW7yTm63oCTE93ew=; b=fEup0Q8qwXeQk4yLLKWf5dWfDKMjRhGXX4hAEzQOzPm8pnz5xOTnIpUY 93hJJmJwZiEH68L36PFm2idExPgoojI7dfNWInZGiCpOd8qWn5fQq280i KIU39bcKN8Qv/epnsoDUNjeRBXnz1tGYxysyIoR6UY4M0ajQJVQyblobE WM2/kg+M9zlrr6PVE++4XZjeHJCo9jQmbp0+gkz5jyr0e0Rx6GRHuZDY1 6aY7sN3RxOsy/Su7r9NPD6Myw1t7mlT+UNTND+IP3zisCQlmRq+oJONg2 lUySemj/ccuSV3OXy0DVpsjmZC1Xovfj96RR3/HuquyNvPAC79eplWPHN g==; X-CSE-ConnectionGUID: AiIrEIChRGWUn8yAv+oOYw== X-CSE-MsgGUID: J36VlOVRRlCNCdU3s1IdDw== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701858" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701858" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:27 -0700 X-CSE-ConnectionGUID: bpd5qyd/RKOi50ZucUOrxw== X-CSE-MsgGUID: 1iLSTESwSo+G3VLYqm9h+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="72388568" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B67D6593; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 10/12] i2c: isch: Don't use "proxy" headers Date: Wed, 11 Sep 2024 18:39:23 +0300 Message-ID: <20240911154820.2846187-11-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update header inclusions to follow IWYU (Include What You Use) principle. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index bb5e09feea61..8fa48a346e12 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -11,15 +11,17 @@ =20 /* Supports: Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) */ =20 -#include -#include -#include #include #include #include +#include +#include #include #include #include +#include +#include +#include #include #include #include --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 629F91B2EEE; Wed, 11 Sep 2024 15:48:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069716; cv=none; b=Oj1NlgMp63dhXunm7rQVq5x2Xe1bOY9jCh3/dy8tUGy0qXd9uk2GneheuY5DP8GcSpeG/CbD+q6faxMywfDrfGWTuBj5olE57V4x2tjMzxHUYA6bRMHHkxf3dnLYHvVX0o5SuKtKwRkzLM6onZs9xreT+4wl3AvZX8SmUcct6BU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069716; c=relaxed/simple; bh=Z85dlwjxQ5jyCTFky2Fj1VuG9sUGBr/josCRaT4zpz0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UWUhTjULZ9o7RwPotcyK6syDaDu9BogBln/WcsIH8cksvju5DLUGF67kP2wwVy8Wa+EsdPnCLPE6zf3TzBF+mgcyF/MiwERbD4WDSs4VKCQ+/J978CsymoNoeZqZhXqItxplwCIHlnYKS/gncMd30PzQ+3FKlXPBUfxa5KU8RbI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hQmqwlZu; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hQmqwlZu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069715; x=1757605715; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z85dlwjxQ5jyCTFky2Fj1VuG9sUGBr/josCRaT4zpz0=; b=hQmqwlZuHE/Hl3kVh97ENxj0h+DJU6uOBgxuQuCvDeacHw9Bz1eAOdTN geqWsXcWw75XiWPW8/DuSlPKBsQSlbxwhdK9TOfJE4aHotliOlXo91tps Qqk+Ga4z1yCgi1dFe4WQGIsQBCDWeuYe2cHpsnmX1K9KXtHPMv2V6ifNU 2wwRPLMGmD0/ILxU0E3KBxw5sNk74wAY/SyAy7iUucz8ORgFeDogn7SFl JOl5Cz2yFNGE6+Nkp+0SVsO1LU1KhydbjOKLuGs3d4OfpUFYXy3fHaL+0 LLICTgsssIcH1xvlHDg3FKuiUpPSMp9TDbvw74LVEEw5ofwL6oEF7meP/ g==; X-CSE-ConnectionGUID: GYd2dIk9RI+oVBzAaFAagA== X-CSE-MsgGUID: IZUJiaTeSHqQUWB0Esabcw== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701861" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701861" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:27 -0700 X-CSE-ConnectionGUID: MuNGJxScSp6I5jGOi5gsBA== X-CSE-MsgGUID: l2rauxjeQZCPelNupG0eKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="72388569" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id BF6C65BF; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 11/12] i2c: isch: Prefer to use octal permission Date: Wed, 11 Sep 2024 18:39:24 +0300 Message-ID: <20240911154820.2846187-12-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Octal permissions are preferred over the symbolics ones for readbility. This ceases warning message pointed by checkpatch. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 8fa48a346e12..a6aa28000568 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -49,7 +49,7 @@ struct sch_i2c { }; =20 static int backbone_speed =3D 33000; /* backbone speed in kHz */ -module_param(backbone_speed, int, S_IRUSR | S_IWUSR); +module_param(backbone_speed, int, 0600); MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default =3D 3300= 0)"); =20 static inline u8 sch_io_rd8(struct sch_i2c *priv, unsigned int offset) --=20 2.43.0.rc1.1336.g36b5255a03ac From nobody Sat Nov 30 03:31:08 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C49A01B29A9; Wed, 11 Sep 2024 15:48:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069716; cv=none; b=F9C1hHX4vJGgy2u9fStdzNJ4HlsTg5u07xQV7dCHVqvMF4VZbaMkaYNlLZtZVVBqDgru0LuJiSoH8WTd0Wywhec0PJG6iLQEfF2Y7I5bbqYwEIW4FYGddHbOybWmi9IL7eC7+9Wiwrkdvn1p3DKRJjM1YWw8o7FI0OSU5dQIKBk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726069716; c=relaxed/simple; bh=fbOdtbUqLO2b0hGOuyDJ1swIlNsS7eQ2jI47dwBgPCI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qOWoQZkmdY1CRx3mN7lIBA7tlWAASDEXlENRFVJ45nqJXujCGj5khzBiFLsKy+iBznEotHhIeG8wcFCN6VB//hfXkFx4NpasUu2PCYnBlLlC8RfH3SMTeyZuy0IY10m3z+zwsiL2SBDiMa0pYZeVfkbwtquTbS5QLkJhbgMomYs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hi5ZLoAP; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hi5ZLoAP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726069715; x=1757605715; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fbOdtbUqLO2b0hGOuyDJ1swIlNsS7eQ2jI47dwBgPCI=; b=hi5ZLoAPWaz9mqS5BqnvXG1oekuukG+db9jd6CFezPhGzPhlrTq9fbT0 QUWAUWckfabwXQX/x6ZttY9V5AMkKNnP8QPYAOoCguRzgWaLg47lMcpdB h1p393TfMLH20xqhjIWzD0lbxoghMKcmA/YeZr6DsRl03hsl12NVQTu6i DMT+qpy4weaY0ExkO0Foxh4SQUUrzK+zDnlg3qSnY9K8XNmkQ9Tg7t3L0 h3e0HuHXdqoWmHk/Us6HWoh8hQHHvppJu2oHyP3emQzNZ/xwh3VfBD3Ub K1rnS5Ei81FEaI/vg7YBjEmZVP0avFeCSg/bRwsao//1JBoM/SnKu7xOC w==; X-CSE-ConnectionGUID: 75C/QMv0QnuyFt3Nq1OGsg== X-CSE-MsgGUID: l7abm2CbQ4mlYg3MMmN38g== X-IronPort-AV: E=McAfee;i="6700,10204,11192"; a="24701857" X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="24701857" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 08:48:27 -0700 X-CSE-ConnectionGUID: bDvppkeiT4y2th4H5Ah6YA== X-CSE-MsgGUID: bbEbQH2lRPykFhZT8IUIAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,220,1719903600"; d="scan'208";a="72388567" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP; 11 Sep 2024 08:48:25 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id D1D895D7; Wed, 11 Sep 2024 18:48:21 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andi Shyti Subject: [PATCH v1 12/12] i2c: isch: Convert to kernel-doc Date: Wed, 11 Sep 2024 18:39:25 +0300 Message-ID: <20240911154820.2846187-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> References: <20240911154820.2846187-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert existing descriptions to kernel-doc format and unify the rest of the comments to follow the modern style. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 48 ++++++++++++++++++++--------------- 1 file changed, 28 insertions(+), 20 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index a6aa28000568..333312a50deb 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -1,13 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* - i2c-isch.c - Linux kernel driver for Intel SCH chipset SMBus - - Based on i2c-piix4.c - Copyright (c) 1998 - 2002 Frodo Looijaard and - Philip Edelbrock - - Intel SCH support - Copyright (c) 2007 - 2008 Jacob Jun Pan - -*/ + * Linux kernel driver for Intel SCH chipset SMBus + * - Based on i2c-piix4.c + * Copyright (c) 1998 - 2002 Frodo Looijaard and + * Philip Edelbrock + * - Intel SCH support + * Copyright (c) 2007 - 2008 Jacob Jun Pan + */ =20 /* Supports: Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) */ =20 @@ -72,10 +71,14 @@ static inline void sch_io_wr16(struct sch_i2c *priv, un= signed int offset, u16 va iowrite16(value, priv->smba + offset); } =20 -/* - * Start the i2c transaction -- the i2c_access will prepare the transaction - * and this function will execute it. - * return 0 for success and others for failure. +/** + * sch_transaction - Start the i2c transaction + * @adap: the i2c adapter pointer + * + * The sch_access() will prepare the transaction and + * this function will execute it. + * + * Return: 0 for success and others for failure. */ static int sch_transaction(struct i2c_adapter *adap) { @@ -105,7 +108,7 @@ static int sch_transaction(struct i2c_adapter *adap) } } =20 - /* start the transaction by setting bit 4 */ + /* Start the transaction by setting bit 4 */ temp =3D sch_io_rd8(priv, SMBHSTCNT); temp |=3D 0x10; sch_io_wr8(priv, SMBHSTCNT, temp); @@ -141,12 +144,17 @@ static int sch_transaction(struct i2c_adapter *adap) return rc; } =20 -/* - * This is the main access entry for i2c-sch access - * adap is i2c_adapter pointer, addr is the i2c device bus address, read_w= rite - * (0 for read and 1 for write), size is i2c transaction type and data is = the - * union of transaction for data to be transferred or data read from bus. - * return 0 for success and others for failure. +/** + * sch_access - the main access entry for i2c-sch access + * @adap: the i2c adapter pointer + * @addr: the i2c device bus address + * @flags: I2C_CLIENT_* flags (usually zero or I2C_CLIENT_PEC) + * @read_write: 0 for read and 1 for write + * @command: Byte interpreted by slave, for protocols which use such bytes + * @size: the i2c transaction type + * @data: the union of transaction for data to be transferred or data read= from bus + * + * Return: 0 for success and others for failure. */ static s32 sch_access(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, @@ -281,7 +289,7 @@ static int smbus_sch_probe(struct platform_device *pdev) if (!priv->smba) return dev_err_probe(dev, -EBUSY, "SMBus region %pR already in use!\n", = res); =20 - /* set up the sysfs linkage to our parent device */ + /* Set up the sysfs linkage to our parent device */ priv->adapter.dev.parent =3D dev; priv->adapter.owner =3D THIS_MODULE, priv->adapter.class =3D I2C_CLASS_HWMON, --=20 2.43.0.rc1.1336.g36b5255a03ac