From nobody Mon Feb 9 16:17:57 2026 Received: from smtp-fw-80007.amazon.com (smtp-fw-80007.amazon.com [99.78.197.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D09D1A76C9 for ; Wed, 11 Sep 2024 14:37:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=99.78.197.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726065460; cv=none; b=IEU0W3saLRqR4j81TSJ1wbx9h/zBlErwXhVRDLSz+XCZscXOzGtcKTUCiqoJxV5Sd4vijwXVv9Gj8ZxpAXL0Zf6xdxh3uFHocy8FTJc3OcrtMqAT7cXOb9BtK7NiHanw8OFSuc2OdWG36Jwbx9jaiSk8xgHTvC5ZCj1h5nIgSnE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726065460; c=relaxed/simple; bh=Q/B5vpJYxuN6CqXDgq2jT5wdTrhKkZw6PP0jxEciucc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Do2NL7IBglwJ2CScoWHOP+Yo73bPeRMK5VCRrKjEtPvF9EYvFjy/lhZ7AQxH4h7esdrDROER03E9DyBuEyV78eB92p+jBSqgX6wLgWFHDkXN9soxJ6OVjece6+LX50DdwyFXmcWcjzpay9IMA213NIahQ33+bOke2YIK6OcAYpo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.de; spf=pass smtp.mailfrom=amazon.de; dkim=pass (1024-bit key) header.d=amazon.de header.i=@amazon.de header.b=tmWeFfmB; arc=none smtp.client-ip=99.78.197.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amazon.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amazon.de header.i=@amazon.de header.b="tmWeFfmB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.de; i=@amazon.de; q=dns/txt; s=amazon201209; t=1726065458; x=1757601458; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ttqjEP9NZOH/UBgVCbYLfsAknImtx66onLISyRd5NFM=; b=tmWeFfmBv6rY9UiSCQMfebPMwcgFBjqEW51h5ro2W50MS5T19rJmWpMq LbuNxdct8JX4YGvhU9hu+mSuY0otMVerq2wc4ERt90BxBihK79y62HRa4 +WnNs1UA0YlZZ3RR536/g1KeOa94wODlGAYJgkhTA9AkfjuRq3rzcgnmW s=; X-IronPort-AV: E=Sophos;i="6.10,220,1719878400"; d="scan'208";a="329956727" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-80007.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2024 14:37:36 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.10.100:3852] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.38.136:2525] with esmtp (Farcaster) id ac0f2d97-7ed9-430d-a2d7-58bab541e8ef; Wed, 11 Sep 2024 14:37:35 +0000 (UTC) X-Farcaster-Flow-ID: ac0f2d97-7ed9-430d-a2d7-58bab541e8ef Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUA001.ant.amazon.com (10.252.50.50) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Wed, 11 Sep 2024 14:37:33 +0000 Received: from EX19MTAUEC001.ant.amazon.com (10.252.135.222) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.35; Wed, 11 Sep 2024 14:37:33 +0000 Received: from dev-dsk-faresx-1b-27755bf1.eu-west-1.amazon.com (10.253.79.181) by mail-relay.amazon.com (10.252.135.200) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34 via Frontend Transport; Wed, 11 Sep 2024 14:37:30 +0000 From: Fares Mehanna To: CC: , Fares Mehanna , "Marc Zyngier" , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , "Will Deacon" , Andrew Morton , "Kemeng Shi" , =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= , Ard Biesheuvel , Mark Rutland , Javier Martinez Canillas , "Arnd Bergmann" , Fuad Tabba , Mark Brown , Joey Gouly , Kristina Martsenko , Randy Dunlap , "Bjorn Helgaas" , Jean-Philippe Brucker , "Mike Rapoport (IBM)" , "David Hildenbrand" , Roman Kagan , "moderated list:KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)" , "open list:KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)" , open list , "open list:MEMORY MANAGEMENT" Subject: [RFC PATCH 6/7] arm64: KVM: Refactor C-code to access vCPU fp-registers through macros Date: Wed, 11 Sep 2024 14:34:05 +0000 Message-ID: <20240911143421.85612-7-faresx@amazon.de> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240911143421.85612-1-faresx@amazon.de> References: <20240911143421.85612-1-faresx@amazon.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unify how KVM accesses vCPU fp-regs by using vcpu_fp_regs(). This is a prerequisite to move the fp-regs later to be dynamically allocated for vCPU= s. Signed-off-by: Fares Mehanna --- arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/kvm/arm.c | 2 +- arch/arm64/kvm/fpsimd.c | 2 +- arch/arm64/kvm/guest.c | 6 +++--- arch/arm64/kvm/hyp/include/hyp/switch.h | 4 ++-- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 4 ++-- arch/arm64/kvm/reset.c | 2 +- 7 files changed, 12 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm= _host.h index 23a10178d1b0..e8ed2c12479f 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -968,6 +968,8 @@ static __always_inline struct user_pt_regs *ctxt_gp_reg= s(const struct kvm_cpu_co return regs; } #define vcpu_gp_regs(v) (ctxt_gp_regs(&(v)->arch.ctxt)) +#define ctxt_fp_regs(ctxt) (&(ctxt).fp_regs) +#define vcpu_fp_regs(v) (ctxt_fp_regs(&(v)->arch.ctxt)) =20 /* * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 78c562a060de..7542af3f766a 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -2507,7 +2507,7 @@ static void finalize_init_hyp_mode(void) for_each_possible_cpu(cpu) { struct user_fpsimd_state *fpsimd_state; =20 - fpsimd_state =3D &per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)->host_ctxt.f= p_regs; + fpsimd_state =3D ctxt_fp_regs(&per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)= ->host_ctxt); per_cpu_ptr_nvhe_sym(kvm_host_data, cpu)->fpsimd_state =3D kern_hyp_va(fpsimd_state); } diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c index c53e5b14038d..c27c96ae22e1 100644 --- a/arch/arm64/kvm/fpsimd.c +++ b/arch/arm64/kvm/fpsimd.c @@ -130,7 +130,7 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) * Currently we do not support SME guests so SVCR is * always 0 and we just need a variable to point to. */ - fp_state.st =3D &vcpu->arch.ctxt.fp_regs; + fp_state.st =3D vcpu_fp_regs(vcpu); fp_state.sve_state =3D vcpu->arch.sve_state; fp_state.sve_vl =3D vcpu->arch.sve_max_vl; fp_state.sme_state =3D NULL; diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 821a2b7de388..3474874a00a7 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -170,13 +170,13 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, con= st struct kvm_one_reg *reg) KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]): off -=3D KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]); off /=3D 4; - return &vcpu->arch.ctxt.fp_regs.vregs[off]; + return &vcpu_fp_regs(vcpu)->vregs[off]; =20 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr): - return &vcpu->arch.ctxt.fp_regs.fpsr; + return &vcpu_fp_regs(vcpu)->fpsr; =20 case KVM_REG_ARM_CORE_REG(fp_regs.fpcr): - return &vcpu->arch.ctxt.fp_regs.fpcr; + return &vcpu_fp_regs(vcpu)->fpcr; =20 default: return NULL; diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/i= nclude/hyp/switch.h index d2ed0938fc90..1444bad519db 100644 --- a/arch/arm64/kvm/hyp/include/hyp/switch.h +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h @@ -319,7 +319,7 @@ static inline void __hyp_sve_restore_guest(struct kvm_v= cpu *vcpu) */ sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2); __sve_restore_state(vcpu_sve_pffr(vcpu), - &vcpu->arch.ctxt.fp_regs.fpsr, + &vcpu_fp_regs(vcpu)->fpsr, true); =20 /* @@ -401,7 +401,7 @@ static bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu= , u64 *exit_code) if (sve_guest) __hyp_sve_restore_guest(vcpu); else - __fpsimd_restore_state(&vcpu->arch.ctxt.fp_regs); + __fpsimd_restore_state(vcpu_fp_regs(vcpu)); =20 /* Skip restoring fpexc32 for AArch64 guests */ if (!(read_sysreg(hcr_el2) & HCR_RW)) diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/h= yp-main.c index f43d845f3c4e..feb1dd37f2a5 100644 --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c @@ -32,7 +32,7 @@ static void __hyp_sve_save_guest(struct kvm_vcpu *vcpu) * on the VL, so use a consistent (i.e., the maximum) guest VL. */ sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2); - __sve_save_state(vcpu_sve_pffr(vcpu), &vcpu->arch.ctxt.fp_regs.fpsr, true= ); + __sve_save_state(vcpu_sve_pffr(vcpu), &vcpu_fp_regs(vcpu)->fpsr, true); write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2); } =20 @@ -71,7 +71,7 @@ static void fpsimd_sve_sync(struct kvm_vcpu *vcpu) if (vcpu_has_sve(vcpu)) __hyp_sve_save_guest(vcpu); else - __fpsimd_save_state(&vcpu->arch.ctxt.fp_regs); + __fpsimd_save_state(vcpu_fp_regs(vcpu)); =20 if (system_supports_sve()) __hyp_sve_restore_host(); diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index 0b0ae5ae7bc2..5f38acf5d156 100644 --- a/arch/arm64/kvm/reset.c +++ b/arch/arm64/kvm/reset.c @@ -229,7 +229,7 @@ void kvm_reset_vcpu(struct kvm_vcpu *vcpu) =20 /* Reset core registers */ memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu))); - memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs)); + memset(vcpu_fp_regs(vcpu), 0, sizeof(*vcpu_fp_regs(vcpu))); vcpu->arch.ctxt.spsr_abt =3D 0; vcpu->arch.ctxt.spsr_und =3D 0; vcpu->arch.ctxt.spsr_irq =3D 0; --=20 2.40.1 Amazon Web Services Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 257764 B Sitz: Berlin Ust-ID: DE 365 538 597