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Signed-off-by: Hugues Fruchet --- .../userspace-api/media/v4l/ext-ctrls-codec-stateless.rst | 3 +++ include/uapi/linux/v4l2-controls.h | 1 + 2 files changed, 4 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateles= s.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst index 0da635691fdc..bb08aacddc9c 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst @@ -1062,6 +1062,9 @@ FWHT Flags * - ``V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT`` - 0x20 - Sign of motion vectors when the alt frame is referenced. + * - ``V4L2_VP8_FRAME_FLAG_WEBP`` + - 0x40 + - Indicates that this frame is a WebP picture. =20 .. c:type:: v4l2_vp8_entropy_coder_state =20 diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-c= ontrols.h index 974fd254e573..e41b62f2cb2b 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -1897,6 +1897,7 @@ struct v4l2_vp8_entropy_coder_state { #define V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF 0x08 #define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN 0x10 #define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT 0x20 +#define V4L2_VP8_FRAME_FLAG_WEBP 0x40 =20 #define V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) \ (!!((hdr)->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME)) --=20 2.25.1 From nobody Sat Nov 30 05:49:51 2024 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95EAD184559; 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charset="utf-8" Add WebP picture decoding support to VP8 stateless decoder. Signed-off-by: Hugues Fruchet --- drivers/media/platform/verisilicon/hantro_g1_regs.h | 1 + drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/drivers/media/platform/verisilicon/hantro_g1_regs.h b/drivers/= media/platform/verisilicon/hantro_g1_regs.h index c623b3b0be18..e7d4db788e57 100644 --- a/drivers/media/platform/verisilicon/hantro_g1_regs.h +++ b/drivers/media/platform/verisilicon/hantro_g1_regs.h @@ -232,6 +232,7 @@ #define G1_REG_DEC_CTRL7_DCT7_START_BIT(x) (((x) & 0x3f) << 0) #define G1_REG_ADDR_STR 0x030 #define G1_REG_ADDR_DST 0x034 +#define G1_REG_ADDR_DST_CHROMA 0x038 #define G1_REG_ADDR_REF(i) (0x038 + ((i) * 0x4)) #define G1_REG_ADDR_REF_FIELD_E BIT(1) #define G1_REG_ADDR_REF_TOPC_E BIT(0) diff --git a/drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c b/drive= rs/media/platform/verisilicon/hantro_g1_vp8_dec.c index 851eb67f19f5..c6a7584b716a 100644 --- a/drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c @@ -427,6 +427,11 @@ static void cfg_buffers(struct hantro_ctx *ctx, =20 dst_dma =3D hantro_get_dec_buf_addr(ctx, &vb2_dst->vb2_buf); vdpu_write_relaxed(vpu, dst_dma, G1_REG_ADDR_DST); + + if (hdr->flags & V4L2_VP8_FRAME_FLAG_WEBP) + vdpu_write_relaxed(vpu, dst_dma + + ctx->dst_fmt.height * ctx->dst_fmt.width, + G1_REG_ADDR_DST_CHROMA); } =20 int hantro_g1_vp8_dec_run(struct hantro_ctx *ctx) @@ -471,6 +476,8 @@ int hantro_g1_vp8_dec_run(struct hantro_ctx *ctx) reg |=3D G1_REG_DEC_CTRL0_SKIP_MODE; if (hdr->lf.level =3D=3D 0) reg |=3D G1_REG_DEC_CTRL0_FILTERING_DIS; + if (hdr->flags & V4L2_VP8_FRAME_FLAG_WEBP) + reg |=3D G1_REG_DEC_CTRL0_WEBP_E; vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL0); =20 /* Frame dimensions */ --=20 2.25.1