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[175.159.121.22]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-71909095177sm2530125b3a.112.2024.09.11.01.48.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 01:48:12 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Viresh Kumar , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: Konrad Dybcio , Ivaylo Ivanov , Nick Chan Subject: [PATCH 17/22] arm64: dts: apple: Add A9X devices Date: Wed, 11 Sep 2024 16:41:07 +0800 Message-ID: <20240911084353.28888-19-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240911084353.28888-2-towinchenmi@gmail.com> References: <20240911084353.28888-2-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Konrad Dybcio Add the device tree for the A9X SoC and the devices based on it: - iPad Pro (9.7 Inch) - iPad Pro (12.9 Inch) (1st generation) Signed-off-by: Konrad Dybcio [Nick: SMP and m1n1 support, uart interrupt and pinctrl fixes] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 4 + arch/arm64/boot/dts/apple/s8001-j127.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-j128.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-j98a.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-j99a.dts | 14 ++ arch/arm64/boot/dts/apple/s8001-pro.dtsi | 45 ++++++ arch/arm64/boot/dts/apple/s8001.dtsi | 167 +++++++++++++++++++++++ 7 files changed, 272 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/s8001-j127.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j128.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j98a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j99a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-pro.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index cbb7e409b7e3..f8cd10889d9f 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -28,6 +28,10 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-j72t.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n66m.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n69.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D s8003-n71m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j127.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j128.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j98a.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D s8001-j99a.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/s8001-j127.dts b/arch/arm64/boot/dts= /apple/s8001-j127.dts new file mode 100644 index 000000000000..8b522085cb3e --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j127.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (9.7-inch) (Wi-Fi), J127, iPad6,3 (A1673) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j127", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (9.7-inch) (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-j128.dts b/arch/arm64/boot/dts= /apple/s8001-j128.dts new file mode 100644 index 000000000000..cdd3d06dcbf1 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j128.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (9.7-inch) (Cellular), J128, iPad6,4 (A1674/A1675) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j128", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (9.7-inch) (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-j98a.dts b/arch/arm64/boot/dts= /apple/s8001-j98a.dts new file mode 100644 index 000000000000..6d6b841e7ab0 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j98a.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (12.9-inch) (Wi-Fi), J98a, iPad6,7 (A1584) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j98a", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (12.9-inch) (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-j99a.dts b/arch/arm64/boot/dts= /apple/s8001-j99a.dts new file mode 100644 index 000000000000..d20194b1cae7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-j99a.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (12.9-inch) (Cellular), J99a, iPad6,8 (A1652) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "s8001-pro.dtsi" + +/ { + compatible =3D "apple,j99a", "apple,s8001", "apple,arm-platform"; + model =3D "Apple iPad Pro (12.9-inch) (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001-pro.dtsi b/arch/arm64/boot/dts= /apple/s8001-pro.dtsi new file mode 100644 index 000000000000..3bd0e12d6196 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001-pro.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Pro (1st generation) common device tree + * + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "s8001.dtsi" +#include + +/ { + gpio-keys { + compatible =3D "gpio-keys"; + + button-home { + label =3D "Home Button"; + gpios =3D <&pinctrl_ap 122 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-power { + label =3D "Power Button"; + gpios =3D <&pinctrl_ap 123 GPIO_ACTIVE_LOW>; + linux,code =3D ; + wakeup-source; + }; + + button-voldown { + label =3D "Volume Down"; + gpios =3D <&pinctrl_ap 15 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-volup { + label =3D "Volume Up"; + gpios =3D <&pinctrl_ap 12 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/s8001.dtsi b/arch/arm64/boot/dts/app= le/s8001.dtsi new file mode 100644 index 000000000000..ab22d7948f62 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s8001.dtsi @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple S8001 "A9X" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&aic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "apple,twister"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + + cpu1: cpu@1 { + compatible =3D "apple,twister"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; /* To be filled in by loader */ + enable-method =3D "spin-table"; + device_type =3D "cpu"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0 0>; /* To be filled in by loader */ + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* Use the bootloader-enabled clocks for now. */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + status =3D "disabled"; + }; + + aic: interrupt-controller@20e100000 { + compatible =3D "apple,s8000-aic", "apple,aic"; + reg =3D <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells =3D <3>; + interrupt-controller; + }; + + pinctrl_ap: pinctrl@20f100000 { + compatible =3D "apple,s8000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x0f100000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 219>; + apple,npins =3D <219>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2100f0000 { + compatible =3D "apple,s8000-pinctrl", "apple,pinctrl"; + reg =3D <0x2 0x100f0000 0x0 0x100000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 28>; + apple,npins =3D <28>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + wdt: watchdog@2102b0000 { + compatible =3D "apple,s8000-wdt", "apple,wdt"; + reg =3D <0x2 0x102b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt"; + /* Note that A9X doesn't actually have a hypervisor (EL2 is not implemen= ted). */ + interrupts =3D , + ; + }; +}; --=20 2.46.0