From nobody Sat Nov 30 10:54:26 2024 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BF701A705D; Tue, 10 Sep 2024 18:05:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725991539; cv=none; b=cIMX+8174ZxxYqw6qVlYi0vbZH8XrFXW44VXMR1cOitjtgRIDl2cPZeJjo2AYMjjYEPbvy1AfeU86PKxqhJu9pEWXSYPgfWmqDJoWefRwFDPYDDyD/D1jf774M0ybuscGEvLnqXOcIrTmvOOIqAHJbvRl24QNbmChJNOCls7078= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725991539; c=relaxed/simple; bh=TfEQ0e/TZzz/N5j2kw3vCDQnPXPvuDJwAkPceMp2rKY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o+cWE+S3EGEciQlXw4FzkAjTySbtirvOQwtBEhcSAaHAlH0MQyTeNaJuEyHT2O/hfZbKiZZEBrp69Y2zPUJ7LwAmdgpgfXlQ850F5oHhGH9xrpn+v5Y6d6gAN8ULoGoYfzaEZ8B23tvLfjYPV8VhIox6yeXHDRDWssmKMdxxP+g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=M8XpCSe1; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="M8XpCSe1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1725991532; bh=TfEQ0e/TZzz/N5j2kw3vCDQnPXPvuDJwAkPceMp2rKY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M8XpCSe1QYXBmMA+yRiI0tCENnO5kMj9oO+2oSh70RevifXgsqdu/L57bUZt44VNe /eDJ4Vvf8Qoel4QfS5jStA6STSTu98WRjOatvaLp9Su50yrKFlsJLgZrT4EoYrIWK4 y96/xgB/lXz4fzhE9XAVfwQ95EPEq8mQ3UPB+rDcctN2QiTS5e0B0V0HQEroroCNoc 6OlyBb+7dOqH/2EPbM7uzLebC3FbdmF283KnxFnEefFbftPR/M7R/CQ2AsPEOjbk4x Pup7Sc4WprQ8DvyMcp55a7Nw+Oto4cPW2cYpiKgC5IkJmG3g+aMogxD5RBZpSoH3L6 ydeoSozA5TvNA== Received: from jupiter.universe (dyndsl-091-248-215-127.ewe-ip-backbone.de [91.248.215.127]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by bali.collaboradmins.com (Postfix) with ESMTPSA id 15A1317E3600; Tue, 10 Sep 2024 20:05:32 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id 939474800FF; Tue, 10 Sep 2024 20:05:31 +0200 (CEST) From: Sebastian Reichel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Ulf Hansson Cc: Elaine Zhang , =?UTF-8?q?Adri=C3=A1n=20Mart=C3=ADnez=20Larumbe?= , Boris Brezillon , devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 5/6] pmdomain: rockchip: add regulator support Date: Tue, 10 Sep 2024 19:57:14 +0200 Message-ID: <20240910180530.47194-6-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240910180530.47194-1-sebastian.reichel@collabora.com> References: <20240910180530.47194-1-sebastian.reichel@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some power domains require extra voltages to be applied. For example trying to enable the GPU domain on RK3588 fails when the SoC does not have VDD GPU enabled. The solution to temporarily change the device's device tree node has been taken over from the Mediatek power domain driver. The regulator is not acquired at probe time, since that creates circular dependencies. The power domain driver must be probed early, since SoC peripherals need it. Regulators on the other hand depend on SoC peripherals like SPI, I2C or GPIO. Signed-off-by: Sebastian Reichel Reviewed-by: Heiko Stuebner --- drivers/pmdomain/rockchip/pm-domains.c | 57 +++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 2 deletions(-) diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rock= chip/pm-domains.c index 663d390faaeb..ae6990897928 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -89,6 +90,8 @@ struct rockchip_pm_domain { u32 *qos_save_regs[MAX_QOS_REGS_NUM]; int num_clks; struct clk_bulk_data *clks; + struct device_node *node; + struct regulator *supply; }; =20 struct rockchip_pmu { @@ -571,18 +574,67 @@ static int rockchip_pd_power(struct rockchip_pm_domai= n *pd, bool power_on) return 0; } =20 +static int rockchip_pd_regulator_disable(struct rockchip_pm_domain *pd) +{ + return pd->supply ? regulator_disable(pd->supply) : 0; +} + + +static int rockchip_pd_regulator_enable(struct rockchip_pm_domain *pd) +{ + struct rockchip_pmu *pmu =3D pd->pmu; + struct device_node *main_node; + + if (!pd->supply) { + /* + * Find regulator in current power domain node. + * devm_regulator_get() finds regulator in a node and its child + * node, so set of_node to current power domain node then change + * back to original node after regulator is found for current + * power domain node. + */ + main_node =3D pmu->dev->of_node; + pmu->dev->of_node =3D pd->node; + pd->supply =3D devm_regulator_get(pmu->dev, "domain"); + pmu->dev->of_node =3D main_node; + if (IS_ERR(pd->supply)) { + pd->supply =3D NULL; + return 0; + } + } + + return regulator_enable(pd->supply); +} + static int rockchip_pd_power_on(struct generic_pm_domain *domain) { struct rockchip_pm_domain *pd =3D to_rockchip_pd(domain); + int ret; + + ret =3D rockchip_pd_regulator_enable(pd); + if (ret) { + dev_err(pd->pmu->dev, "Failed to enable supply: %d\n", ret); + return ret; + } =20 - return rockchip_pd_power(pd, true); + ret =3D rockchip_pd_power(pd, true); + if (ret) + rockchip_pd_regulator_disable(pd); + + return ret; } =20 static int rockchip_pd_power_off(struct generic_pm_domain *domain) { struct rockchip_pm_domain *pd =3D to_rockchip_pd(domain); + int ret; =20 - return rockchip_pd_power(pd, false); + ret =3D rockchip_pd_power(pd, false); + if (ret) + return ret; + + rockchip_pd_regulator_disable(pd); + return ret; } =20 static int rockchip_pd_attach_dev(struct generic_pm_domain *genpd, @@ -663,6 +715,7 @@ static int rockchip_pm_add_one_domain(struct rockchip_p= mu *pmu, =20 pd->info =3D pd_info; pd->pmu =3D pmu; + pd->node =3D node; =20 pd->num_clks =3D of_clk_get_parent_count(node); if (pd->num_clks > 0) { --=20 2.45.2