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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240910-meson-rst-aux-v5-1-60be62635d3e@baylibre.com> References: <20240910-meson-rst-aux-v5-0-60be62635d3e@baylibre.com> In-Reply-To: <20240910-meson-rst-aux-v5-0-60be62635d3e@baylibre.com> To: Philipp Zabel , Stephen Boyd , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jiucheng Xu Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5135; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=4VEzXjRyAdc+s0ybDA3IP98hrZK72BhbDpiWxhkjQHY=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBm4HS0LOglI0FGds477b9AQjE45jlk1P8b7S9Ch gvPHtXspCmJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCZuB0tAAKCRDm/A8cN/La hcV3D/4gRYU9Uq7kJahPMTbuJSt7Ql6GYfpoar3B0U+Wo8OAw8hZOR10Yc4wuWNRsvrdUXz7TTg THwq0hEJtvshHYIqxuD/kSVrTE6Ha0Cyqq5JoEqzmxr+EVBPgIJRayEx8iNlC2y17kldgKTENgg msszAvsvo++eV5KIIl3mxQWoQ3eoGrYJqv73DEu3LNAhH3KYjroR7U5dojFH5UVu2H7llzbz1xA Re3N4lkfnbvZglOQ+Ur9mr/1sGGQJfsjrQmeGW5CvQlk0wKW8tBi0+on2e/fMk5ejRuuP2XedcN 8i+Wm+ybn9I0QBZm2fm3OhSiJzzh/ZPTVHIW5PQTsMTMP2jb7/mBRIvfEhH1OM08AN/ZM0SQ4r6 txAhLskuqHZDsMl0YsxU1qzZX1K/M51hzq/OlBCsf2Ke6eKTwQ01BRQFtwibcGi9hk/aQzbas4M 4cdpCxLIQyZK+wPSqK6EWU/Eznf5pYnfW4l49Hyh7b544JxTSekXmNv76AID0GXQZl7o2aJ/uRJ ++5blmIBwvYS7dQVRIELRqhsdlQbzWHA42y8mYCUibeqLTwo+l8xnMy0JW3SLklGDHZfoofwiWa hTMc4l6jqK26IVKH9DGupIht0K8j2cxO7YfJA1Nemy4vvNLO3GuapbAaxr1oGcDjHDsDoyuxnls jltoZnT+NliAMcw== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 To allow using the same driver for the main reset controller and the auxiliary ones embedded in the clock controllers, convert the the Amlogic reset driver to regmap. Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/Kconfig | 1 + drivers/reset/reset-meson.c | 79 ++++++++++++++++++++++++-----------------= ---- 2 files changed, 44 insertions(+), 36 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5484a65f66b9..c730ba6f678b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -157,6 +157,7 @@ config RESET_MESON tristate "Meson Reset Driver" depends on ARCH_MESON || COMPILE_TEST default ARCH_MESON + select REGMAP_MMIO help This enables the reset driver for Amlogic Meson SoCs. =20 diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 1e9fca3e30e8..9dd38cc209e2 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -11,36 +11,43 @@ #include #include #include +#include #include #include #include =20 -#define BITS_PER_REG 32 - struct meson_reset_param { int reg_count; int level_offset; }; =20 struct meson_reset { - void __iomem *reg_base; const struct meson_reset_param *param; struct reset_controller_dev rcdev; - spinlock_t lock; + struct regmap *map; }; =20 +static void meson_reset_offset_and_bit(struct meson_reset *data, + unsigned long id, + unsigned int *offset, + unsigned int *bit) +{ + unsigned int stride =3D regmap_get_reg_stride(data->map); + + *offset =3D (id / (stride * BITS_PER_BYTE)) * stride; + *bit =3D id % (stride * BITS_PER_BYTE); +} + static int meson_reset_reset(struct reset_controller_dev *rcdev, - unsigned long id) + unsigned long id) { struct meson_reset *data =3D container_of(rcdev, struct meson_reset, rcdev); - unsigned int bank =3D id / BITS_PER_REG; - unsigned int offset =3D id % BITS_PER_REG; - void __iomem *reg_addr =3D data->reg_base + (bank << 2); + unsigned int offset, bit; =20 - writel(BIT(offset), reg_addr); + meson_reset_offset_and_bit(data, id, &offset, &bit); =20 - return 0; + return regmap_write(data->map, offset, BIT(bit)); } =20 static int meson_reset_level(struct reset_controller_dev *rcdev, @@ -48,25 +55,13 @@ static int meson_reset_level(struct reset_controller_de= v *rcdev, { struct meson_reset *data =3D container_of(rcdev, struct meson_reset, rcdev); - unsigned int bank =3D id / BITS_PER_REG; - unsigned int offset =3D id % BITS_PER_REG; - void __iomem *reg_addr; - unsigned long flags; - u32 reg; + unsigned int offset, bit; =20 - reg_addr =3D data->reg_base + data->param->level_offset + (bank << 2); + meson_reset_offset_and_bit(data, id, &offset, &bit); + offset +=3D data->param->level_offset; =20 - spin_lock_irqsave(&data->lock, flags); - - reg =3D readl(reg_addr); - if (assert) - writel(reg & ~BIT(offset), reg_addr); - else - writel(reg | BIT(offset), reg_addr); - - spin_unlock_irqrestore(&data->lock, flags); - - return 0; + return regmap_update_bits(data->map, offset, + BIT(bit), assert ? 0 : BIT(bit)); } =20 static int meson_reset_assert(struct reset_controller_dev *rcdev, @@ -119,30 +114,42 @@ static const struct of_device_id meson_reset_dt_ids[]= =3D { }; MODULE_DEVICE_TABLE(of, meson_reset_dt_ids); =20 +static const struct regmap_config regmap_config =3D { + .reg_bits =3D 32, + .val_bits =3D 32, + .reg_stride =3D 4, +}; + static int meson_reset_probe(struct platform_device *pdev) { + struct device *dev =3D &pdev->dev; struct meson_reset *data; + void __iomem *base; =20 - data =3D devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM; =20 - data->reg_base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(data->reg_base)) - return PTR_ERR(data->reg_base); + base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); =20 - data->param =3D of_device_get_match_data(&pdev->dev); + data->param =3D of_device_get_match_data(dev); if (!data->param) return -ENODEV; =20 - spin_lock_init(&data->lock); + data->map =3D devm_regmap_init_mmio(dev, base, ®map_config); + if (IS_ERR(data->map)) + return dev_err_probe(dev, PTR_ERR(data->map), + "can't init regmap mmio region\n"); =20 data->rcdev.owner =3D THIS_MODULE; - data->rcdev.nr_resets =3D data->param->reg_count * BITS_PER_REG; + data->rcdev.nr_resets =3D data->param->reg_count * BITS_PER_BYTE + * regmap_config.reg_stride; data->rcdev.ops =3D &meson_reset_ops; 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Tue, 10 Sep 2024 09:33:03 -0700 (PDT) From: Jerome Brunet Date: Tue, 10 Sep 2024 18:32:44 +0200 Subject: [PATCH v5 2/9] reset: amlogic: use generic data matching function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240910-meson-rst-aux-v5-2-60be62635d3e@baylibre.com> References: <20240910-meson-rst-aux-v5-0-60be62635d3e@baylibre.com> In-Reply-To: <20240910-meson-rst-aux-v5-0-60be62635d3e@baylibre.com> To: Philipp Zabel , Stephen Boyd , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jiucheng Xu Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=817; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=TBFxeGrFtyl6fNkBC1RzGGAepksDKxjvf8LT6xC71TA=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBm4HS1Tkc+OOhDTyGuf4iOz47SD4YGoUz7E+CiS j9zs6E46TSJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCZuB0tQAKCRDm/A8cN/La heo4EACaHd8VKcIzQJwErNdFqhTeL2cOA+CG3ICx/ce5La3RkdLGPTaHDUhm3zbPRsiJD9yjhDq h/cSnJ9bJlHcZq1G8m7oLngE5vcTT+m1hRv2I4qoFPXJBdv5/UceUHfpAXOhEURdAVbGLBNm27V N4l0Sy71IZ6tzRTbH+upcUJ6Kx9CzgKthfROp1YZ7zD48S5ISB20/G6n8pPfmXETtlzRNqgisOm B1fYBxPUAlBBnEtiXYzcNJmfaCo5jPHevgij4uwrsie185bk1AFr3KaDGGPw/LNEOs/RY5XhzUD YOUBpGTjZChUJtfyOr3z1WdR5+yqgonHq5ZLr7PvZrDjbJ1mY26anrHktPP0tAlSmle69BZbNID wE2ahBPtUKhUSBkpbDpG8FqzLe7rU+frCKzvt5XMYfoknEwpFIoHVYamq1u3p5MkThrMe4P52Ug z65bOHFHwfvFMcKNhxzOoKPA/LjGlaccL3z2/p8iN1CNzAztFKOYijwJ7eAD73YYNe4SKj3CcZ3 /MnmvxyB/4wg1gQcPyZCQVzdEtozcDAp1V77yOuDntw53GaXCaMGrViwCt3xxsiUL4+S8TkCyuN p5X7wasd/QoChIDLr/pf4jHpOzFtzOiiBO4MqvFz1cN8fH/QmIf7F0WsK8muH1OOvO21Vo8QYll 3Xl8IjLdwY50hfQ== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 There is no need to use the DT specific function to get matching data, use the generic one instead Suggested-by: Stephen Boyd Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/reset-meson.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 9dd38cc209e2..848c2d88503e 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -134,7 +134,7 @@ static int meson_reset_probe(struct platform_device *pd= ev) if (IS_ERR(base)) return PTR_ERR(base); =20 - data->param =3D of_device_get_match_data(dev); + data->param =3D device_get_match_data(dev); if (!data->param) return -ENODEV; =20 --=20 2.45.2 From nobody Sat Nov 30 07:40:59 2024 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 702E01A0AFB for ; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 register count and offset cannot be negative. Use unsigned integer for this. Suggested-by: Stephen Boyd Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/reset-meson.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 848c2d88503e..50bd2241ef2f 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -17,8 +17,8 @@ #include =20 struct meson_reset_param { - int reg_count; - int level_offset; + unsigned int reg_count; + unsigned int level_offset; }; =20 struct meson_reset { --=20 2.45.2 From nobody Sat Nov 30 07:40:59 2024 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 327D21A255D for ; Tue, 10 Sep 2024 16:33:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; 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Tue, 10 Sep 2024 09:33:05 -0700 (PDT) Received: from toaster.baylibre.com ([2a01:e0a:3c5:5fb1:8ba7:bfe4:fea9:65b]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-42cc1375189sm25076025e9.1.2024.09.10.09.33.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Sep 2024 09:33:05 -0700 (PDT) From: Jerome Brunet Date: Tue, 10 Sep 2024 18:32:46 +0200 Subject: [PATCH v5 4/9] reset: amlogic: add driver parameters Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240910-meson-rst-aux-v5-4-60be62635d3e@baylibre.com> References: <20240910-meson-rst-aux-v5-0-60be62635d3e@baylibre.com> In-Reply-To: <20240910-meson-rst-aux-v5-0-60be62635d3e@baylibre.com> To: Philipp Zabel , Stephen Boyd , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jiucheng Xu Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 To allow using the same driver for the main reset controller and the auxiliary ones embedded in the clock controllers, allow to customise the reset offset, same as the level offset. Also add an option to make the level reset active low or high. Signed-off-by: Jerome Brunet Reviewed-by: Neil Armstrong Reviewed-by: Philipp Zabel --- drivers/reset/reset-meson.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 50bd2241ef2f..6a90613c8095 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -18,7 +18,9 @@ =20 struct meson_reset_param { unsigned int reg_count; + unsigned int reset_offset; unsigned int level_offset; + bool level_low_reset; }; =20 struct meson_reset { @@ -46,6 +48,7 @@ static int meson_reset_reset(struct reset_controller_dev = *rcdev, unsigned int offset, bit; =20 meson_reset_offset_and_bit(data, id, &offset, &bit); + offset +=3D data->param->reset_offset; =20 return regmap_write(data->map, offset, BIT(bit)); } @@ -59,9 +62,10 @@ static int meson_reset_level(struct reset_controller_dev= *rcdev, =20 meson_reset_offset_and_bit(data, id, &offset, &bit); offset +=3D data->param->level_offset; + assert ^=3D data->param->level_low_reset; =20 return regmap_update_bits(data->map, offset, - BIT(bit), assert ? 0 : BIT(bit)); + BIT(bit), assert ? BIT(bit) : 0); } =20 static int meson_reset_assert(struct reset_controller_dev *rcdev, @@ -84,22 +88,30 @@ static const struct reset_control_ops meson_reset_ops = =3D { =20 static const struct meson_reset_param meson8b_param =3D { .reg_count =3D 8, + .reset_offset =3D 0x0, .level_offset =3D 0x7c, + .level_low_reset =3D true, }; =20 static const struct meson_reset_param meson_a1_param =3D { .reg_count =3D 3, + .reset_offset =3D 0x0, .level_offset =3D 0x40, + .level_low_reset =3D true, }; =20 static const struct meson_reset_param meson_s4_param =3D { .reg_count =3D 6, + .reset_offset =3D 0x0, .level_offset =3D 0x40, + .level_low_reset =3D true, }; =20 static const struct meson_reset_param t7_param =3D { .reg_count =3D 7, + .reset_offset =3D 0x0, .level_offset =3D 0x40, + .level_low_reset =3D true, }; =20 static const struct of_device_id meson_reset_dt_ids[] =3D { --=20 2.45.2 From nobody Sat Nov 30 07:40:59 2024 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E4401A3BB0 for ; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 The reset driver from audio clock controller may register less reset than a register can hold. To avoid making any change while switching to auxiliary support, use the number of reset instead of the register count to define the bounds of the reset controller. Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/reset-meson.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 6a90613c8095..e31c1b7c9e4d 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -17,7 +17,7 @@ #include =20 struct meson_reset_param { - unsigned int reg_count; + unsigned int reset_num; unsigned int reset_offset; unsigned int level_offset; bool level_low_reset; @@ -87,28 +87,28 @@ static const struct reset_control_ops meson_reset_ops = =3D { }; =20 static const struct meson_reset_param meson8b_param =3D { - .reg_count =3D 8, + .reset_num =3D 256, .reset_offset =3D 0x0, .level_offset =3D 0x7c, .level_low_reset =3D true, }; =20 static const struct meson_reset_param meson_a1_param =3D { - .reg_count =3D 3, + .reset_num =3D 96, .reset_offset =3D 0x0, .level_offset =3D 0x40, .level_low_reset =3D true, }; =20 static const struct meson_reset_param meson_s4_param =3D { - .reg_count =3D 6, + .reset_num =3D 192, .reset_offset =3D 0x0, .level_offset =3D 0x40, .level_low_reset =3D true, }; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Add a callback to check the status of the level reset, as done in the reset driver of the audio clock controller. This is done keep the functionality when the audio reset controller get migrated to meson-reset. Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/reset-meson.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index e31c1b7c9e4d..af690d3012ec 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -68,6 +68,22 @@ static int meson_reset_level(struct reset_controller_dev= *rcdev, BIT(bit), assert ? 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 The meson reset driver will be split in two part, one implemeting the ops, the other providing the platform driver support. This will be done to facilitate the addition of the auxiliary bus support. To avoid making a mess in drivers/reset/ while doing so, move the amlogic reset drivers to a dedicated directory. Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/Kconfig | 16 +--------------- drivers/reset/Makefile | 3 +-- drivers/reset/amlogic/Kconfig | 14 ++++++++++++++ drivers/reset/amlogic/Makefile | 2 ++ drivers/reset/{ =3D> amlogic}/reset-meson-audio-arb.c | 0 drivers/reset/{ =3D> amlogic}/reset-meson.c | 0 6 files changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index c730ba6f678b..d28c4401a310 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -153,21 +153,6 @@ config RESET_MCHP_SPARX5 help This driver supports switch core reset for the Microchip Sparx5 SoC. =20 -config RESET_MESON - tristate "Meson Reset Driver" - depends on ARCH_MESON || COMPILE_TEST - default ARCH_MESON - select REGMAP_MMIO - help - This enables the reset driver for Amlogic Meson SoCs. - -config RESET_MESON_AUDIO_ARB - tristate "Meson Audio Memory Arbiter Reset Driver" - depends on ARCH_MESON || COMPILE_TEST - help - This enables the reset driver for Audio Memory Arbiter of - Amlogic's A113 based SoCs - config RESET_NPCM bool "NPCM BMC Reset Driver" if COMPILE_TEST default ARCH_NPCM @@ -357,6 +342,7 @@ config RESET_ZYNQMP help This enables the reset controller driver for Xilinx ZynqMP SoCs. =20 +source "drivers/reset/amlogic/Kconfig" source "drivers/reset/starfive/Kconfig" source "drivers/reset/sti/Kconfig" source "drivers/reset/hisilicon/Kconfig" diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 4411a2a124d7..677c4d1e2632 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-y +=3D core.o +obj-y +=3D amlogic/ obj-y +=3D hisilicon/ obj-y +=3D starfive/ obj-y +=3D sti/ @@ -21,8 +22,6 @@ obj-$(CONFIG_RESET_K210) +=3D reset-k210.o obj-$(CONFIG_RESET_LANTIQ) +=3D reset-lantiq.o obj-$(CONFIG_RESET_LPC18XX) +=3D reset-lpc18xx.o obj-$(CONFIG_RESET_MCHP_SPARX5) +=3D reset-microchip-sparx5.o -obj-$(CONFIG_RESET_MESON) +=3D reset-meson.o -obj-$(CONFIG_RESET_MESON_AUDIO_ARB) +=3D reset-meson-audio-arb.o obj-$(CONFIG_RESET_NPCM) +=3D reset-npcm.o obj-$(CONFIG_RESET_NUVOTON_MA35D1) +=3D reset-ma35d1.o obj-$(CONFIG_RESET_PISTACHIO) +=3D reset-pistachio.o diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig new file mode 100644 index 000000000000..532e6a4f7865 --- /dev/null +++ b/drivers/reset/amlogic/Kconfig @@ -0,0 +1,14 @@ +config RESET_MESON + tristate "Meson Reset Driver" + depends on ARCH_MESON || COMPILE_TEST + default ARCH_MESON + select REGMAP_MMIO + help + This enables the reset driver for Amlogic Meson SoCs. + +config RESET_MESON_AUDIO_ARB + tristate "Meson Audio Memory Arbiter Reset Driver" + depends on ARCH_MESON || COMPILE_TEST + help + This enables the reset driver for Audio Memory Arbiter of + Amlogic's A113 based SoCs diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile new file mode 100644 index 000000000000..55509fc78513 --- /dev/null +++ b/drivers/reset/amlogic/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_RESET_MESON) +=3D reset-meson.o +obj-$(CONFIG_RESET_MESON_AUDIO_ARB) +=3D reset-meson-audio-arb.o diff --git a/drivers/reset/reset-meson-audio-arb.c b/drivers/reset/amlogic/= reset-meson-audio-arb.c similarity index 100% rename from drivers/reset/reset-meson-audio-arb.c rename to drivers/reset/amlogic/reset-meson-audio-arb.c diff --git a/drivers/reset/reset-meson.c b/drivers/reset/amlogic/reset-meso= n.c similarity index 100% rename from drivers/reset/reset-meson.c rename to drivers/reset/amlogic/reset-meson.c --=20 2.45.2 From nobody Sat Nov 30 07:40:59 2024 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE4441ABEAF for ; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 To prepare the addition of the auxiliary device support, split out the device coomon functions from the probe of the platform device. The device core function will be common to both the platform and auxiliary driver. Signed-off-by: Jerome Brunet Reviewed-by: Neil Armstrong Reviewed-by: Philipp Zabel --- drivers/reset/amlogic/Kconfig | 7 +- drivers/reset/amlogic/Makefile | 1 + drivers/reset/amlogic/reset-meson-common.c | 121 +++++++++++++++++++++++++= +++ drivers/reset/amlogic/reset-meson.c | 122 ++++---------------------= ---- drivers/reset/amlogic/reset-meson.h | 24 ++++++ 5 files changed, 167 insertions(+), 108 deletions(-) diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig index 532e6a4f7865..1d77987088f4 100644 --- a/drivers/reset/amlogic/Kconfig +++ b/drivers/reset/amlogic/Kconfig @@ -1,10 +1,15 @@ +config RESET_MESON_COMMON + tristate + select REGMAP + config RESET_MESON tristate "Meson Reset Driver" depends on ARCH_MESON || COMPILE_TEST default ARCH_MESON select REGMAP_MMIO + select RESET_MESON_COMMON help - This enables the reset driver for Amlogic Meson SoCs. + This enables the reset driver for Amlogic SoCs. =20 config RESET_MESON_AUDIO_ARB tristate "Meson Audio Memory Arbiter Reset Driver" diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile index 55509fc78513..74aaa2fb5e13 100644 --- a/drivers/reset/amlogic/Makefile +++ b/drivers/reset/amlogic/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_RESET_MESON) +=3D reset-meson.o +obj-$(CONFIG_RESET_MESON_COMMON) +=3D reset-meson-common.o obj-$(CONFIG_RESET_MESON_AUDIO_ARB) +=3D reset-meson-audio-arb.o diff --git a/drivers/reset/amlogic/reset-meson-common.c b/drivers/reset/aml= ogic/reset-meson-common.c new file mode 100644 index 000000000000..d57544801ae9 --- /dev/null +++ b/drivers/reset/amlogic/reset-meson-common.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Amlogic Meson Reset core functions + * + * Copyright (c) 2016-2024 BayLibre, SAS. + * Authors: Neil Armstrong + * Jerome Brunet + */ + +#include +#include +#include +#include + +#include "reset-meson.h" + +struct meson_reset { + const struct meson_reset_param *param; + struct reset_controller_dev rcdev; + struct regmap *map; +}; + +static void meson_reset_offset_and_bit(struct meson_reset *data, + unsigned long id, + unsigned int *offset, + unsigned int *bit) +{ + unsigned int stride =3D regmap_get_reg_stride(data->map); + + *offset =3D (id / (stride * BITS_PER_BYTE)) * stride; + *bit =3D id % (stride * BITS_PER_BYTE); +} + +static int meson_reset_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct meson_reset *data =3D + container_of(rcdev, struct meson_reset, rcdev); + unsigned int offset, bit; + + meson_reset_offset_and_bit(data, id, &offset, &bit); + offset +=3D data->param->reset_offset; + + return regmap_write(data->map, offset, BIT(bit)); +} + +static int meson_reset_level(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct meson_reset *data =3D + container_of(rcdev, struct meson_reset, rcdev); + unsigned int offset, bit; + + meson_reset_offset_and_bit(data, id, &offset, &bit); + offset +=3D data->param->level_offset; + assert ^=3D data->param->level_low_reset; + + return regmap_update_bits(data->map, offset, + BIT(bit), assert ? BIT(bit) : 0); +} + +static int meson_reset_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct meson_reset *data =3D + container_of(rcdev, struct meson_reset, rcdev); + unsigned int val, offset, bit; + + meson_reset_offset_and_bit(data, id, &offset, &bit); + offset +=3D data->param->level_offset; + + regmap_read(data->map, offset, &val); + val =3D !!(BIT(bit) & val); + + return val ^ data->param->level_low_reset; +} + +static int meson_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return meson_reset_level(rcdev, id, true); +} + +static int meson_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return meson_reset_level(rcdev, id, false); +} + +static const struct reset_control_ops meson_reset_ops =3D { + .reset =3D meson_reset_reset, + .assert =3D meson_reset_assert, + .deassert =3D meson_reset_deassert, + .status =3D meson_reset_status, +}; + +int meson_reset_controller_register(struct device *dev, struct regmap *map, + const struct meson_reset_param *param) +{ + struct meson_reset *data; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->param =3D param; + data->map =3D map; + data->rcdev.owner =3D dev->driver->owner; + data->rcdev.nr_resets =3D param->reset_num; + data->rcdev.ops =3D &meson_reset_ops; + data->rcdev.of_node =3D dev->of_node; + + return devm_reset_controller_register(dev, &data->rcdev); +} +EXPORT_SYMBOL_NS_GPL(meson_reset_controller_register, MESON_RESET); + +MODULE_DESCRIPTION("Amlogic Meson Reset Core function"); +MODULE_AUTHOR("Neil Armstrong "); +MODULE_AUTHOR("Jerome Brunet "); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_IMPORT_NS(MESON_RESET); diff --git a/drivers/reset/amlogic/reset-meson.c b/drivers/reset/amlogic/re= set-meson.c index af690d3012ec..feb19bf6da77 100644 --- a/drivers/reset/amlogic/reset-meson.c +++ b/drivers/reset/amlogic/reset-meson.c @@ -2,106 +2,20 @@ /* * Amlogic Meson Reset Controller driver * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong + * Copyright (c) 2016-2024 BayLibre, SAS. + * Authors: Neil Armstrong + * Jerome Brunet */ + #include -#include #include #include #include #include #include #include -#include -#include - -struct meson_reset_param { - unsigned int reset_num; - unsigned int reset_offset; - unsigned int level_offset; - bool level_low_reset; -}; - -struct meson_reset { - const struct meson_reset_param *param; - struct reset_controller_dev rcdev; - struct regmap *map; -}; - -static void meson_reset_offset_and_bit(struct meson_reset *data, - unsigned long id, - unsigned int *offset, - unsigned int *bit) -{ - unsigned int stride =3D regmap_get_reg_stride(data->map); - - *offset =3D (id / (stride * BITS_PER_BYTE)) * stride; - *bit =3D id % (stride * BITS_PER_BYTE); -} - -static int meson_reset_reset(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct meson_reset *data =3D - container_of(rcdev, struct meson_reset, rcdev); - unsigned int offset, bit; - - meson_reset_offset_and_bit(data, id, &offset, &bit); - offset +=3D data->param->reset_offset; - - return regmap_write(data->map, offset, BIT(bit)); -} - -static int meson_reset_level(struct reset_controller_dev *rcdev, - unsigned long id, bool assert) -{ - struct meson_reset *data =3D - container_of(rcdev, struct meson_reset, rcdev); - unsigned int offset, bit; - - meson_reset_offset_and_bit(data, id, &offset, &bit); - offset +=3D data->param->level_offset; - assert ^=3D data->param->level_low_reset; =20 - return regmap_update_bits(data->map, offset, - BIT(bit), assert ? BIT(bit) : 0); -} - -static int meson_reset_status(struct reset_controller_dev *rcdev, - unsigned long id) -{ - struct meson_reset *data =3D - container_of(rcdev, struct meson_reset, rcdev); - unsigned int val, offset, bit; - - meson_reset_offset_and_bit(data, id, &offset, &bit); - offset +=3D data->param->level_offset; - - regmap_read(data->map, offset, &val); - val =3D !!(BIT(bit) & val); - - return val ^ data->param->level_low_reset; -} - -static int meson_reset_assert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - return meson_reset_level(rcdev, id, true); -} - -static int meson_reset_deassert(struct reset_controller_dev *rcdev, - unsigned long id) -{ - return meson_reset_level(rcdev, id, false); -} - -static const struct reset_control_ops meson_reset_ops =3D { - .reset =3D meson_reset_reset, - .assert =3D meson_reset_assert, - .deassert =3D meson_reset_deassert, - .status =3D meson_reset_status, -}; +#include "reset-meson.h" =20 static const struct meson_reset_param meson8b_param =3D { .reset_num =3D 256, @@ -151,33 +65,25 @@ static const struct regmap_config regmap_config =3D { =20 static int meson_reset_probe(struct platform_device *pdev) { + const struct meson_reset_param *param; struct device *dev =3D &pdev->dev; - struct meson_reset *data; + struct regmap *map; void __iomem *base; =20 - data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); - if (!data) - return -ENOMEM; - base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return PTR_ERR(base); =20 - data->param =3D device_get_match_data(dev); - if (!data->param) + param =3D device_get_match_data(dev); + if (!param) return -ENODEV; =20 - data->map =3D devm_regmap_init_mmio(dev, base, ®map_config); - if (IS_ERR(data->map)) - return dev_err_probe(dev, PTR_ERR(data->map), + map =3D devm_regmap_init_mmio(dev, base, ®map_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), "can't init regmap mmio region\n"); =20 - data->rcdev.owner =3D THIS_MODULE; - data->rcdev.nr_resets =3D data->param->reset_num; - data->rcdev.ops =3D &meson_reset_ops; - data->rcdev.of_node =3D dev->of_node; - - return devm_reset_controller_register(dev, &data->rcdev); + return meson_reset_controller_register(dev, map, param); } =20 static struct platform_driver meson_reset_driver =3D { @@ -191,4 +97,6 @@ module_platform_driver(meson_reset_driver); =20 MODULE_DESCRIPTION("Amlogic Meson Reset Controller driver"); MODULE_AUTHOR("Neil Armstrong "); +MODULE_AUTHOR("Jerome Brunet "); MODULE_LICENSE("Dual BSD/GPL"); +MODULE_IMPORT_NS(MESON_RESET); diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/re= set-meson.h new file mode 100644 index 000000000000..4e1dbd7569c5 --- /dev/null +++ b/drivers/reset/amlogic/reset-meson.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ +/* + * Copyright (c) 2024 BayLibre, SAS. + * Author: Jerome Brunet + */ + +#ifndef __MESON_RESET_H +#define __MESON_RESET_H + +#include +#include +#include + +struct meson_reset_param { + unsigned int reset_num; + unsigned int reset_offset; + unsigned int level_offset; + bool level_low_reset; +}; + +int meson_reset_controller_register(struct device *dev, struct regmap *map, + const struct meson_reset_param *param); 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Add support for the reset controller present in the audio clock controller of the g12 and sm1 SoC families, using the auxiliary bus. This is expected to replace the driver currently present directly within the related clock driver. Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel --- drivers/reset/amlogic/Kconfig | 8 ++ drivers/reset/amlogic/Makefile | 1 + drivers/reset/amlogic/reset-meson-aux.c | 136 +++++++++++++++++++++++++= ++++ drivers/reset/amlogic/reset-meson-common.c | 25 +++++- drivers/reset/amlogic/reset-meson.c | 3 + drivers/reset/amlogic/reset-meson.h | 4 + include/soc/amlogic/reset-meson-aux.h | 23 +++++ 7 files changed, 198 insertions(+), 2 deletions(-) diff --git a/drivers/reset/amlogic/Kconfig b/drivers/reset/amlogic/Kconfig index 1d77987088f4..3bee9fd60269 100644 --- a/drivers/reset/amlogic/Kconfig +++ b/drivers/reset/amlogic/Kconfig @@ -11,6 +11,14 @@ config RESET_MESON help This enables the reset driver for Amlogic SoCs. =20 +config RESET_MESON_AUX + tristate "Meson Reset Auxiliary Driver" + depends on ARCH_MESON || COMPILE_TEST + select AUXILIARY_BUS + select RESET_MESON_COMMON + help + This enables the reset auxiliary driver for Amlogic SoCs. + config RESET_MESON_AUDIO_ARB tristate "Meson Audio Memory Arbiter Reset Driver" depends on ARCH_MESON || COMPILE_TEST diff --git a/drivers/reset/amlogic/Makefile b/drivers/reset/amlogic/Makefile index 74aaa2fb5e13..ca99a691282c 100644 --- a/drivers/reset/amlogic/Makefile +++ b/drivers/reset/amlogic/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_RESET_MESON) +=3D reset-meson.o +obj-$(CONFIG_RESET_MESON_AUX) +=3D reset-meson-aux.o obj-$(CONFIG_RESET_MESON_COMMON) +=3D reset-meson-common.o obj-$(CONFIG_RESET_MESON_AUDIO_ARB) +=3D reset-meson-audio-arb.o diff --git a/drivers/reset/amlogic/reset-meson-aux.c b/drivers/reset/amlogi= c/reset-meson-aux.c new file mode 100644 index 000000000000..dd8453001db9 --- /dev/null +++ b/drivers/reset/amlogic/reset-meson-aux.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Amlogic Meson Reset Auxiliary driver + * + * Copyright (c) 2024 BayLibre, SAS. + * Author: Jerome Brunet + */ + +#include +#include +#include +#include +#include +#include + +#include "reset-meson.h" +#include + +static DEFINE_IDA(meson_rst_aux_ida); + +struct meson_reset_adev { + struct auxiliary_device adev; + struct regmap *map; +}; + +#define to_meson_reset_adev(_adev) \ + container_of((_adev), struct meson_reset_adev, adev) + +static const struct meson_reset_param meson_g12a_audio_param =3D { + .reset_ops =3D &meson_reset_toggle_ops, + .reset_num =3D 26, + .level_offset =3D 0x24, +}; + +static const struct meson_reset_param meson_sm1_audio_param =3D { + .reset_ops =3D &meson_reset_toggle_ops, + .reset_num =3D 39, + .level_offset =3D 0x28, +}; + +static const struct auxiliary_device_id meson_reset_aux_ids[] =3D { + { + .name =3D "axg-audio-clkc.rst-g12a", + .driver_data =3D (kernel_ulong_t)&meson_g12a_audio_param, + }, { + .name =3D "axg-audio-clkc.rst-sm1", + .driver_data =3D (kernel_ulong_t)&meson_sm1_audio_param, + }, {} +}; +MODULE_DEVICE_TABLE(auxiliary, meson_reset_aux_ids); + +static int meson_reset_aux_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + const struct meson_reset_param *param =3D + (const struct meson_reset_param *)(id->driver_data); + struct meson_reset_adev *raux =3D + to_meson_reset_adev(adev); + + return meson_reset_controller_register(&adev->dev, raux->map, param); +} + +static struct auxiliary_driver meson_reset_aux_driver =3D { + .probe =3D meson_reset_aux_probe, + .id_table =3D meson_reset_aux_ids, +}; +module_auxiliary_driver(meson_reset_aux_driver); + +static void meson_rst_aux_release(struct device *dev) +{ + struct auxiliary_device *adev =3D to_auxiliary_dev(dev); + struct meson_reset_adev *raux =3D + to_meson_reset_adev(adev); + + ida_free(&meson_rst_aux_ida, adev->id); + kfree(raux); +} + +static void meson_rst_aux_unregister_adev(void *_adev) +{ + struct auxiliary_device *adev =3D _adev; + + auxiliary_device_delete(adev); + auxiliary_device_uninit(adev); +} + +int devm_meson_rst_aux_register(struct device *dev, + struct regmap *map, + const char *adev_name) +{ + struct meson_reset_adev *raux; + struct auxiliary_device *adev; + int ret; + + raux =3D kzalloc(sizeof(*raux), GFP_KERNEL); + if (!raux) + return -ENOMEM; + + ret =3D ida_alloc(&meson_rst_aux_ida, GFP_KERNEL); + if (ret < 0) + goto raux_free; + + raux->map =3D map; + + adev =3D &raux->adev; + adev->id =3D ret; + adev->name =3D adev_name; + adev->dev.parent =3D dev; + adev->dev.release =3D meson_rst_aux_release; + device_set_of_node_from_dev(&adev->dev, dev); + + ret =3D auxiliary_device_init(adev); + if (ret) + goto ida_free; + + ret =3D __auxiliary_device_add(adev, dev->driver->name); + if (ret) { + auxiliary_device_uninit(adev); + return ret; + } + + return devm_add_action_or_reset(dev, meson_rst_aux_unregister_adev, + adev); + +ida_free: + ida_free(&meson_rst_aux_ida, adev->id); +raux_free: + kfree(raux); + return ret; +} +EXPORT_SYMBOL_GPL(devm_meson_rst_aux_register); + +MODULE_DESCRIPTION("Amlogic Meson Reset Auxiliary driver"); +MODULE_AUTHOR("Jerome Brunet "); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_IMPORT_NS(MESON_RESET); diff --git a/drivers/reset/amlogic/reset-meson-common.c b/drivers/reset/aml= ogic/reset-meson-common.c index d57544801ae9..a7b1b250a64d 100644 --- a/drivers/reset/amlogic/reset-meson-common.c +++ b/drivers/reset/amlogic/reset-meson-common.c @@ -87,12 +87,33 @@ static int meson_reset_deassert(struct reset_controller= _dev *rcdev, return meson_reset_level(rcdev, id, false); } =20 -static const struct reset_control_ops meson_reset_ops =3D { +static int meson_reset_level_toggle(struct reset_controller_dev *rcdev, + unsigned long id) +{ + int ret; + + ret =3D meson_reset_assert(rcdev, id); + if (ret) + return ret; + + return meson_reset_deassert(rcdev, id); +} + +const struct reset_control_ops meson_reset_ops =3D { .reset =3D meson_reset_reset, .assert =3D meson_reset_assert, .deassert =3D meson_reset_deassert, .status =3D meson_reset_status, }; +EXPORT_SYMBOL_NS_GPL(meson_reset_ops, MESON_RESET); + +const struct reset_control_ops meson_reset_toggle_ops =3D { + .reset =3D meson_reset_level_toggle, + .assert =3D meson_reset_assert, + .deassert =3D meson_reset_deassert, + .status =3D meson_reset_status, +}; +EXPORT_SYMBOL_NS_GPL(meson_reset_toggle_ops, MESON_RESET); =20 int meson_reset_controller_register(struct device *dev, struct regmap *map, const struct meson_reset_param *param) @@ -107,7 +128,7 @@ int meson_reset_controller_register(struct device *dev,= struct regmap *map, data->map =3D map; data->rcdev.owner =3D dev->driver->owner; data->rcdev.nr_resets =3D param->reset_num; - data->rcdev.ops =3D &meson_reset_ops; + data->rcdev.ops =3D data->param->reset_ops; data->rcdev.of_node =3D dev->of_node; =20 return devm_reset_controller_register(dev, &data->rcdev); diff --git a/drivers/reset/amlogic/reset-meson.c b/drivers/reset/amlogic/re= set-meson.c index feb19bf6da77..6ae4ed6b7f8b 100644 --- a/drivers/reset/amlogic/reset-meson.c +++ b/drivers/reset/amlogic/reset-meson.c @@ -18,6 +18,7 @@ #include "reset-meson.h" =20 static const struct meson_reset_param meson8b_param =3D { + .reset_ops =3D &meson_reset_ops, .reset_num =3D 256, .reset_offset =3D 0x0, .level_offset =3D 0x7c, @@ -25,6 +26,7 @@ static const struct meson_reset_param meson8b_param =3D { }; =20 static const struct meson_reset_param meson_a1_param =3D { + .reset_ops =3D &meson_reset_ops, .reset_num =3D 96, .reset_offset =3D 0x0, .level_offset =3D 0x40, @@ -32,6 +34,7 @@ static const struct meson_reset_param meson_a1_param =3D { }; =20 static const struct meson_reset_param meson_s4_param =3D { + .reset_ops =3D &meson_reset_ops, .reset_num =3D 192, .reset_offset =3D 0x0, .level_offset =3D 0x40, diff --git a/drivers/reset/amlogic/reset-meson.h b/drivers/reset/amlogic/re= set-meson.h index 4e1dbd7569c5..2051e126dc3a 100644 --- a/drivers/reset/amlogic/reset-meson.h +++ b/drivers/reset/amlogic/reset-meson.h @@ -12,6 +12,7 @@ #include =20 struct meson_reset_param { + const struct reset_control_ops *reset_ops; unsigned int reset_num; unsigned int reset_offset; unsigned int level_offset; @@ -21,4 +22,7 @@ struct meson_reset_param { int meson_reset_controller_register(struct device *dev, struct regmap *map, const struct meson_reset_param *param); =20 +extern const struct reset_control_ops meson_reset_ops; +extern const struct reset_control_ops meson_reset_toggle_ops; + #endif /* __MESON_RESET_H */ diff --git a/include/soc/amlogic/reset-meson-aux.h b/include/soc/amlogic/re= set-meson-aux.h new file mode 100644 index 000000000000..d8a15d48c984 --- /dev/null +++ b/include/soc/amlogic/reset-meson-aux.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __SOC_RESET_MESON_AUX_H +#define __SOC_RESET_MESON_AUX_H + +#include + +struct device; +struct regmap; + +#if IS_ENABLED(CONFIG_RESET_MESON_AUX) +int devm_meson_rst_aux_register(struct device *dev, + struct regmap *map, + const char *adev_name); +#else +static inline int devm_meson_rst_aux_register(struct device *dev, + struct regmap *map, + const char *adev_name) +{ + return 0; +} +#endif + +#endif /* __SOC_RESET_MESON_AUX_H */ --=20 2.45.2