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[2a01:cb08:508:df00:ca96:65ff:fed2:3409]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca0600651sm90883925e9.32.2024.09.08.15.40.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Sep 2024 15:40:53 -0700 (PDT) From: =?UTF-8?q?J=C3=A9r=C3=B4me=20de=20Bretagne?= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maximilian Luz , Krzysztof Kozlowski Subject: [PATCH v2 1/5] dt-bindings: arm: qcom: Document Microsoft Surface Pro 9 5G Date: Mon, 9 Sep 2024 00:35:01 +0200 Message-ID: <20240908223505.21011-2-jerome.debretagne@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240908223505.21011-1-jerome.debretagne@gmail.com> References: <20240908223505.21011-1-jerome.debretagne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add compatible for the SC8280XP-based Microsoft Surface Pro 9 5G, using its Arcata codename. Acked-by: Krzysztof Kozlowski Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index f08e13b61172..114c7f5dc402 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -810,6 +810,7 @@ properties: - items: - enum: - lenovo,thinkpad-x13s + - microsoft,arcata - qcom,sc8280xp-crd - qcom,sc8280xp-qrd - const: qcom,sc8280xp --=20 2.45.2 From nobody Sat Nov 30 16:21:28 2024 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E889172773; Sun, 8 Sep 2024 22:40:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725835258; cv=none; b=Y0sIQ8u5eXtlfzVubDWb/ml8JQegsbffojdLN6nZDfUTz0HYmCOLeIwX63Ch3S+hg0dgQ2eI6I8PDtwO7vmoiufOfQ7cKRVNl899ycpsnM69iSvsEoJpi34Fmqajy1uBhSCdhGViMpO+AJ1UfmFw6ySxKdURm2pkYyplptPySqE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725835258; c=relaxed/simple; bh=3lLgxjxJK3uifHsprkkFu/oOKERENFoeSzGv4F2cfwg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uufU+yWVBuNHr1nZBN/XZcw8n+y0DY/616f9WDRIsILwzF8VjZzrqxCUmfsjHmKCEg48AaD0qIljcu/BsWSuPZYAB8kFt0ktqkf/xVGVZ40HOnxvytEuee0uLcHklv1iTs029tO+4EwbFocm9YM9f6I+ZzFPi5q0cUyD9Ra7hps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=cLmlYkxE; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cLmlYkxE" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-42c94e59b93so26211435e9.1; Sun, 08 Sep 2024 15:40:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1725835255; x=1726440055; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5e45CHpcKZiyJ3dH/Cw2nc6Fvm7wL+FD0pX6Y4oHMc8=; b=cLmlYkxEIZcmBjUhk/O+T9g28XKlTk3WxQ8Q2tyaQfSVVVouTA79q9YqH94W+Sutha a4Xj27VhE1u0s4pn9m8Fu1fjTeDj9G8a/oPcfOaUHID3ysvNtvnavXLIoIORmnI4/7mB FijtMX0ZmGYyBD3dgjinkIVmkz1NXEmA0pTzGnUpHwiC0rhzU1xeUcUjKnzkGWBQtvx2 OW9Jye5QcXxSWbPwzocIg1hguCUy052LH7O1xgeT02idzjBonkMA2Bom06s3CvOkzpPb AkD8rKFTNEhsQB62Wv/Mk6DB+T4fKATvdB1MPiy14EVwm9mvu2qv1bTaanlPDpvsSWMK JCTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725835255; x=1726440055; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5e45CHpcKZiyJ3dH/Cw2nc6Fvm7wL+FD0pX6Y4oHMc8=; b=EPPFNBubgSVwuQIwjFM/BwjbKFi5jO80tRST0BO785yCNUTtqBxibowQ1QEkxBxFU1 8J/QBxSjGTKG4gnJz4CO/xNLlAGVOU4I/A+BZNsQ04cpHbKUeFlXLq8HPyiSe8asr2Q4 pMN1r8mKRnIsICWrrzke5tf30B+zlQy5KdNxqPb7bo7kkZIq33zqVn8IkFqXPI/cej/8 J7bIsAkNql1ESDs21pIGnykb+QBGT3kQyjOiLLuuMj+gVhoDLTuVGysq3YznvAF62l8n IRx/0oBpkhJBBZoupOLf3vnJSDLQRSHc4nPQ6cwZrRNU7UBJBa/ApAeWQnPU8J0mVGB+ 4e1g== X-Forwarded-Encrypted: i=1; AJvYcCVbM5CQM2NPMJVfG5lEaBEc36zwoSs5WdXcVgt5YHOjPUvxxzzgA50Ob3vVyEkIiRPz4OtSmNXX4MQIll2r@vger.kernel.org, AJvYcCW/6r3U6+vmrzcjUi550D7K/IzjCJcF3CG8aP1NZZTm0efRxJmVMbv1fNslVgaPWNnRSDNy2+9ZatPlk1Iuug==@vger.kernel.org, AJvYcCW7Xe4LnCt/MGfRV0oq9oH6XvzVSs/HX0cCYnF/JXwM1z0BsGUeLYEi9yiSOovteZdUPXl8fMkXE9tX@vger.kernel.org X-Gm-Message-State: AOJu0Ywpx8UOOSq370hQzeCO2EVO51XsT29xumHt2/7vjWTI5wpLQCmg BTwqq0q0KlxSihoSKzpypxUhsjXRpdK2ROeri3utd78BR/8iZrHIMlBOPp8= X-Google-Smtp-Source: AGHT+IGY+A9s9SjWk4b5NPP3XAPEx3OTtbYIMMdNEB/KbT7Th0cMQfmOsXEuaxzXlZ4o74MJdJw0Gw== X-Received: by 2002:a05:600c:4ed4:b0:42a:a92b:8e06 with SMTP id 5b1f17b1804b1-42c95ac1815mr93620855e9.4.1725835254592; Sun, 08 Sep 2024 15:40:54 -0700 (PDT) Received: from surface.home (2a01cb080508df00ca9665fffed23409.ipv6.abo.wanadoo.fr. [2a01:cb08:508:df00:ca96:65ff:fed2:3409]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca0600651sm90883925e9.32.2024.09.08.15.40.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Sep 2024 15:40:54 -0700 (PDT) From: =?UTF-8?q?J=C3=A9r=C3=B4me=20de=20Bretagne?= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maximilian Luz Subject: [PATCH v2 2/5] firmware: qcom: scm: Allow QSEECOM on Microsoft Surface Pro 9 5G Date: Mon, 9 Sep 2024 00:35:02 +0200 Message-ID: <20240908223505.21011-3-jerome.debretagne@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240908223505.21011-1-jerome.debretagne@gmail.com> References: <20240908223505.21011-1-jerome.debretagne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the SC8280XP-based Microsoft Surface Pro 9 5G to the allowlist. Reviewed-by: Konrad Dybcio Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Maximilian Luz --- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 00c379a3cceb..5c8d8d75fb0a 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1725,6 +1725,7 @@ EXPORT_SYMBOL_GPL(qcom_scm_qseecom_app_send); static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unus= ed =3D { { .compatible =3D "lenovo,flex-5g" }, { .compatible =3D "lenovo,thinkpad-x13s", }, + { .compatible =3D "microsoft,arcata", }, { .compatible =3D "qcom,sc8180x-primus" }, { .compatible =3D "qcom,x1e80100-crd" }, { .compatible =3D "qcom,x1e80100-qcp" }, --=20 2.45.2 From nobody Sat Nov 30 16:21:28 2024 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E57C17B4FF; Sun, 8 Sep 2024 22:40:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725835259; cv=none; b=oRU6MbXaNK2JIsit9VbbfOO5hpmEf0xzpxl6tjBtZkA6nsa0EcAPrc5YA39u0RuTSlhDcAG0eiH50YcxblecHF6htbkF/rzSP0hmc3yv7HarR/1mMIV7xJtOU9Z1oBBtrEGzaXrThO+sSAFwwtEmGyl2VtzGIRIlf2bdoC+vO2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725835259; c=relaxed/simple; bh=hcZiKAgo3FBKzCVElj4Xza/jyWOwWMjFKaTtDB123K4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Rw09qDQaeF17CbYKi6CuwKyYCRutx2PlZxf0zR9wz6cKgb6LrpCBVwigLZAMShgpsKHFTRxIeWYpsEcFQttdEa+F4zXezg/+NoJs1QGucHa9wyzz0w0KBuGM6r0elrp1g6rdu+ZLnDvYyXNbN9Xa43f/ggkazPaen4n7Om+FF9k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=cnslHzvY; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cnslHzvY" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-42ba9b47f4eso20935505e9.1; Sun, 08 Sep 2024 15:40:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1725835256; x=1726440056; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hPmjhdzlmLv7XWBXwHZtuCKijoRgDONoK6bLpinV7qw=; b=cnslHzvYsVjm2e58wQsig3Eplu8zm/T/VzLXD2J3Que47moiGYlMHfW4yAyN33p2lJ hUpMaXyrRDaHe+ZbwjKEJFPnKSWgqV+MxtoHUgMvZp7Wc81oXdw8Yftda+2H3PYE1GLH iqkmkIbdXFUl9c0MS7NWgQCc3zt5k5TCpDgDKuTcnKllGTb6iqxsPKfQRvOw+pJg0xOK q1d0GRgYdnDmrkId0QWw3TaWUFtAy5FUN9K4SnsZIf44mSkNE4V8Vm+qOBqmgKSPVbt6 qTuQvGBC8V4J5rXHrLfFLBlH26WfEm5ZZ+39s4+a1j4S7J3wgiw7rZ6P11qeEqXNkQqQ oQVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725835256; x=1726440056; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hPmjhdzlmLv7XWBXwHZtuCKijoRgDONoK6bLpinV7qw=; b=nIW1n0VreFOPATLo1jElHHVimTsbLU/Sqhq3VxlhEzROjAB66+iYbVICLiA9EPB5SA +2E5WVsNj5VTIa63I8pxrTxM9AndOthrpCEe6eMsW7CHgKyJGVswaS9x3BeWpMoA0t/0 stjELM+VA2hiiYPLS0Z9kbNhUPTC8ZeHFFRtBd5VdrgJ9MBstExWuP6QCRGneJIIaamh BFFocLWLPrWBxtYGpV1vxI7z+M0vk/I6gJ3YnE+GI+/M5/+lXxAURp8dGLWFyxaZB8Im O/rHgOpW7WpOfE/zX1Yv4xYWr9UJY3L57Hp/+8/Yg5oIJxDctlCB2dM6R8AdqGT43LeA sBNw== X-Forwarded-Encrypted: i=1; AJvYcCUtHUpp5thGxnnH2h7yHrjqdBxcA4FZgRNqkRAKUn/t4OA29kHaiB5zQd1ciqeAFd9Mkeg4jijJnjBiy6ZbGg==@vger.kernel.org, AJvYcCVXUU+bZGN7pM1m3tQO0Vg7gwV0C4jQVu1m9tqXuC1meuF74SXazhUdX1fhGgAiFDZW92V0cdvo3Itx1yqd@vger.kernel.org, AJvYcCWyGq6/bGACpiRXOx+A+Re4Q0kYjFDLvR6Bsv8HgSk6kcHCjxCS4mL664I7sDbeLEsFZonPuKgXFl70@vger.kernel.org X-Gm-Message-State: AOJu0YxmAbqaCMgG1iVXQj4AZFNKQWrWH5Hi5VukrVBGEOR9LxGNgTr+ Ka59zx1pnQuMopDkwnp0sCFdb/N+W6d26edNqd9YjDcZGPE9EvA= X-Google-Smtp-Source: AGHT+IG4DoloUS2yYvdscRNdOu3Wk54LOB6v/xrEvaRZ8ITPvM6N0lmvirwIIIzvTAizev8vwAwn5g== X-Received: by 2002:a05:600c:3501:b0:42c:b81b:c49c with SMTP id 5b1f17b1804b1-42cb81bc6demr6044475e9.10.1725835256181; Sun, 08 Sep 2024 15:40:56 -0700 (PDT) Received: from surface.home (2a01cb080508df00ca9665fffed23409.ipv6.abo.wanadoo.fr. [2a01:cb08:508:df00:ca96:65ff:fed2:3409]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca0600651sm90883925e9.32.2024.09.08.15.40.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Sep 2024 15:40:55 -0700 (PDT) From: =?UTF-8?q?J=C3=A9r=C3=B4me=20de=20Bretagne?= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maximilian Luz Subject: [PATCH v2 3/5] platform/surface: aggregator_registry: Add Surface Pro 9 5G Date: Mon, 9 Sep 2024 00:35:03 +0200 Message-ID: <20240908223505.21011-4-jerome.debretagne@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240908223505.21011-1-jerome.debretagne@gmail.com> References: <20240908223505.21011-1-jerome.debretagne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add SAM client device nodes for the Surface Pro 9 5G, with the usual battery/AC and HID nodes for keyboard and touchpad support. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Maximilian Luz --- .../surface/surface_aggregator_registry.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/platform/surface/surface_aggregator_registry.c b/drive= rs/platform/surface/surface_aggregator_registry.c index 25c8aa2131d6..8b34d7e465c2 100644 --- a/drivers/platform/surface/surface_aggregator_registry.c +++ b/drivers/platform/surface/surface_aggregator_registry.c @@ -390,6 +390,21 @@ static const struct software_node *ssam_node_group_sp9= [] =3D { NULL, }; =20 +/* Devices for Surface Pro 9 5G. */ +static const struct software_node *ssam_node_group_sp9_5G[] =3D { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_bat_ac, + &ssam_node_bat_main, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_kip_penstash, + &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_hid_sam_sensors, + &ssam_node_kip_tablet_switch, + NULL, +}; =20 /* -- SSAM platform/meta-hub driver. -------------------------------------= --- */ =20 @@ -462,6 +477,8 @@ static const struct acpi_device_id ssam_platform_hub_ac= pi_match[] =3D { MODULE_DEVICE_TABLE(acpi, ssam_platform_hub_acpi_match); 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[2a01:cb08:508:df00:ca96:65ff:fed2:3409]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca0600651sm90883925e9.32.2024.09.08.15.40.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Sep 2024 15:40:56 -0700 (PDT) From: =?UTF-8?q?J=C3=A9r=C3=B4me=20de=20Bretagne?= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maximilian Luz Subject: [PATCH v2 4/5] arm64: dts: qcom: sc8280xp: Add uart18 Date: Mon, 9 Sep 2024 00:35:04 +0200 Message-ID: <20240908223505.21011-5-jerome.debretagne@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240908223505.21011-1-jerome.debretagne@gmail.com> References: <20240908223505.21011-1-jerome.debretagne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the node describing uart18 for sc8280xp devices. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 48 ++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 14c3b1d6ad47..1e520113db07 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1013,6 +1013,24 @@ spi18: spi@888000 { status =3D "disabled"; }; =20 + uart18: serial@888000 { + compatible =3D "qcom,geni-uart"; + reg =3D <0 0x00888000 0 0x4000>; + clocks =3D <&gcc GCC_QUPV3_WRAP2_S2_CLK>; + clock-names =3D "se"; + interrupts =3D ; + operating-points-v2 =3D <&qup_opp_table_100mhz>; + power-domains =3D <&rpmhpd SC8280XP_CX>; + interconnects =3D <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_C= ORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names =3D "qup-core", "qup-config"; + + pinctrl-0 =3D <&qup_uart18_default>; + pinctrl-names =3D "default"; + + status =3D "disabled"; + }; + i2c19: i2c@88c000 { compatible =3D "qcom,geni-i2c"; reg =3D <0 0x0088c000 0 0x4000>; @@ -4957,6 +4975,36 @@ cci3_i2c1_sleep: cci3-i2c1-sleep-pins { bias-pull-down; }; }; + + qup_uart18_default: qup-uart18-default-state { + cts-pins { + pins =3D "gpio66"; + function =3D "qup18"; + drive-strength =3D <2>; + bias-disable; + }; + + rts-pins { + pins =3D "gpio67"; + function =3D "qup18"; + drive-strength =3D <2>; + bias-disable; + }; + + tx-pins { + pins =3D "gpio68"; + function =3D "qup18"; + drive-strength =3D <2>; + bias-disable; + }; + + rx-pins { + pins =3D "gpio69"; + function =3D "qup18"; + drive-strength =3D <2>; + bias-disable; + }; + }; }; =20 apps_smmu: iommu@15000000 { --=20 2.45.2 From nobody Sat Nov 30 16:21:28 2024 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 532D117CA0B; Sun, 8 Sep 2024 22:41:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[2a01:cb08:508:df00:ca96:65ff:fed2:3409]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca0600651sm90883925e9.32.2024.09.08.15.40.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Sep 2024 15:40:57 -0700 (PDT) From: =?UTF-8?q?J=C3=A9r=C3=B4me=20de=20Bretagne?= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Johan Hovold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Maximilian Luz , Krzysztof Kozlowski Subject: [PATCH v2 5/5] arm64: dts: qcom: sc8280xp: Add Microsoft Surface Pro 9 5G Date: Mon, 9 Sep 2024 00:35:05 +0200 Message-ID: <20240908223505.21011-6-jerome.debretagne@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240908223505.21011-1-jerome.debretagne@gmail.com> References: <20240908223505.21011-1-jerome.debretagne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add an initial devicetree for the Microsoft Surface Pro 9 5G, based on SC8280XP. It enables the support for Wi-Fi, NVMe, the two USB Type-C ports, Bluetooth, 5G cellular modem, audio output (via Bluetooth headsets or USB audio), external display via DisplayPort over Type-C (only the bottom USB Type-C port is working so far), charging, the Surface Aggregator Module (SAM) to get keyboard and touchpad working with Surface Type Cover accessories. Some key features not supported yet: - built-in display (but software fallback is working with efifb when blacklisting the msm module) - built-in display touchscreen - external display with the top USB Type-C port - speakers and microphones - physical volume up and down keys - LID switch detection This devicetree is based on the other SC8280XP ones, for the Lenovo ThinkPad X13s and the Qualcomm CRD. Reviewed-by: Krzysztof Kozlowski Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/sc8280xp-microsoft-arcata.dts | 1032 +++++++++++++++++ 2 files changed, 1033 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 0e5c810304fb..feebd1af5fe6 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sc8180x-lenovo-flex-5g.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sc8180x-primus.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sc8280xp-crd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sc8280xp-lenovo-thinkpad-x13s.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sc8280xp-microsoft-arcata.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sda660-inforce-ifc6560.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm450-lenovo-tbx605f.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm450-motorola-ali.dtb diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts new file mode 100644 index 000000000000..a31742471f51 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -0,0 +1,1032 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, J=C3=A9r=C3=B4me de Bretagne + */ + +/dts-v1/; + +#include +#include + +#include "sc8280xp.dtsi" +#include "sc8280xp-pmics.dtsi" + +/ { + model =3D "Microsoft Surface Pro 9 5G"; + compatible =3D "microsoft,arcata", "qcom,sc8280xp"; + + aliases { + serial0 =3D &uart18; + serial1 =3D &uart2; + }; + + wcd938x: audio-codec { + compatible =3D "qcom,wcd9380-codec"; + + pinctrl-0 =3D <&wcd_default>; + pinctrl-names =3D "default"; + + reset-gpios =3D <&tlmm 106 GPIO_ACTIVE_LOW>; + + vdd-buck-supply =3D <&vreg_s10b>; + vdd-rxtx-supply =3D <&vreg_s10b>; + vdd-io-supply =3D <&vreg_s10b>; + vdd-mic-bias-supply =3D <&vreg_bob>; + + qcom,micbias1-microvolt =3D <1800000>; + qcom,micbias2-microvolt =3D <1800000>; + qcom,micbias3-microvolt =3D <1800000>; + qcom,micbias4-microvolt =3D <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt =3D <75000 150000 237000 500000 5= 00000 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt =3D <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt =3D <50000>; + qcom,rx-device =3D <&wcd_rx>; + qcom,tx-device =3D <&wcd_tx>; + + #sound-dai-cells =3D <1>; + }; + + pmic-glink { + compatible =3D "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* Left-side top port */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_con0_hs: endpoint { + remote-endpoint =3D <&usb_0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_con0_ss: endpoint { + remote-endpoint =3D <&usb_0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_con0_sbu: endpoint { + remote-endpoint =3D <&usb0_sbu_mux>; + }; + }; + }; + }; + + /* Left-side bottom port */ + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_con1_hs: endpoint { + remote-endpoint =3D <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_con1_ss: endpoint { + remote-endpoint =3D <&usb_1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_con1_sbu: endpoint { + remote-endpoint =3D <&usb1_sbu_mux>; + }; + }; + }; + }; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VCC3_SSD"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 135 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VPH_VCC3R9"; + regulator-min-microvolt =3D <3900000>; + regulator-max-microvolt =3D <3900000>; + + regulator-always-on; + }; + + vreg_wlan: regulator-wlan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VCC_WLAN_3R9"; + regulator-min-microvolt =3D <3900000>; + regulator-max-microvolt =3D <3900000>; + + gpio =3D <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&hastings_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_wwan: regulator-wwan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VCC3B_WAN"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wwan_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + reserved-memory { + gpu_mem: gpu-mem@8bf00000 { + reg =3D <0 0x8bf00000 0 0x2000>; + no-map; + }; + + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; + + thermal-zones { + skin-temp-thermal { + polling-delay-passive =3D <250>; + + thermal-sensors =3D <&pmk8280_adc_tm 5>; + + trips { + skin_temp_alert0: trip-point0 { + temperature =3D <55000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + + skin_temp_alert1: trip-point1 { + temperature =3D <58000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + + skin-temp-crit { + temperature =3D <73000>; + hysteresis =3D <1000>; + type =3D "critical"; + }; + }; + + cooling-maps { + map0 { + trip =3D <&skin_temp_alert0>; + cooling-device =3D <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip =3D <&skin_temp_alert1>; + cooling-device =3D <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + usb0-sbu-mux { + compatible =3D "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 101 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 164 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_con0_sbu>; + }; + }; + }; + + usb1-sbu-mux { + compatible =3D "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 48 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 47 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb1_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb1_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_con1_sbu>; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8350-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-l1-l4-supply =3D <&vreg_s12b>; + vdd-l2-l7-supply =3D <&vreg_bob>; + vdd-l3-l5-supply =3D <&vreg_s11b>; + vdd-l6-l9-l10-supply =3D <&vreg_s12b>; + vdd-l8-supply =3D <&vreg_s12b>; + + vreg_s10b: smps10 { + regulator-name =3D "vreg_s10b"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_s11b: smps11 { + regulator-name =3D "vreg_s11b"; + regulator-min-microvolt =3D <1272000>; + regulator-max-microvolt =3D <1272000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_s12b: smps12 { + regulator-name =3D "vreg_s12b"; + regulator-min-microvolt =3D <984000>; + regulator-max-microvolt =3D <984000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l3b: ldo3 { + regulator-name =3D "vreg_l3b"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-boot-on; + }; + + vreg_l4b: ldo4 { + regulator-name =3D "vreg_l4b"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b: ldo6 { + regulator-name =3D "vreg_l6b"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + regulator-boot-on; + regulator-always-on; // FIXME: VDD_A_EDP_0_0P9 + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-bob-supply =3D <&vreg_vph_pwr>; + vdd-l1-l12-supply =3D <&vreg_s1c>; + vdd-l2-l8-supply =3D <&vreg_s1c>; + vdd-l3-l4-l5-l7-l13-supply =3D <&vreg_bob>; + vdd-l6-l9-l11-supply =3D <&vreg_bob>; + vdd-l10-supply =3D <&vreg_s11b>; + + vreg_s1c: smps1 { + regulator-name =3D "vreg_s1c"; + regulator-min-microvolt =3D <1880000>; + regulator-max-microvolt =3D <1900000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l1c: ldo1 { + regulator-name =3D "vreg_l1c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12c: ldo12 { + regulator-name =3D "vreg_l12c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l13c: ldo13 { + regulator-name =3D "vreg_l13c"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_bob: bob { + regulator-name =3D "vreg_bob"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + }; + + regulators-2 { + compatible =3D "qcom,pm8350-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-l4-supply =3D <&vreg_s11b>; + vdd-l2-l7-supply =3D <&vreg_bob>; + vdd-l3-l5-supply =3D <&vreg_s11b>; + vdd-l6-l9-l10-supply =3D <&vreg_s12b>; + vdd-l8-supply =3D <&vreg_s12b>; + + vreg_l3d: ldo3 { + regulator-name =3D "vreg_l3d"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l4d: ldo4 { + regulator-name =3D "vreg_l4d"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l6d: ldo6 { + regulator-name =3D "vreg_l6d"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l7d: ldo7 { + regulator-name =3D "vreg_l7d"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9d: ldo9 { + regulator-name =3D "vreg_l9d"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&dispcc0 { + status =3D "okay"; +}; + +&dispcc1 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; + + zap-shader { + memory-region =3D <&gpu_mem>; + firmware-name =3D "qcom/sc8280xp/MICROSOFT/SurfacePro9/qcdxkmsuc8280.mbn= "; + }; +}; + +&mdss0 { + status =3D "okay"; +}; + +&mdss0_dp0 { + status =3D "okay"; +}; + +&mdss0_dp0_out { + data-lanes =3D <0 1>; + remote-endpoint =3D <&usb_0_qmpphy_dp_in>; +}; + +&mdss0_dp1 { + status =3D "okay"; +}; + +&mdss0_dp1_out { + data-lanes =3D <0 1>; + remote-endpoint =3D <&usb_1_qmpphy_dp_in>; +}; + +&pcie2a { + perst-gpios =3D <&tlmm 143 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 145 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply =3D <&vreg_nvme>; + + pinctrl-0 =3D <&pcie2a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie2a_phy { + vdda-phy-supply =3D <&vreg_l6d>; + vdda-pll-supply =3D <&vreg_l4d>; + + status =3D "okay"; +}; + +&pcie3a { + perst-gpios =3D <&tlmm 151 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply =3D <&vreg_wwan>; + + pinctrl-0 =3D <&pcie3a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie3a_phy { + vdda-phy-supply =3D <&vreg_l6d>; + vdda-pll-supply =3D <&vreg_l4d>; + + status =3D "okay"; +}; + +&pcie4 { + max-link-speed =3D <2>; + + perst-gpios =3D <&tlmm 141 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 139 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply =3D <&vreg_wlan>; + + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_port0 { + wifi@0 { + compatible =3D "pci17cb,1103"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + qcom,ath11k-calibration-variant =3D "MS_SP9_5G"; + }; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l6d>; + vdda-pll-supply =3D <&vreg_l4d>; + + status =3D "okay"; +}; + +&pmk8280_pon_pwrkey { + status =3D "okay"; +}; + +&pmk8280_pon_resin { + status =3D "okay"; +}; + +&pmk8280_rtc { + nvmem-cells =3D <&rtc_offset>; + nvmem-cell-names =3D "offset"; + + status =3D "okay"; +}; + +&pmk8280_sdam_6 { + status =3D "okay"; + + rtc_offset: rtc-offset@bc { + reg =3D <0xbc 0x4>; + }; +}; + +&qup0 { + status =3D "okay"; +}; + +&qup1 { + status =3D "okay"; +}; + +&qup2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/sc8280xp/MICROSOFT/SurfacePro9/qcadsp8280.mbn"; + + status =3D "okay"; +}; + +&remoteproc_nsp0 { + firmware-name =3D "qcom/sc8280xp/MICROSOFT/SurfacePro9/qccdsp8280.mbn"; + + status =3D "okay"; +}; + +&rxmacro { + status =3D "okay"; +}; + +&sound { + compatible =3D "qcom,sc8280xp-sndcard"; + model =3D "SC8280XP-MICROSOFT-SURFACE-PRO-9-5G"; + audio-routing =3D "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC2", "MIC BIAS2", + "VA DMIC0", "MIC BIAS1", + "VA DMIC1", "MIC BIAS1", + "VA DMIC2", "MIC BIAS3", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", + "TX SWR_ADC1", "ADC2_OUTPUT"; + + wcd-playback-dai-link { + link-name =3D "WCD Playback"; + + cpu { + sound-dai =3D <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai =3D <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wcd-capture-dai-link { + link-name =3D "WCD Capture"; + + cpu { + sound-dai =3D <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + codec { + sound-dai =3D <&wcd938x 1>, <&swr2 0>, <&txmacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai =3D <&swr0 0>, <&wsamacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + + codec { + sound-dai =3D <&vamacro 0>; + }; + }; +}; + +&swr0 { + status =3D "okay"; +}; + +&swr1 { + status =3D "okay"; + + wcd_rx: codec@0,4 { + compatible =3D "sdw20217010d00"; + reg =3D <0 4>; + qcom,rx-port-mapping =3D <1 2 3 4 5>; + }; +}; + +&swr2 { + status =3D "okay"; + + wcd_tx: codec@0,3 { + compatible =3D "sdw20217010d00"; + reg =3D <0 3>; + qcom,tx-port-mapping =3D <1 1 2 3>; + }; +}; + +&txmacro { + status =3D "okay"; +}; + +&uart2 { + pinctrl-0 =3D <&uart2_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn6855-bt"; + + vddio-supply =3D <&vreg_s10b>; + vddbtcxmx-supply =3D <&vreg_s12b>; + vddrfacmn-supply =3D <&vreg_s12b>; + vddrfa0p8-supply =3D <&vreg_s12b>; + vddrfa1p2-supply =3D <&vreg_s11b>; + vddrfa1p7-supply =3D <&vreg_s1c>; + + max-speed =3D <3200000>; + + enable-gpios =3D <&tlmm 133 GPIO_ACTIVE_HIGH>; + swctrl-gpios =3D <&tlmm 132 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&bt_default>; + pinctrl-names =3D "default"; + }; +}; + +&uart18 { + status =3D "okay"; + + embedded-controller { + compatible =3D "microsoft,surface-sam"; + + interrupts-extended =3D <&tlmm 85 IRQ_TYPE_EDGE_RISING>; + + current-speed =3D <4000000>; + + pinctrl-0 =3D <&ssam_state>; + pinctrl-names =3D "default"; + }; +}; + +&usb_0 { + status =3D "okay"; +}; + +&usb_0_dwc3 { + dr_mode =3D "host"; +}; + +&usb_0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_con0_hs>; +}; + +&usb_0_hsphy { + vdda-pll-supply =3D <&vreg_l9d>; + vdda18-supply =3D <&vreg_l1c>; + vdda33-supply =3D <&vreg_l7d>; + + status =3D "okay"; +}; + +&usb_0_qmpphy { + vdda-phy-supply =3D <&vreg_l9d>; + vdda-pll-supply =3D <&vreg_l4d>; + + orientation-switch; + + status =3D "okay"; +}; + +&usb_0_qmpphy_dp_in { + remote-endpoint =3D <&mdss0_dp0_out>; +}; + +&usb_0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_con0_ss>; +}; + +&usb_1 { + status =3D "okay"; +}; + +&usb_1_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_con1_hs>; +}; + +&usb_1_hsphy { + vdda-pll-supply =3D <&vreg_l4b>; + vdda18-supply =3D <&vreg_l1c>; + vdda33-supply =3D <&vreg_l13c>; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l4b>; + vdda-pll-supply =3D <&vreg_l3b>; + + orientation-switch; + + status =3D "okay"; +}; + +&usb_1_qmpphy_dp_in { + remote-endpoint =3D <&mdss0_dp1_out>; +}; + +&usb_1_qmpphy_out { + remote-endpoint =3D <&pmic_glink_con1_ss>; +}; + +&vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>; + pinctrl-names =3D "default"; + + vdd-micb-supply =3D <&vreg_s10b>; + + qcom,dmic-sample-rate =3D <4800000>; + + status =3D "okay"; +}; + +&wsamacro { + status =3D "okay"; +}; + +&xo_board_clk { + clock-frequency =3D <38400000>; +}; + +/* PINCTRL */ + +&lpass_tlmm { + status =3D "okay"; +}; + +&pmc8280_2_gpios { + wwan_sw_en: wwan-sw-en-state { + pins =3D "gpio1"; + function =3D "normal"; + }; +}; + +&pmr735a_gpios { + hastings_reg_en: hastings-reg-en-state { + pins =3D "gpio1"; + function =3D "normal"; + }; +}; + +&tlmm { + bt_default: bt-default-state { + hstp-bt-en-pins { + pins =3D "gpio133"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + hstp-sw-ctrl-pins { + pins =3D "gpio132"; + function =3D "gpio"; + bias-pull-down; + }; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio135"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie2a_default: pcie2a-default-state { + clkreq-n-pins { + pins =3D "gpio142"; + function =3D "pcie2a_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio143"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio145"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie3a_default: pcie3a-default-state { + clkreq-n-pins { + pins =3D "gpio150"; + function =3D "pcie3a_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio151"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio140"; + function =3D "pcie4_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio141"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio139"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + + ssam_state: ssam-state-state { + pins =3D "gpio85"; + function =3D "gpio"; + bias-disable; + }; + + uart2_default: uart2-default-state { + cts-pins { + pins =3D "gpio121"; + function =3D "qup2"; + bias-bus-hold; + }; + + rts-pins { + pins =3D "gpio122"; + function =3D "qup2"; + drive-strength =3D <2>; + bias-disable; + }; + + rx-pins { + pins =3D "gpio124"; + function =3D "qup2"; + bias-pull-up; + }; + + tx-pins { + pins =3D "gpio123"; + function =3D "qup2"; + drive-strength =3D <2>; + bias-disable; + }; + }; + + usb0_sbu_default: usb0-sbu-state { + oe-n-pins { + pins =3D "gpio101"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <16>; + output-high; + }; + + sel-pins { + pins =3D "gpio164"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <16>; + }; + }; + + usb1_sbu_default: usb1-sbu-state { + oe-n-pins { + pins =3D "gpio48"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <16>; + output-high; + }; + + sel-pins { + pins =3D "gpio47"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <16>; + }; + }; + + wcd_default: wcd-default-state { + reset-pins { + pins =3D "gpio106"; + function =3D "gpio"; + bias-disable; + }; + }; +}; --=20 2.45.2