From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FA2A194A42; Thu, 5 Sep 2024 08:07:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523656; cv=none; b=GUW4aicZJZ1l4HbtVVMMgI6+P2vl3+pVkbCD7mSxbr0foAiONd214slLvRVQi5eRtI7wCVTm7MFLN7s8xL/aj5sbETA2ZLt/O6sGIIapWvNwOM4FKFwPPKg6CKBvN6FHQltyEu3vytJ6tcaYsbCUB77ltGZadueXCSiM6PIO5lw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523656; c=relaxed/simple; bh=xAVcagYKeai1L5aDpWrNMHA0kV8FWN6WneX4kRW678s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=UJiday2FpQYXHbnru19LuHfw1gvzcr1X2uDlbPN/lqYQQW5UF+y34htdg4eOUiiXevC36u8UselxArpA2DQkyhVy1B4RanVl7F+xPP+C2MTjUjMWqjfEDcziiZ+zxIzCGDBedjtnpMCGVImdG6bSO5mLRSzi+67g8q7QWQqnPU0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=T3RrpA8g; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="T3RrpA8g" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523655; x=1757059655; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=xAVcagYKeai1L5aDpWrNMHA0kV8FWN6WneX4kRW678s=; b=T3RrpA8gAJ+OCJmHHM3IkrvaaJi/R6a0JPOfqMDk7P+Kz4K5riUzosma hT+1qA30iuGZZag8tt1/757gyr8tiXYarwmLo/akljfR13MEkzO/g2tpd BbZfdohhZ+Ak1ngFalR0VHfOq38JtJjGQBHa8ZJPEorB+2lyfd8v6+2Xi eq0fl1+PfRpwCxcXsfs0x3LxQ5GUlVvGHzQprJJKwsavRapcd2ML5denz p+zbeXlExFDBjAvz2uxCV/si1h/MEAa5ltCbFW0tIer1ojqZcqAOuLPuB h/3ef20HlxIsbSkGzwtRhtWlDBLdlTm03D0W3/ubcq4icetc5+jQ+kZXD w==; X-CSE-ConnectionGUID: rESGLHboTQ606MdHMphuVg== X-CSE-MsgGUID: AJ5fZx6XSVaQmx4VSPL0qw== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="198790964" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:33 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:06:54 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:06:52 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:29 +0200 Subject: [PATCH net-next 01/12] net: lan966x: select FDMA library Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-1-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Select the newly introduced FDMA library. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- drivers/net/ethernet/microchip/lan966x/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/microchip/lan966x/Kconfig b/drivers/net/e= thernet/microchip/lan966x/Kconfig index f9ebffc04eb8..f663b6e12466 100644 --- a/drivers/net/ethernet/microchip/lan966x/Kconfig +++ b/drivers/net/ethernet/microchip/lan966x/Kconfig @@ -8,6 +8,7 @@ config LAN966X_SWITCH select PHYLINK select PAGE_POOL select VCAP + select FDMA help This driver supports the Lan966x network switch device. =20 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77E9E624; Thu, 5 Sep 2024 08:07:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523635; cv=none; b=A1h15CnuShQF5ymJrHalSwlMnXr9PQYtX/BCOcLmjtoYSBHX5wZzUDXHqCC0AwGJwis1NHj+xFpZWzOl6joRoyZTG4VSpKFzcrcJjakszs2XXflTD9NqGNSDwJnK2TeE4NZnGZkJolhAziDDBBTphTJy58BQud9Me0dKtZVvBag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523635; c=relaxed/simple; bh=9/2NK3fiU5FVn7kEatxMhteu1DvnEpCUVjmCvWlytZ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=aUZMx0Tj6+7MScuxz2lXMmNgcdk5doOzbG9BVh3dzflbKAJd1u3M/mwhrshMvpUKRLxwPnqcB6XPSPSGcnC6Q6lU1PbXdtZtyfl/Fx6rkBz0dWVpA20gbkoKTEsoTXXqilcuQ1baya1p78rfihiazlfqevxf1AJFds0WYSctvpM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=bM9At9ZT; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="bM9At9ZT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523633; x=1757059633; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=9/2NK3fiU5FVn7kEatxMhteu1DvnEpCUVjmCvWlytZ8=; b=bM9At9ZTsKTCTpo65cCA9YMddZxY62U/1sKOvbj4v9rwLqLobZ/REhcT YQLy01ln63TnNg/Id5Y4AJomoI9z83qw9XeyNEv/hLUJHzOE1rNys7Cak ffUUMVda1kIz1JrVKasR/EkLhgQN/vOMpsDjmfYyJdMr3aF1xm7dMZSVz yB3dDFu/8C7XTaaWY0nN2opGimGY+k2JaNadUZ7zfCxPYDjX7pkuNBkwV xaGs/FQKLvv/pF7LugQFN24f2P+0hCjLDFwWtBMoWuC7COnJ1yflQ7u/9 imLAsltKZZXTsysmpW8ykIPEisnPgzYS2lkgAZBez4oj6onXkAZ+0AS80 w==; X-CSE-ConnectionGUID: un5sTwBcTQSB1/6lZ6FYYg== X-CSE-MsgGUID: nWdClQQlSd2JzQm/EI25ww== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="32000381" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:12 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:06:57 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:06:55 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:30 +0200 Subject: [PATCH net-next 02/12] net: lan966x: use FDMA library symbols Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-2-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Include and use the new FDMA header, which now provides the required masks and bit offsets for operating on the DCB's and DB's. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- drivers/net/ethernet/microchip/lan966x/Makefile | 1 + drivers/net/ethernet/microchip/lan966x/lan966x_main.h | 10 +--------- 2 files changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/Makefile b/drivers/net/= ethernet/microchip/lan966x/Makefile index 3b6ac331691d..4cdbe263502c 100644 --- a/drivers/net/ethernet/microchip/lan966x/Makefile +++ b/drivers/net/ethernet/microchip/lan966x/Makefile @@ -20,3 +20,4 @@ lan966x-switch-$(CONFIG_DEBUG_FS) +=3D lan966x_vcap_debug= fs.o =20 # Provide include files ccflags-y +=3D -I$(srctree)/drivers/net/ethernet/microchip/vcap +ccflags-y +=3D -I$(srctree)/drivers/net/ethernet/microchip/fdma diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/driver= s/net/ethernet/microchip/lan966x/lan966x_main.h index f8bebbcf77b2..4d2aa775fbfd 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h @@ -16,6 +16,7 @@ #include #include =20 +#include #include #include =20 @@ -76,15 +77,6 @@ =20 #define FDMA_RX_DCB_MAX_DBS 1 #define FDMA_TX_DCB_MAX_DBS 1 -#define FDMA_DCB_INFO_DATAL(x) ((x) & GENMASK(15, 0)) - -#define FDMA_DCB_STATUS_BLOCKL(x) ((x) & GENMASK(15, 0)) -#define FDMA_DCB_STATUS_SOF BIT(16) -#define FDMA_DCB_STATUS_EOF BIT(17) -#define FDMA_DCB_STATUS_INTR BIT(18) -#define FDMA_DCB_STATUS_DONE BIT(19) -#define FDMA_DCB_STATUS_BLOCKO(x) (((x) << 20) & GENMASK(31, 20)) -#define FDMA_DCB_INVALID_DATA 0x1 =20 #define FDMA_XTR_CHANNEL 6 #define FDMA_INJ_CHANNEL 0 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7680017BEC3; Thu, 5 Sep 2024 08:07:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523637; cv=none; b=ucyo5nl2fjiV5k85wNl4EmxJK5FHe4uCFzm2WLu1HEHiIGDTnjgORdhRwtPxDEZv3WKizO2OfftJ52VUefdTVvO4QOUC8MJNjWbiwIHP7dQ47PPzjSz7DYfU+Wf0l2zuNF8OFmA4q/C9JktK7j51wgLE3V0NaynJSVV9lpTGrWE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523637; c=relaxed/simple; bh=CIQC+Ngpksj3MzY0MT6B9MJaRA8pVyw9VqjGyo8+pvw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=exhUEp856HjqD4fArho6bPWA5Xf+3Yt69RcIoqPhKz3drfdgIZlnFDBxTT3OhbxALmiClviW5psNbkJJg1+2QhdibJnVgCfK1F6Tzab+8RYyZldH8Bwyi6GFZJsFvdXPgnRHHAT9IHtt7aWM4HR1gjwqRBtW8mwCaWHzXcQT5E4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=2YdYY9vk; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="2YdYY9vk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523634; x=1757059634; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=CIQC+Ngpksj3MzY0MT6B9MJaRA8pVyw9VqjGyo8+pvw=; b=2YdYY9vkBa5OqU+kPB2eeXcOoY9yupC82YchzWE1s88irWWr8ZvqZNC5 azv4txY3sLl8saiDMz0uBThDBVXxc3YMkdaO36Cf79wxDHDTlh9NiLNIc FmwgXd1ZReu2WLLJd4eaXC4/XFz8W+XlzoET+aiLtCE8vHz6jCcoT+m9X F4Pj/J5RCKUKLHHcwNlR9zZx0YKYuQbxsqZtCYR1YPjoNyYp42WnSgs/D VbUwhJQx6mZ02dBlT+pg8VxTZZ4/9bb95BIeOS78I8YVRRfKJjcUEMHl4 NR/IC41ux8VBk8A9TZDyMFRyPSbt6dnIQbi3vx9s0jwf6zXUIE5nSDD6h w==; X-CSE-ConnectionGUID: un5sTwBcTQSB1/6lZ6FYYg== X-CSE-MsgGUID: BN0vGI4ZQ6eO+6H3cx6oFA== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="32000382" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:12 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:06:59 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:06:57 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:31 +0200 Subject: [PATCH net-next 03/12] net: lan966x: replace a few variables with new equivalent ones Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-3-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Replace the old rx and tx variables: channel_id, FDMA_DCB_MAX, FDMA_RX_DCB_MAX_DBS, FDMA_TX_DCB_MAX_DBS, dcb_index and db_index with the equivalents from the FDMA rx and tx structs. These variables are not entangled in any buffer allocation and can therefore be replaced in advance. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 131 ++++++++++++-----= ---- .../net/ethernet/microchip/lan966x/lan966x_main.h | 19 +-- 2 files changed, 81 insertions(+), 69 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 3960534ac2ad..b64f04ff99a8 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -27,10 +27,11 @@ static struct page *lan966x_fdma_rx_alloc_page(struct l= an966x_rx *rx, =20 static void lan966x_fdma_rx_free_pages(struct lan966x_rx *rx) { + struct fdma *fdma =3D &rx->fdma; int i, j; =20 - for (i =3D 0; i < FDMA_DCB_MAX; ++i) { - for (j =3D 0; j < FDMA_RX_DCB_MAX_DBS; ++j) + for (i =3D 0; i < fdma->n_dcbs; ++i) { + for (j =3D 0; j < fdma->n_dbs; ++j) page_pool_put_full_page(rx->page_pool, rx->page[i][j], false); } @@ -38,9 +39,10 @@ static void lan966x_fdma_rx_free_pages(struct lan966x_rx= *rx) =20 static void lan966x_fdma_rx_free_page(struct lan966x_rx *rx) { + struct fdma *fdma =3D &rx->fdma; struct page *page; =20 - page =3D rx->page[rx->dcb_index][rx->db_index]; + page =3D rx->page[fdma->dcb_index][fdma->db_index]; if (unlikely(!page)) return; =20 @@ -51,10 +53,11 @@ static void lan966x_fdma_rx_add_dcb(struct lan966x_rx *= rx, struct lan966x_rx_dcb *dcb, u64 nextptr) { + struct fdma *fdma =3D &rx->fdma; struct lan966x_db *db; int i; =20 - for (i =3D 0; i < FDMA_RX_DCB_MAX_DBS; ++i) { + for (i =3D 0; i < fdma->n_dbs; ++i) { db =3D &dcb->db[i]; db->status =3D FDMA_DCB_STATUS_INTR; } @@ -72,7 +75,7 @@ static int lan966x_fdma_rx_alloc_page_pool(struct lan966x= _rx *rx) struct page_pool_params pp_params =3D { .order =3D rx->page_order, .flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV, - .pool_size =3D FDMA_DCB_MAX, + .pool_size =3D rx->fdma.n_dcbs, .nid =3D NUMA_NO_NODE, .dev =3D lan966x->dev, .dma_dir =3D DMA_FROM_DEVICE, @@ -104,6 +107,7 @@ static int lan966x_fdma_rx_alloc_page_pool(struct lan96= 6x_rx *rx) static int lan966x_fdma_rx_alloc(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; + struct fdma *fdma =3D &rx->fdma; struct lan966x_rx_dcb *dcb; struct lan966x_db *db; struct page *page; @@ -114,7 +118,7 @@ static int lan966x_fdma_rx_alloc(struct lan966x_rx *rx) return PTR_ERR(rx->page_pool); =20 /* calculate how many pages are needed to allocate the dcbs */ - size =3D sizeof(struct lan966x_rx_dcb) * FDMA_DCB_MAX; + size =3D sizeof(struct lan966x_rx_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); =20 rx->dcbs =3D dma_alloc_coherent(lan966x->dev, size, &rx->dma, GFP_KERNEL); @@ -122,16 +126,16 @@ static int lan966x_fdma_rx_alloc(struct lan966x_rx *r= x) return -ENOMEM; =20 rx->last_entry =3D rx->dcbs; - rx->db_index =3D 0; - rx->dcb_index =3D 0; + fdma->db_index =3D 0; + fdma->dcb_index =3D 0; =20 /* Now for each dcb allocate the dbs */ - for (i =3D 0; i < FDMA_DCB_MAX; ++i) { + for (i =3D 0; i < fdma->n_dcbs; ++i) { dcb =3D &rx->dcbs[i]; dcb->info =3D 0; =20 /* For each db allocate a page and map it to the DB dataptr. */ - for (j =3D 0; j < FDMA_RX_DCB_MAX_DBS; ++j) { + for (j =3D 0; j < fdma->n_dbs; ++j) { db =3D &dcb->db[j]; page =3D lan966x_fdma_rx_alloc_page(rx, db); if (!page) @@ -149,17 +153,20 @@ static int lan966x_fdma_rx_alloc(struct lan966x_rx *r= x) =20 static void lan966x_fdma_rx_advance_dcb(struct lan966x_rx *rx) { - rx->dcb_index++; - rx->dcb_index &=3D FDMA_DCB_MAX - 1; + struct fdma *fdma =3D &rx->fdma; + + fdma->dcb_index++; + fdma->dcb_index &=3D fdma->n_dcbs - 1; } =20 static void lan966x_fdma_rx_free(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; + struct fdma *fdma =3D &rx->fdma; u32 size; =20 /* Now it is possible to do the cleanup of dcb */ - size =3D sizeof(struct lan966x_tx_dcb) * FDMA_DCB_MAX; + size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); dma_free_coherent(lan966x->dev, size, rx->dcbs, rx->dma); } @@ -167,21 +174,22 @@ static void lan966x_fdma_rx_free(struct lan966x_rx *r= x) static void lan966x_fdma_rx_start(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; + struct fdma *fdma =3D &rx->fdma; u32 mask; =20 /* When activating a channel, first is required to write the first DCB * address and then to activate it */ lan_wr(lower_32_bits((u64)rx->dma), lan966x, - FDMA_DCB_LLP(rx->channel_id)); + FDMA_DCB_LLP(fdma->channel_id)); lan_wr(upper_32_bits((u64)rx->dma), lan966x, - FDMA_DCB_LLP1(rx->channel_id)); + FDMA_DCB_LLP1(fdma->channel_id)); =20 - lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(FDMA_RX_DCB_MAX_DBS) | + lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) | FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) | FDMA_CH_CFG_CH_INJ_PORT_SET(0) | FDMA_CH_CFG_CH_MEM_SET(1), - lan966x, FDMA_CH_CFG(rx->channel_id)); + lan966x, FDMA_CH_CFG(fdma->channel_id)); =20 /* Start fdma */ lan_rmw(FDMA_PORT_CTRL_XTR_STOP_SET(0), @@ -191,13 +199,13 @@ static void lan966x_fdma_rx_start(struct lan966x_rx *= rx) /* Enable interrupts */ mask =3D lan_rd(lan966x, FDMA_INTR_DB_ENA); mask =3D FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(mask); - mask |=3D BIT(rx->channel_id); + mask |=3D BIT(fdma->channel_id); lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask), FDMA_INTR_DB_ENA_INTR_DB_ENA, lan966x, FDMA_INTR_DB_ENA); =20 /* Activate the channel */ - lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(rx->channel_id)), + lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)), FDMA_CH_ACTIVATE_CH_ACTIVATE, lan966x, FDMA_CH_ACTIVATE); } @@ -205,18 +213,19 @@ static void lan966x_fdma_rx_start(struct lan966x_rx *= rx) static void lan966x_fdma_rx_disable(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; + struct fdma *fdma =3D &rx->fdma; u32 val; =20 /* Disable the channel */ - lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(rx->channel_id)), + lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)), FDMA_CH_DISABLE_CH_DISABLE, lan966x, FDMA_CH_DISABLE); =20 readx_poll_timeout_atomic(lan966x_fdma_channel_active, lan966x, - val, !(val & BIT(rx->channel_id)), + val, !(val & BIT(fdma->channel_id)), READL_SLEEP_US, READL_TIMEOUT_US); =20 - lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(rx->channel_id)), + lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)), FDMA_CH_DB_DISCARD_DB_DISCARD, lan966x, FDMA_CH_DB_DISCARD); } @@ -225,7 +234,7 @@ static void lan966x_fdma_rx_reload(struct lan966x_rx *r= x) { struct lan966x *lan966x =3D rx->lan966x; =20 - lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(rx->channel_id)), + lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(rx->fdma.channel_id)), FDMA_CH_RELOAD_CH_RELOAD, lan966x, FDMA_CH_RELOAD); } @@ -240,28 +249,29 @@ static void lan966x_fdma_tx_add_dcb(struct lan966x_tx= *tx, static int lan966x_fdma_tx_alloc(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; + struct fdma *fdma =3D &tx->fdma; struct lan966x_tx_dcb *dcb; struct lan966x_db *db; int size; int i, j; =20 - tx->dcbs_buf =3D kcalloc(FDMA_DCB_MAX, sizeof(struct lan966x_tx_dcb_buf), + tx->dcbs_buf =3D kcalloc(fdma->n_dcbs, sizeof(struct lan966x_tx_dcb_buf), GFP_KERNEL); if (!tx->dcbs_buf) return -ENOMEM; =20 /* calculate how many pages are needed to allocate the dcbs */ - size =3D sizeof(struct lan966x_tx_dcb) * FDMA_DCB_MAX; + size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); tx->dcbs =3D dma_alloc_coherent(lan966x->dev, size, &tx->dma, GFP_KERNEL); if (!tx->dcbs) goto out; =20 /* Now for each dcb allocate the db */ - for (i =3D 0; i < FDMA_DCB_MAX; ++i) { + for (i =3D 0; i < fdma->n_dcbs; ++i) { dcb =3D &tx->dcbs[i]; =20 - for (j =3D 0; j < FDMA_TX_DCB_MAX_DBS; ++j) { + for (j =3D 0; j < fdma->n_dbs; ++j) { db =3D &dcb->db[j]; db->dataptr =3D 0; db->status =3D 0; @@ -280,11 +290,12 @@ static int lan966x_fdma_tx_alloc(struct lan966x_tx *t= x) static void lan966x_fdma_tx_free(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; + struct fdma *fdma =3D &tx->fdma; int size; =20 kfree(tx->dcbs_buf); =20 - size =3D sizeof(struct lan966x_tx_dcb) * FDMA_DCB_MAX; + size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); dma_free_coherent(lan966x->dev, size, tx->dcbs, tx->dma); } @@ -292,21 +303,22 @@ static void lan966x_fdma_tx_free(struct lan966x_tx *t= x) static void lan966x_fdma_tx_activate(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; + struct fdma *fdma =3D &tx->fdma; u32 mask; =20 /* When activating a channel, first is required to write the first DCB * address and then to activate it */ lan_wr(lower_32_bits((u64)tx->dma), lan966x, - FDMA_DCB_LLP(tx->channel_id)); + FDMA_DCB_LLP(fdma->channel_id)); lan_wr(upper_32_bits((u64)tx->dma), lan966x, - FDMA_DCB_LLP1(tx->channel_id)); + FDMA_DCB_LLP1(fdma->channel_id)); =20 - lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(FDMA_TX_DCB_MAX_DBS) | + lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) | FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) | FDMA_CH_CFG_CH_INJ_PORT_SET(0) | FDMA_CH_CFG_CH_MEM_SET(1), - lan966x, FDMA_CH_CFG(tx->channel_id)); + lan966x, FDMA_CH_CFG(fdma->channel_id)); =20 /* Start fdma */ lan_rmw(FDMA_PORT_CTRL_INJ_STOP_SET(0), @@ -316,13 +328,13 @@ static void lan966x_fdma_tx_activate(struct lan966x_t= x *tx) /* Enable interrupts */ mask =3D lan_rd(lan966x, FDMA_INTR_DB_ENA); mask =3D FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(mask); - mask |=3D BIT(tx->channel_id); + mask |=3D BIT(fdma->channel_id); lan_rmw(FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(mask), FDMA_INTR_DB_ENA_INTR_DB_ENA, lan966x, FDMA_INTR_DB_ENA); =20 /* Activate the channel */ - lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(tx->channel_id)), + lan_rmw(FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(BIT(fdma->channel_id)), FDMA_CH_ACTIVATE_CH_ACTIVATE, lan966x, FDMA_CH_ACTIVATE); } @@ -330,18 +342,19 @@ static void lan966x_fdma_tx_activate(struct lan966x_t= x *tx) static void lan966x_fdma_tx_disable(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; + struct fdma *fdma =3D &tx->fdma; u32 val; =20 /* Disable the channel */ - lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(tx->channel_id)), + lan_rmw(FDMA_CH_DISABLE_CH_DISABLE_SET(BIT(fdma->channel_id)), FDMA_CH_DISABLE_CH_DISABLE, lan966x, FDMA_CH_DISABLE); =20 readx_poll_timeout_atomic(lan966x_fdma_channel_active, lan966x, - val, !(val & BIT(tx->channel_id)), + val, !(val & BIT(fdma->channel_id)), READL_SLEEP_US, READL_TIMEOUT_US); =20 - lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(tx->channel_id)), + lan_rmw(FDMA_CH_DB_DISCARD_DB_DISCARD_SET(BIT(fdma->channel_id)), FDMA_CH_DB_DISCARD_DB_DISCARD, lan966x, FDMA_CH_DB_DISCARD); =20 @@ -354,7 +367,7 @@ static void lan966x_fdma_tx_reload(struct lan966x_tx *t= x) struct lan966x *lan966x =3D tx->lan966x; =20 /* Write the registers to reload the channel */ - lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(tx->channel_id)), + lan_rmw(FDMA_CH_RELOAD_CH_RELOAD_SET(BIT(tx->fdma.channel_id)), FDMA_CH_RELOAD_CH_RELOAD, lan966x, FDMA_CH_RELOAD); } @@ -402,7 +415,7 @@ static void lan966x_fdma_tx_clear_buf(struct lan966x *l= an966x, int weight) xdp_frame_bulk_init(&bq); =20 spin_lock_irqsave(&lan966x->tx_lock, flags); - for (i =3D 0; i < FDMA_DCB_MAX; ++i) { + for (i =3D 0; i < tx->fdma.n_dcbs; ++i) { dcb_buf =3D &tx->dcbs_buf[i]; =20 if (!dcb_buf->used) @@ -451,10 +464,11 @@ static void lan966x_fdma_tx_clear_buf(struct lan966x = *lan966x, int weight) =20 static bool lan966x_fdma_rx_more_frames(struct lan966x_rx *rx) { + struct fdma *fdma =3D &rx->fdma; struct lan966x_db *db; =20 /* Check if there is any data */ - db =3D &rx->dcbs[rx->dcb_index].db[rx->db_index]; + db =3D &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; if (unlikely(!(db->status & FDMA_DCB_STATUS_DONE))) return false; =20 @@ -464,12 +478,13 @@ static bool lan966x_fdma_rx_more_frames(struct lan966= x_rx *rx) static int lan966x_fdma_rx_check_frame(struct lan966x_rx *rx, u64 *src_por= t) { struct lan966x *lan966x =3D rx->lan966x; + struct fdma *fdma =3D &rx->fdma; struct lan966x_port *port; struct lan966x_db *db; struct page *page; =20 - db =3D &rx->dcbs[rx->dcb_index].db[rx->db_index]; - page =3D rx->page[rx->dcb_index][rx->db_index]; + db =3D &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; + page =3D rx->page[fdma->dcb_index][fdma->db_index]; if (unlikely(!page)) return FDMA_ERROR; =20 @@ -494,14 +509,15 @@ static struct sk_buff *lan966x_fdma_rx_get_frame(stru= ct lan966x_rx *rx, u64 src_port) { struct lan966x *lan966x =3D rx->lan966x; + struct fdma *fdma =3D &rx->fdma; struct lan966x_db *db; struct sk_buff *skb; struct page *page; u64 timestamp; =20 /* Get the received frame and unmap it */ - db =3D &rx->dcbs[rx->dcb_index].db[rx->db_index]; - page =3D rx->page[rx->dcb_index][rx->db_index]; + db =3D &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; + page =3D rx->page[fdma->dcb_index][fdma->db_index]; =20 skb =3D build_skb(page_address(page), PAGE_SIZE << rx->page_order); if (unlikely(!skb)) @@ -546,16 +562,18 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) { struct lan966x *lan966x =3D container_of(napi, struct lan966x, napi); struct lan966x_rx *rx =3D &lan966x->rx; - int dcb_reload =3D rx->dcb_index; struct lan966x_rx_dcb *old_dcb; + struct fdma *fdma =3D &rx->fdma; + int dcb_reload, counter =3D 0; struct lan966x_db *db; bool redirect =3D false; struct sk_buff *skb; struct page *page; - int counter =3D 0; u64 src_port; u64 nextptr; =20 + dcb_reload =3D fdma->dcb_index; + lan966x_fdma_tx_clear_buf(lan966x, weight); =20 /* Get all received skb */ @@ -594,16 +612,16 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) =20 allocate_new: /* Allocate new pages and map them */ - while (dcb_reload !=3D rx->dcb_index) { - db =3D &rx->dcbs[dcb_reload].db[rx->db_index]; + while (dcb_reload !=3D fdma->dcb_index) { + db =3D &rx->dcbs[dcb_reload].db[fdma->db_index]; page =3D lan966x_fdma_rx_alloc_page(rx, db); if (unlikely(!page)) break; - rx->page[dcb_reload][rx->db_index] =3D page; + rx->page[dcb_reload][fdma->db_index] =3D page; =20 old_dcb =3D &rx->dcbs[dcb_reload]; dcb_reload++; - dcb_reload &=3D FDMA_DCB_MAX - 1; + dcb_reload &=3D fdma->n_dcbs - 1; =20 nextptr =3D rx->dma + ((unsigned long)old_dcb - (unsigned long)rx->dcbs); @@ -650,9 +668,10 @@ irqreturn_t lan966x_fdma_irq_handler(int irq, void *ar= gs) static int lan966x_fdma_get_next_dcb(struct lan966x_tx *tx) { struct lan966x_tx_dcb_buf *dcb_buf; + struct fdma *fdma =3D &tx->fdma; int i; =20 - for (i =3D 0; i < FDMA_DCB_MAX; ++i) { + for (i =3D 0; i < fdma->n_dcbs; ++i) { dcb_buf =3D &tx->dcbs_buf[i]; if (!dcb_buf->used && i !=3D tx->last_in_use) return i; @@ -931,7 +950,7 @@ static int lan966x_fdma_reload(struct lan966x *lan966x,= int new_mtu) goto restore; lan966x_fdma_rx_start(&lan966x->rx); =20 - size =3D sizeof(struct lan966x_rx_dcb) * FDMA_DCB_MAX; + size =3D sizeof(struct lan966x_rx_dcb) * lan966x->rx.fdma.n_dcbs; size =3D ALIGN(size, PAGE_SIZE); dma_free_coherent(lan966x->dev, size, rx_dcbs, rx_dma); =20 @@ -1034,10 +1053,14 @@ int lan966x_fdma_init(struct lan966x *lan966x) return 0; =20 lan966x->rx.lan966x =3D lan966x; - lan966x->rx.channel_id =3D FDMA_XTR_CHANNEL; + lan966x->rx.fdma.channel_id =3D FDMA_XTR_CHANNEL; + lan966x->rx.fdma.n_dcbs =3D FDMA_DCB_MAX; + lan966x->rx.fdma.n_dbs =3D FDMA_RX_DCB_MAX_DBS; lan966x->rx.max_mtu =3D lan966x_fdma_get_max_frame(lan966x); lan966x->tx.lan966x =3D lan966x; - lan966x->tx.channel_id =3D FDMA_INJ_CHANNEL; + lan966x->tx.fdma.channel_id =3D FDMA_INJ_CHANNEL; + lan966x->tx.fdma.n_dcbs =3D FDMA_DCB_MAX; + lan966x->tx.fdma.n_dbs =3D FDMA_TX_DCB_MAX_DBS; lan966x->tx.last_in_use =3D -1; =20 err =3D lan966x_fdma_rx_alloc(&lan966x->rx); diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/driver= s/net/ethernet/microchip/lan966x/lan966x_main.h index 4d2aa775fbfd..fb9d8e00fe69 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h @@ -211,6 +211,8 @@ struct lan966x_tx_dcb { struct lan966x_rx { struct lan966x *lan966x; =20 + struct fdma fdma; + /* Pointer to the array of hardware dcbs. */ struct lan966x_rx_dcb *dcbs; =20 @@ -220,17 +222,6 @@ struct lan966x_rx { /* For each DB, there is a page */ struct page *page[FDMA_DCB_MAX][FDMA_RX_DCB_MAX_DBS]; =20 - /* Represents the db_index, it can have a value between 0 and - * FDMA_RX_DCB_MAX_DBS, once it reaches the value of FDMA_RX_DCB_MAX_DBS - * it means that the DCB can be reused. - */ - int db_index; - - /* Represents the index in the dcbs. It has a value between 0 and - * FDMA_DCB_MAX - */ - int dcb_index; - /* Represents the dma address to the dcbs array */ dma_addr_t dma; =20 @@ -244,8 +235,6 @@ struct lan966x_rx { */ u32 max_mtu; =20 - u8 channel_id; - struct page_pool *page_pool; }; =20 @@ -267,6 +256,8 @@ struct lan966x_tx_dcb_buf { struct lan966x_tx { struct lan966x *lan966x; =20 + struct fdma fdma; + /* Pointer to the dcb list */ struct lan966x_tx_dcb *dcbs; u16 last_in_use; @@ -277,8 +268,6 @@ struct lan966x_tx { /* Array of dcbs that are given to the HW */ struct lan966x_tx_dcb_buf *dcbs_buf; =20 - u8 channel_id; - bool activated; }; =20 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D348C194139; Thu, 5 Sep 2024 08:07:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523638; cv=none; b=AxynbwC4HVspI9BsfHSFrUosnA4eJy+mayxUCO+2okRS6J1veMA8FRhI1+UvFxMVzwcTQ92PrI+bvJlV85bwxP+xEmLFQsV5C67LckugIsDVr5/i2roKkqxwz9s3Najyc9JJ2ZK5byM6RTXIiLaeyybFafG/aN6P0JjxEN8HO6k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523638; c=relaxed/simple; bh=hxJf7Pk6otSAvbcNvXLGkZ++6B9nqGnLXJWk2e87P64=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=ShdjyNqgYFhIiCaTIq3lxrnIF3ETEOVGt5m0o+4aesj3lwEWMe9pxL7eufIyxkksDFGFgjpc+AeCAC7W/7cKA/KRgO0SDMcMHb8nhhYq9atEFSkC11w79zxETWnxcuRdZwP6IDkAAULAVOIfgv+lehTHOlqwMEkR7k5fl9NtK2Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=l+nOXx3L; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="l+nOXx3L" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523636; x=1757059636; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=hxJf7Pk6otSAvbcNvXLGkZ++6B9nqGnLXJWk2e87P64=; b=l+nOXx3L5rqrK0jM072/dBcihbfUgeZBlV6rphYSFAJ+/HWAYLxC2Run dCcWyJj7ZXNzXc9O5vav+jaxyn9Y2cPWCFFJnrJ5L4dreTvijr0fboUej SIH8h7gn8sWZHmS2pNTKd3l5wgScsHnGOWSirfR42lpvufqWNJaaH1+nh Fzh9pNcReQfZ+yWtgLEiSsgIJqnuEQEOpKPRYa1TPkDwMcei94fkoknUL rQ5DBCwN3UMBD+RL30R8kArBP3ZuJ3MegYG+yUk/aKjfVXxeBM5a0ILdR aZUB3+xOAK+VT3UC3/xRrDbcTq3/GVwVRVNFDtOiSwLGnoiXV9OHOVf9z w==; X-CSE-ConnectionGUID: un5sTwBcTQSB1/6lZ6FYYg== X-CSE-MsgGUID: df0rpq7BQtuCCAFK+GBFnw== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="32000383" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:13 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:02 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:00 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:32 +0200 Subject: [PATCH net-next 04/12] net: lan966x: use the FDMA library for allocation of rx buffers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-4-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Use the two functions: fdma_alloc_phys() and fdma_dcb_init() for rx buffer allocation and use the new buffers throughout. In order to replace the old buffers with the new ones, we have to do the following refactoring: - use fdma_alloc_phys() and fdma_dcb_init() - replace the variables: rx->dma, rx->dcbs and rx->last_entry with the equivalents from the FDMA struct. - make use of fdma->db_size for rx buffer size. - add lan966x_fdma_rx_dataptr_cb callback for obtaining the dataptr. - Initialize FDMA struct values. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 116 ++++++++++-------= ---- .../net/ethernet/microchip/lan966x/lan966x_main.h | 15 --- 2 files changed, 55 insertions(+), 76 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index b64f04ff99a8..99d09c97737e 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -6,13 +6,30 @@ =20 #include "lan966x_main.h" =20 +static int lan966x_fdma_rx_dataptr_cb(struct fdma *fdma, int dcb, int db, + u64 *dataptr) +{ + struct lan966x *lan966x =3D (struct lan966x *)fdma->priv; + struct lan966x_rx *rx =3D &lan966x->rx; + struct page *page; + + page =3D page_pool_dev_alloc_pages(rx->page_pool); + if (unlikely(!page)) + return -ENOMEM; + + rx->page[dcb][db] =3D page; + *dataptr =3D page_pool_get_dma_addr(page) + XDP_PACKET_HEADROOM; + + return 0; +} + static int lan966x_fdma_channel_active(struct lan966x *lan966x) { return lan_rd(lan966x, FDMA_CH_ACTIVE); } =20 static struct page *lan966x_fdma_rx_alloc_page(struct lan966x_rx *rx, - struct lan966x_db *db) + struct fdma_db *db) { struct page *page; =20 @@ -50,11 +67,11 @@ static void lan966x_fdma_rx_free_page(struct lan966x_rx= *rx) } =20 static void lan966x_fdma_rx_add_dcb(struct lan966x_rx *rx, - struct lan966x_rx_dcb *dcb, + struct fdma_dcb *dcb, u64 nextptr) { struct fdma *fdma =3D &rx->fdma; - struct lan966x_db *db; + struct fdma_db *db; int i; =20 for (i =3D 0; i < fdma->n_dbs; ++i) { @@ -65,8 +82,8 @@ static void lan966x_fdma_rx_add_dcb(struct lan966x_rx *rx, dcb->nextptr =3D FDMA_DCB_INVALID_DATA; dcb->info =3D FDMA_DCB_INFO_DATAL(PAGE_SIZE << rx->page_order); =20 - rx->last_entry->nextptr =3D nextptr; - rx->last_entry =3D dcb; + fdma->last_dcb->nextptr =3D nextptr; + fdma->last_dcb =3D dcb; } =20 static int lan966x_fdma_rx_alloc_page_pool(struct lan966x_rx *rx) @@ -108,45 +125,17 @@ static int lan966x_fdma_rx_alloc(struct lan966x_rx *r= x) { struct lan966x *lan966x =3D rx->lan966x; struct fdma *fdma =3D &rx->fdma; - struct lan966x_rx_dcb *dcb; - struct lan966x_db *db; - struct page *page; - int i, j; - int size; + int err; =20 if (lan966x_fdma_rx_alloc_page_pool(rx)) return PTR_ERR(rx->page_pool); =20 - /* calculate how many pages are needed to allocate the dcbs */ - size =3D sizeof(struct lan966x_rx_dcb) * fdma->n_dcbs; - size =3D ALIGN(size, PAGE_SIZE); - - rx->dcbs =3D dma_alloc_coherent(lan966x->dev, size, &rx->dma, GFP_KERNEL); - if (!rx->dcbs) - return -ENOMEM; - - rx->last_entry =3D rx->dcbs; - fdma->db_index =3D 0; - fdma->dcb_index =3D 0; - - /* Now for each dcb allocate the dbs */ - for (i =3D 0; i < fdma->n_dcbs; ++i) { - dcb =3D &rx->dcbs[i]; - dcb->info =3D 0; - - /* For each db allocate a page and map it to the DB dataptr. */ - for (j =3D 0; j < fdma->n_dbs; ++j) { - db =3D &dcb->db[j]; - page =3D lan966x_fdma_rx_alloc_page(rx, db); - if (!page) - return -ENOMEM; - - db->status =3D 0; - rx->page[i][j] =3D page; - } + err =3D fdma_alloc_coherent(lan966x->dev, fdma); + if (err) + return err; =20 - lan966x_fdma_rx_add_dcb(rx, dcb, rx->dma + sizeof(*dcb) * i); - } + fdma_dcbs_init(fdma, FDMA_DCB_INFO_DATAL(fdma->db_size), + FDMA_DCB_STATUS_INTR); =20 return 0; } @@ -168,7 +157,7 @@ static void lan966x_fdma_rx_free(struct lan966x_rx *rx) /* Now it is possible to do the cleanup of dcb */ size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); - dma_free_coherent(lan966x->dev, size, rx->dcbs, rx->dma); + dma_free_coherent(lan966x->dev, size, fdma->dcbs, fdma->dma); } =20 static void lan966x_fdma_rx_start(struct lan966x_rx *rx) @@ -180,9 +169,9 @@ static void lan966x_fdma_rx_start(struct lan966x_rx *rx) /* When activating a channel, first is required to write the first DCB * address and then to activate it */ - lan_wr(lower_32_bits((u64)rx->dma), lan966x, + lan_wr(lower_32_bits((u64)fdma->dma), lan966x, FDMA_DCB_LLP(fdma->channel_id)); - lan_wr(upper_32_bits((u64)rx->dma), lan966x, + lan_wr(upper_32_bits((u64)fdma->dma), lan966x, FDMA_DCB_LLP1(fdma->channel_id)); =20 lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) | @@ -297,7 +286,7 @@ static void lan966x_fdma_tx_free(struct lan966x_tx *tx) =20 size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); - dma_free_coherent(lan966x->dev, size, tx->dcbs, tx->dma); + dma_free_coherent(lan966x->dev, size, fdma->dcbs, fdma->dma); } =20 static void lan966x_fdma_tx_activate(struct lan966x_tx *tx) @@ -465,10 +454,10 @@ static void lan966x_fdma_tx_clear_buf(struct lan966x = *lan966x, int weight) static bool lan966x_fdma_rx_more_frames(struct lan966x_rx *rx) { struct fdma *fdma =3D &rx->fdma; - struct lan966x_db *db; + struct fdma_db *db; =20 /* Check if there is any data */ - db =3D &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; + db =3D &fdma->dcbs[fdma->dcb_index].db[fdma->db_index]; if (unlikely(!(db->status & FDMA_DCB_STATUS_DONE))) return false; =20 @@ -480,10 +469,10 @@ static int lan966x_fdma_rx_check_frame(struct lan966x= _rx *rx, u64 *src_port) struct lan966x *lan966x =3D rx->lan966x; struct fdma *fdma =3D &rx->fdma; struct lan966x_port *port; - struct lan966x_db *db; + struct fdma_db *db; struct page *page; =20 - db =3D &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; + db =3D &fdma->dcbs[fdma->dcb_index].db[fdma->db_index]; page =3D rx->page[fdma->dcb_index][fdma->db_index]; if (unlikely(!page)) return FDMA_ERROR; @@ -510,16 +499,16 @@ static struct sk_buff *lan966x_fdma_rx_get_frame(stru= ct lan966x_rx *rx, { struct lan966x *lan966x =3D rx->lan966x; struct fdma *fdma =3D &rx->fdma; - struct lan966x_db *db; struct sk_buff *skb; + struct fdma_db *db; struct page *page; u64 timestamp; =20 /* Get the received frame and unmap it */ - db =3D &rx->dcbs[fdma->dcb_index].db[fdma->db_index]; + db =3D &fdma->dcbs[fdma->dcb_index].db[fdma->db_index]; page =3D rx->page[fdma->dcb_index][fdma->db_index]; =20 - skb =3D build_skb(page_address(page), PAGE_SIZE << rx->page_order); + skb =3D build_skb(page_address(page), fdma->db_size); if (unlikely(!skb)) goto free_page; =20 @@ -562,12 +551,12 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) { struct lan966x *lan966x =3D container_of(napi, struct lan966x, napi); struct lan966x_rx *rx =3D &lan966x->rx; - struct lan966x_rx_dcb *old_dcb; struct fdma *fdma =3D &rx->fdma; int dcb_reload, counter =3D 0; - struct lan966x_db *db; + struct fdma_dcb *old_dcb; bool redirect =3D false; struct sk_buff *skb; + struct fdma_db *db; struct page *page; u64 src_port; u64 nextptr; @@ -613,18 +602,18 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) allocate_new: /* Allocate new pages and map them */ while (dcb_reload !=3D fdma->dcb_index) { - db =3D &rx->dcbs[dcb_reload].db[fdma->db_index]; + db =3D &fdma->dcbs[dcb_reload].db[fdma->db_index]; page =3D lan966x_fdma_rx_alloc_page(rx, db); if (unlikely(!page)) break; rx->page[dcb_reload][fdma->db_index] =3D page; =20 - old_dcb =3D &rx->dcbs[dcb_reload]; + old_dcb =3D &fdma->dcbs[dcb_reload]; dcb_reload++; dcb_reload &=3D fdma->n_dcbs - 1; =20 - nextptr =3D rx->dma + ((unsigned long)old_dcb - - (unsigned long)rx->dcbs); + nextptr =3D fdma->dma + ((unsigned long)old_dcb - + (unsigned long)fdma->dcbs); lan966x_fdma_rx_add_dcb(rx, old_dcb, nextptr); lan966x_fdma_rx_reload(rx); } @@ -933,8 +922,8 @@ static int lan966x_fdma_reload(struct lan966x *lan966x,= int new_mtu) int err; =20 /* Store these for later to free them */ - rx_dma =3D lan966x->rx.dma; - rx_dcbs =3D lan966x->rx.dcbs; + rx_dma =3D lan966x->rx.fdma.dma; + rx_dcbs =3D lan966x->rx.fdma.dcbs; page_pool =3D lan966x->rx.page_pool; =20 napi_synchronize(&lan966x->napi); @@ -950,7 +939,7 @@ static int lan966x_fdma_reload(struct lan966x *lan966x,= int new_mtu) goto restore; lan966x_fdma_rx_start(&lan966x->rx); =20 - size =3D sizeof(struct lan966x_rx_dcb) * lan966x->rx.fdma.n_dcbs; + size =3D sizeof(struct fdma_dcb) * lan966x->rx.fdma.n_dcbs; size =3D ALIGN(size, PAGE_SIZE); dma_free_coherent(lan966x->dev, size, rx_dcbs, rx_dma); =20 @@ -962,8 +951,8 @@ static int lan966x_fdma_reload(struct lan966x *lan966x,= int new_mtu) return err; restore: lan966x->rx.page_pool =3D page_pool; - lan966x->rx.dma =3D rx_dma; - lan966x->rx.dcbs =3D rx_dcbs; + lan966x->rx.fdma.dma =3D rx_dma; + lan966x->rx.fdma.dcbs =3D rx_dcbs; lan966x_fdma_rx_start(&lan966x->rx); =20 return err; @@ -1056,6 +1045,11 @@ int lan966x_fdma_init(struct lan966x *lan966x) lan966x->rx.fdma.channel_id =3D FDMA_XTR_CHANNEL; lan966x->rx.fdma.n_dcbs =3D FDMA_DCB_MAX; lan966x->rx.fdma.n_dbs =3D FDMA_RX_DCB_MAX_DBS; + lan966x->rx.fdma.priv =3D lan966x; + lan966x->rx.fdma.size =3D fdma_get_size(&lan966x->rx.fdma); + lan966x->rx.fdma.db_size =3D PAGE_SIZE << lan966x->rx.page_order; + lan966x->rx.fdma.ops.nextptr_cb =3D &fdma_nextptr_cb; + lan966x->rx.fdma.ops.dataptr_cb =3D &lan966x_fdma_rx_dataptr_cb; lan966x->rx.max_mtu =3D lan966x_fdma_get_max_frame(lan966x); lan966x->tx.lan966x =3D lan966x; lan966x->tx.fdma.channel_id =3D FDMA_INJ_CHANNEL; diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/driver= s/net/ethernet/microchip/lan966x/lan966x_main.h index fb9d8e00fe69..8edb5ea484ee 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h @@ -196,12 +196,6 @@ struct lan966x_db { u64 status; }; =20 -struct lan966x_rx_dcb { - u64 nextptr; - u64 info; - struct lan966x_db db[FDMA_RX_DCB_MAX_DBS]; -}; - struct lan966x_tx_dcb { u64 nextptr; u64 info; @@ -213,18 +207,9 @@ struct lan966x_rx { =20 struct fdma fdma; =20 - /* Pointer to the array of hardware dcbs. */ - struct lan966x_rx_dcb *dcbs; - - /* Pointer to the last address in the dcbs. */ - struct lan966x_rx_dcb *last_entry; - /* For each DB, there is a page */ struct page *page[FDMA_DCB_MAX][FDMA_RX_DCB_MAX_DBS]; =20 - /* Represents the dma address to the dcbs array */ - dma_addr_t dma; - /* Represents the page order that is used to allocate the pages for the * RX buffers. This value is calculated based on max MTU of the devices. */ --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 971AD194A48; Thu, 5 Sep 2024 08:07:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523638; cv=none; b=nztbZL2dzb9Hs+h97HyQ7uUlMGAZm9tudQz9faAlHRcdHOHJncyRwD4zzXj5qULuqrGdg0kzi+rmx1SikSpavDtxYZo9ncJDzIj2RTPWFx4NVHqtrenw0u+pAVEDwYYx58mpBnsB5JITH4mVxSbGOYteP/8Cs+77yzn/aP7E2bw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523638; c=relaxed/simple; bh=WdqZWltClNsHkHBP3ox2/SslUl+vy/i1I7VtXRdpTJI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=CG8xa7QDsAJaezkBdjVRJppfF2O9s4mqYkjIztkZ6d3v1XbHAjed2nwDIJrNvZkWsNzwn9zJ4sDBxFN/stZXDq93i1srDyb9yle8BFGs6E4F/4ZkV3ubqg3RPy9C24px3b/SjmptGAnItI9k5kYKAQaqdcV75Hc7yXh9sUQZisc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=UxobY6O+; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="UxobY6O+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523636; x=1757059636; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=WdqZWltClNsHkHBP3ox2/SslUl+vy/i1I7VtXRdpTJI=; b=UxobY6O+SLWgXwZk83ZvP5+JDHFL++gAANEGvnAaSSMRjv8nY6M8VYIQ 0E3CeJyPBANVvyBrMZEkp1eInJIViqCx0nIKJyDJk5cJ++mH8NOtsETbu 24ZMv6lLS3WuDwv3ygstlex2qIh5rZKljDM/6xH+g8/0GP3FdaqusfExh 18K6a9FJg+aczI10DVSDEgOO0DlENhqE011DD4dgDAxHl5JXmvNTktEWa T4082pt3WxAX2yFduRqNLZkD7h4ryAG2+JL9UUcwtydd85+m/Q3DfQ7Wy Jzeya6+x2SLz0gHV+uHCsddKGmHXJIg4Jn6u/mlQ31QR7OFrrBV+RDynN A==; X-CSE-ConnectionGUID: un5sTwBcTQSB1/6lZ6FYYg== X-CSE-MsgGUID: kXFlxhY2TVybLHqxUJYj4w== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="32000384" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:13 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:04 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:02 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:33 +0200 Subject: [PATCH net-next 05/12] net: lan966x: use FDMA library for adding DCB's in the rx path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-5-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Use the fdma_dcb_add() function to add DCB's in the rx path. This gets rid of the open-coding of nextptr and dataptr handling and the functions for adding DCB's. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 54 ++----------------= ---- 1 file changed, 5 insertions(+), 49 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 99d09c97737e..b85b15ca2052 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -28,20 +28,6 @@ static int lan966x_fdma_channel_active(struct lan966x *l= an966x) return lan_rd(lan966x, FDMA_CH_ACTIVE); } =20 -static struct page *lan966x_fdma_rx_alloc_page(struct lan966x_rx *rx, - struct fdma_db *db) -{ - struct page *page; - - page =3D page_pool_dev_alloc_pages(rx->page_pool); - if (unlikely(!page)) - return NULL; - - db->dataptr =3D page_pool_get_dma_addr(page) + XDP_PACKET_HEADROOM; - - return page; -} - static void lan966x_fdma_rx_free_pages(struct lan966x_rx *rx) { struct fdma *fdma =3D &rx->fdma; @@ -66,26 +52,6 @@ static void lan966x_fdma_rx_free_page(struct lan966x_rx = *rx) page_pool_recycle_direct(rx->page_pool, page); } =20 -static void lan966x_fdma_rx_add_dcb(struct lan966x_rx *rx, - struct fdma_dcb *dcb, - u64 nextptr) -{ - struct fdma *fdma =3D &rx->fdma; - struct fdma_db *db; - int i; - - for (i =3D 0; i < fdma->n_dbs; ++i) { - db =3D &dcb->db[i]; - db->status =3D FDMA_DCB_STATUS_INTR; - } - - dcb->nextptr =3D FDMA_DCB_INVALID_DATA; - dcb->info =3D FDMA_DCB_INFO_DATAL(PAGE_SIZE << rx->page_order); - - fdma->last_dcb->nextptr =3D nextptr; - fdma->last_dcb =3D dcb; -} - static int lan966x_fdma_rx_alloc_page_pool(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; @@ -551,15 +517,11 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) { struct lan966x *lan966x =3D container_of(napi, struct lan966x, napi); struct lan966x_rx *rx =3D &lan966x->rx; + int old_dcb, dcb_reload, counter =3D 0; struct fdma *fdma =3D &rx->fdma; - int dcb_reload, counter =3D 0; - struct fdma_dcb *old_dcb; bool redirect =3D false; struct sk_buff *skb; - struct fdma_db *db; - struct page *page; u64 src_port; - u64 nextptr; =20 dcb_reload =3D fdma->dcb_index; =20 @@ -602,19 +564,13 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) allocate_new: /* Allocate new pages and map them */ while (dcb_reload !=3D fdma->dcb_index) { - db =3D &fdma->dcbs[dcb_reload].db[fdma->db_index]; - page =3D lan966x_fdma_rx_alloc_page(rx, db); - if (unlikely(!page)) - break; - rx->page[dcb_reload][fdma->db_index] =3D page; - - old_dcb =3D &fdma->dcbs[dcb_reload]; + old_dcb =3D dcb_reload; dcb_reload++; dcb_reload &=3D fdma->n_dcbs - 1; =20 - nextptr =3D fdma->dma + ((unsigned long)old_dcb - - (unsigned long)fdma->dcbs); - lan966x_fdma_rx_add_dcb(rx, old_dcb, nextptr); + fdma_dcb_add(fdma, old_dcb, FDMA_DCB_INFO_DATAL(fdma->db_size), + FDMA_DCB_STATUS_INTR); + lan966x_fdma_rx_reload(rx); } =20 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66AFB194C62; Thu, 5 Sep 2024 08:07:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523670; cv=none; b=A8E+Ab3r7KiUzZgSyREIRTAs7QSk99wphP7926UKiHZk7a/GXclfMgRMC7QSfAKMaTEzClb2DHpN4eAjzXSgYzf/y3ZEDukF5/IXgfnpgicpSuAm93Ac3LZib0e/TrGfHeDPDIcASp+9+eBXzHq6T+VK9TZG0ZtP7ndF0DwNqFY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523670; c=relaxed/simple; bh=4EHbVjgrbM4gptUSpJ4jRNEvyauzVndDJ1t4bEyXPak=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=EhO+1pqtpYrkCcCHUyAeRRho7vAQdRpiNCfNkYiileurum/ybPXYPvnRfQn1BsDjctduaS1lS0ped9UrDvzgVknDSK9XGgFP8gAcsaMPYlucXYs5gVw+UZZkZp7BBOak5WEoWemC6BuYgCVEsFnzAiwXmDGlgOuwCWUqgK2RA48= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=bmQlvThO; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="bmQlvThO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523668; x=1757059668; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=4EHbVjgrbM4gptUSpJ4jRNEvyauzVndDJ1t4bEyXPak=; b=bmQlvThOYIED79UzkZ4MiCb1hmsuaXSUDR8GxL24mgJ+cvMdqYegunG/ /XNN8NALz4eELKg+sQsMgtZwVhmd/Q34QCIQPvgpQPih1XbQOhbp+xDX6 Rge3p1fnoyzFdCUVk6zaX71Z2Ok35xyglMa40A8II5UHil0dUSWOB9vzy Y3MZc4MtOf819VGCW/qDgJnhFPvlpAOkz4i0CsZVol3xBL7h2OIhfYveN 53+RT+jEzkMt6r55gpjeZAzgOrP3taoez+ICbmB0rGiCmaVxL7QZS8Ax+ VexZ7dYxNZ6D3xgilurXjTI79kAeim4T4p8FeDGpOMwq03OJpfhfAszks w==; X-CSE-ConnectionGUID: 7ewQ9CGBRIuJm60AkmofCw== X-CSE-MsgGUID: WKsBOpblQGWUnCN9VrytPw== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="34454184" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:47 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:07 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:05 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:34 +0200 Subject: [PATCH net-next 06/12] net: lan966x: use library helper for freeing rx buffers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-6-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev The library has the helper fdma_free_phys() for freeing physical FDMA memory. Use it in the exit path. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index b85b15ca2052..627806a10674 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -114,18 +114,6 @@ static void lan966x_fdma_rx_advance_dcb(struct lan966x= _rx *rx) fdma->dcb_index &=3D fdma->n_dcbs - 1; } =20 -static void lan966x_fdma_rx_free(struct lan966x_rx *rx) -{ - struct lan966x *lan966x =3D rx->lan966x; - struct fdma *fdma =3D &rx->fdma; - u32 size; - - /* Now it is possible to do the cleanup of dcb */ - size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; - size =3D ALIGN(size, PAGE_SIZE); - dma_free_coherent(lan966x->dev, size, fdma->dcbs, fdma->dma); -} - static void lan966x_fdma_rx_start(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; @@ -1019,7 +1007,7 @@ int lan966x_fdma_init(struct lan966x *lan966x) =20 err =3D lan966x_fdma_tx_alloc(&lan966x->tx); if (err) { - lan966x_fdma_rx_free(&lan966x->rx); + fdma_free_coherent(lan966x->dev, &lan966x->rx.fdma); return err; } =20 @@ -1040,7 +1028,7 @@ void lan966x_fdma_deinit(struct lan966x *lan966x) napi_disable(&lan966x->napi); =20 lan966x_fdma_rx_free_pages(&lan966x->rx); - lan966x_fdma_rx_free(&lan966x->rx); + fdma_free_coherent(lan966x->dev, &lan966x->rx.fdma); page_pool_destroy(lan966x->rx.page_pool); lan966x_fdma_tx_free(&lan966x->tx); } --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 319241991B4; Thu, 5 Sep 2024 08:07:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523670; cv=none; b=kMtZ8j2Q7pJdhKGTHdrBXl/s3LcgXBR3iOb6Z1RkpjlSJCsucGDv7EkNfI3IAvme0lG/VV9SI1i2C5zHEWiqYBBCe4biCQF2lbz/pJWdZqo+JV8zouHa608/WlhhfK2CxiuZlpCXDXsU9KsMD1znpokXbdHgRPHIiCFG6q9ZWK0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523670; c=relaxed/simple; bh=GLt2F6bBkswP8PhABvzG/5XUJcLw1iB4PPTJQ6Ssxz0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=iWRS/Y/afGSqbhHRnNQDrrIkOQ7tBTLAo6jPNum93ZhgA7SoRukAoGL8pxGOkpDcLHoqtQV6No0CrNibiviQr/70OwK9LBL5KuCYkFMJiUU7gLkmyTADLhCtRrXxcBIsjGr5nXJ7Ag65CkQin041aBOvExDAye7hbzbCzXEvyBQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=lkZWGFwR; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="lkZWGFwR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523669; x=1757059669; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=GLt2F6bBkswP8PhABvzG/5XUJcLw1iB4PPTJQ6Ssxz0=; b=lkZWGFwRrya0rh5I6bxBdjmsz2YPEJGsSDdFGy6cS6hKmT+IYYWcfGUC cRSQ6K4foki2R4YtXQoKpWCbqTVmQdUYfR06STyJHBvYrYl5bVjwvKdAB UEV+Cls1j3R1XzxE0xi/nbezKyFWXH50B5Xh1KnDeSaP89VyGf3Z9812s xM8c7YKZ4LCMveO6pQQDMcXYs7IQLM5bnspggdwdzZWiiSmESp5QGbgof KBGAcqB1Mh3NEuaMjnuhU/lLzzDliQTgbeO2sglQOFfBhCQ6xSco8CBo9 /Yb8XA6RH3yI91b6s9SprkWkQUjc7qZcF8zvCT8G/Nc4GucI2TEz90yJy Q==; X-CSE-ConnectionGUID: 7ewQ9CGBRIuJm60AkmofCw== X-CSE-MsgGUID: EPqxG7qeSDmyWDGl3k00kQ== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="34454185" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:47 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:09 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:07 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:35 +0200 Subject: [PATCH net-next 07/12] net: lan966x: use the FDMA library for allocation of tx buffers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-7-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Use the two functions: fdma_alloc_phys() and fdma_dcb_init() for rx buffer allocation and use the new buffers throughout. In order to replace the old buffers with the new ones, we have to do the following refactoring: - use fdma_alloc_phys() and fdma_dcb_init() - replace the variables: tx->dma, tx->dcbs and tx->curr_entry with the equivalents from the FDMA struct. - add lan966x_fdma_tx_dataptr_cb callback for obtaining the dataptr. - Initialize FDMA struct values. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 75 ++++++++++--------= ---- .../net/ethernet/microchip/lan966x/lan966x_main.h | 16 ----- 2 files changed, 34 insertions(+), 57 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 627806a10674..3afc6c4c68a4 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -23,6 +23,16 @@ static int lan966x_fdma_rx_dataptr_cb(struct fdma *fdma,= int dcb, int db, return 0; } =20 +static int lan966x_fdma_tx_dataptr_cb(struct fdma *fdma, int dcb, int db, + u64 *dataptr) +{ + struct lan966x *lan966x =3D (struct lan966x *)fdma->priv; + + *dataptr =3D lan966x->tx.dcbs_buf[dcb].dma_addr; + + return 0; +} + static int lan966x_fdma_channel_active(struct lan966x *lan966x) { return lan_rd(lan966x, FDMA_CH_ACTIVE); @@ -182,46 +192,22 @@ static void lan966x_fdma_rx_reload(struct lan966x_rx = *rx) lan966x, FDMA_CH_RELOAD); } =20 -static void lan966x_fdma_tx_add_dcb(struct lan966x_tx *tx, - struct lan966x_tx_dcb *dcb) -{ - dcb->nextptr =3D FDMA_DCB_INVALID_DATA; - dcb->info =3D 0; -} - static int lan966x_fdma_tx_alloc(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; struct fdma *fdma =3D &tx->fdma; - struct lan966x_tx_dcb *dcb; - struct lan966x_db *db; - int size; - int i, j; + int err; =20 tx->dcbs_buf =3D kcalloc(fdma->n_dcbs, sizeof(struct lan966x_tx_dcb_buf), GFP_KERNEL); if (!tx->dcbs_buf) return -ENOMEM; =20 - /* calculate how many pages are needed to allocate the dcbs */ - size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; - size =3D ALIGN(size, PAGE_SIZE); - tx->dcbs =3D dma_alloc_coherent(lan966x->dev, size, &tx->dma, GFP_KERNEL); - if (!tx->dcbs) + err =3D fdma_alloc_coherent(lan966x->dev, fdma); + if (err) goto out; =20 - /* Now for each dcb allocate the db */ - for (i =3D 0; i < fdma->n_dcbs; ++i) { - dcb =3D &tx->dcbs[i]; - - for (j =3D 0; j < fdma->n_dbs; ++j) { - db =3D &dcb->db[j]; - db->dataptr =3D 0; - db->status =3D 0; - } - - lan966x_fdma_tx_add_dcb(tx, dcb); - } + fdma_dcbs_init(fdma, 0, 0); =20 return 0; =20 @@ -238,7 +224,7 @@ static void lan966x_fdma_tx_free(struct lan966x_tx *tx) =20 kfree(tx->dcbs_buf); =20 - size =3D sizeof(struct lan966x_tx_dcb) * fdma->n_dcbs; + size =3D sizeof(struct fdma_dcb) * fdma->n_dcbs; size =3D ALIGN(size, PAGE_SIZE); dma_free_coherent(lan966x->dev, size, fdma->dcbs, fdma->dma); } @@ -252,9 +238,9 @@ static void lan966x_fdma_tx_activate(struct lan966x_tx = *tx) /* When activating a channel, first is required to write the first DCB * address and then to activate it */ - lan_wr(lower_32_bits((u64)tx->dma), lan966x, + lan_wr(lower_32_bits((u64)fdma->dma), lan966x, FDMA_DCB_LLP(fdma->channel_id)); - lan_wr(upper_32_bits((u64)tx->dma), lan966x, + lan_wr(upper_32_bits((u64)fdma->dma), lan966x, FDMA_DCB_LLP1(fdma->channel_id)); =20 lan_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) | @@ -349,22 +335,23 @@ static void lan966x_fdma_tx_clear_buf(struct lan966x = *lan966x, int weight) struct lan966x_tx *tx =3D &lan966x->tx; struct lan966x_rx *rx =3D &lan966x->rx; struct lan966x_tx_dcb_buf *dcb_buf; + struct fdma *fdma =3D &tx->fdma; struct xdp_frame_bulk bq; - struct lan966x_db *db; unsigned long flags; bool clear =3D false; + struct fdma_db *db; int i; =20 xdp_frame_bulk_init(&bq); =20 spin_lock_irqsave(&lan966x->tx_lock, flags); - for (i =3D 0; i < tx->fdma.n_dcbs; ++i) { + for (i =3D 0; i < fdma->n_dcbs; ++i) { dcb_buf =3D &tx->dcbs_buf[i]; =20 if (!dcb_buf->used) continue; =20 - db =3D &tx->dcbs[i].db[0]; + db =3D &fdma->dcbs[i].db[0]; if (!(db->status & FDMA_DCB_STATUS_DONE)) continue; =20 @@ -617,10 +604,10 @@ static void lan966x_fdma_tx_setup_dcb(struct lan966x_= tx *tx, int next_to_use, int len, dma_addr_t dma_addr) { - struct lan966x_tx_dcb *next_dcb; - struct lan966x_db *next_db; + struct fdma_dcb *next_dcb; + struct fdma_db *next_db; =20 - next_dcb =3D &tx->dcbs[next_to_use]; + next_dcb =3D &tx->fdma.dcbs[next_to_use]; next_dcb->nextptr =3D FDMA_DCB_INVALID_DATA; =20 next_db =3D &next_dcb->db[0]; @@ -635,13 +622,14 @@ static void lan966x_fdma_tx_setup_dcb(struct lan966x_= tx *tx, static void lan966x_fdma_tx_start(struct lan966x_tx *tx, int next_to_use) { struct lan966x *lan966x =3D tx->lan966x; - struct lan966x_tx_dcb *dcb; + struct fdma *fdma =3D &tx->fdma; + struct fdma_dcb *dcb; =20 if (likely(lan966x->tx.activated)) { /* Connect current dcb to the next db */ - dcb =3D &tx->dcbs[tx->last_in_use]; - dcb->nextptr =3D tx->dma + (next_to_use * - sizeof(struct lan966x_tx_dcb)); + dcb =3D &fdma->dcbs[tx->last_in_use]; + dcb->nextptr =3D fdma->dma + (next_to_use * + sizeof(struct fdma_dcb)); =20 lan966x_fdma_tx_reload(tx); } else { @@ -999,6 +987,11 @@ int lan966x_fdma_init(struct lan966x *lan966x) lan966x->tx.fdma.channel_id =3D FDMA_INJ_CHANNEL; lan966x->tx.fdma.n_dcbs =3D FDMA_DCB_MAX; lan966x->tx.fdma.n_dbs =3D FDMA_TX_DCB_MAX_DBS; + lan966x->tx.fdma.priv =3D lan966x; + lan966x->tx.fdma.size =3D fdma_get_size(&lan966x->tx.fdma); + lan966x->tx.fdma.db_size =3D PAGE_SIZE << lan966x->rx.page_order; + lan966x->tx.fdma.ops.nextptr_cb =3D &fdma_nextptr_cb; + lan966x->tx.fdma.ops.dataptr_cb =3D &lan966x_fdma_tx_dataptr_cb; lan966x->tx.last_in_use =3D -1; =20 err =3D lan966x_fdma_rx_alloc(&lan966x->rx); diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/driver= s/net/ethernet/microchip/lan966x/lan966x_main.h index 8edb5ea484ee..99efc596c9e6 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h @@ -191,17 +191,6 @@ enum vcap_is1_port_sel_rt { =20 struct lan966x_port; =20 -struct lan966x_db { - u64 dataptr; - u64 status; -}; - -struct lan966x_tx_dcb { - u64 nextptr; - u64 info; - struct lan966x_db db[FDMA_TX_DCB_MAX_DBS]; -}; - struct lan966x_rx { struct lan966x *lan966x; =20 @@ -243,13 +232,8 @@ struct lan966x_tx { =20 struct fdma fdma; =20 - /* Pointer to the dcb list */ - struct lan966x_tx_dcb *dcbs; u16 last_in_use; =20 - /* Represents the DMA address to the first entry of the dcb entries. */ - dma_addr_t dma; - /* Array of dcbs that are given to the HW */ struct lan966x_tx_dcb_buf *dcbs_buf; =20 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53383194A73; Thu, 5 Sep 2024 08:07:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523639; cv=none; b=I5VksXbgTPZ5rm49gBPwyNCEp6cBAWibM41kbc+gS6Qv6aZesXco8zgOL9aK13OnMG0zKum/0Tj5gMt4jeElZAa9b4/zNgiQGnCh3qWB/zn30aArvCHr+8KALuBgZe2VEp4REJdI9mD4bM0uBvfgM9jwzoP8vc8NEibU9BKPqXg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523639; c=relaxed/simple; bh=v0UJx/Km6OEA1FP/PhI1HAV2q6XZjFftqU+W595/U7A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=q6PeJx2SJJeNo3ijJlYnZk4AWc6vh/+UpV5p5SoSShJ+BRWY93Oeh/drVR6P9qPeGBUZTmVkwGcKGRxkYvEfrLLNhKAF8mxl35GnjygZ6lUFuHGzWYUK2pSYUm5p0mwOt6r87heJDNWL4+dNJakMLXG41ded6kJbxWgfuW4SWHc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=DrnDreP9; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="DrnDreP9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523637; x=1757059637; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=v0UJx/Km6OEA1FP/PhI1HAV2q6XZjFftqU+W595/U7A=; b=DrnDreP9dA4kfkco5N1lSDe1F+DVDuCVOD31B0Vo4tQqyl2xqJlbRvhJ EuVkqVG1Rg14F3iyB9ZMLX9xcmuZSob44MM1HBlcoawENr2kaSzTUvbSZ FCxX5DZRW222A+YPJMsaZFWWPYEzVRy0tRbqEENFDQ0Q/iKA2HLdjS1Mf y2KV2Q9AGhwf0/wMnW+zO+1j2X7UhjIOeGLZtmoBqTZVqoIxGATBNx2r6 kHCtPYJ/H41RX6L0xfmq+rxWFcF0KqTnvqTeCT/jMYy7BfW4n0M/DwdSR l+JVc4kChCr0vtmn3iiVue7HU1Yt/Q97cm9cEwesTKSOGIrBfHSONhJLb g==; X-CSE-ConnectionGUID: un5sTwBcTQSB1/6lZ6FYYg== X-CSE-MsgGUID: YcCkSixSQ+mSEcIaM7dQ5A== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="32000385" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:13 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:12 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:10 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:36 +0200 Subject: [PATCH net-next 08/12] net: lan966x: use FDMA library for adding DCB's in the tx path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-8-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Use the fdma_dcb_add() function to add DCB's in the tx path. This gets rid of the open-coding of nextptr and dataptr handling and leaves it to the library. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 62 +++++++++++-------= ---- 1 file changed, 30 insertions(+), 32 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 3afc6c4c68a4..1beafadce87a 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -33,6 +33,16 @@ static int lan966x_fdma_tx_dataptr_cb(struct fdma *fdma,= int dcb, int db, return 0; } =20 +static int lan966x_fdma_xdp_tx_dataptr_cb(struct fdma *fdma, int dcb, int = db, + u64 *dataptr) +{ + struct lan966x *lan966x =3D (struct lan966x *)fdma->priv; + + *dataptr =3D lan966x->tx.dcbs_buf[dcb].dma_addr + XDP_PACKET_HEADROOM; + + return 0; +} + static int lan966x_fdma_channel_active(struct lan966x *lan966x) { return lan_rd(lan966x, FDMA_CH_ACTIVE); @@ -600,25 +610,6 @@ static int lan966x_fdma_get_next_dcb(struct lan966x_tx= *tx) return -1; } =20 -static void lan966x_fdma_tx_setup_dcb(struct lan966x_tx *tx, - int next_to_use, int len, - dma_addr_t dma_addr) -{ - struct fdma_dcb *next_dcb; - struct fdma_db *next_db; - - next_dcb =3D &tx->fdma.dcbs[next_to_use]; - next_dcb->nextptr =3D FDMA_DCB_INVALID_DATA; - - next_db =3D &next_dcb->db[0]; - next_db->dataptr =3D dma_addr; - next_db->status =3D FDMA_DCB_STATUS_SOF | - FDMA_DCB_STATUS_EOF | - FDMA_DCB_STATUS_INTR | - FDMA_DCB_STATUS_BLOCKO(0) | - FDMA_DCB_STATUS_BLOCKL(len); -} - static void lan966x_fdma_tx_start(struct lan966x_tx *tx, int next_to_use) { struct lan966x *lan966x =3D tx->lan966x; @@ -692,11 +683,6 @@ int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, = void *ptr, u32 len) =20 next_dcb_buf->data.xdpf =3D xdpf; next_dcb_buf->len =3D xdpf->len + IFH_LEN_BYTES; - - /* Setup next dcb */ - lan966x_fdma_tx_setup_dcb(tx, next_to_use, - xdpf->len + IFH_LEN_BYTES, - dma_addr); } else { page =3D ptr; =20 @@ -713,11 +699,6 @@ int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, = void *ptr, u32 len) =20 next_dcb_buf->data.page =3D page; next_dcb_buf->len =3D len + IFH_LEN_BYTES; - - /* Setup next dcb */ - lan966x_fdma_tx_setup_dcb(tx, next_to_use, - len + IFH_LEN_BYTES, - dma_addr + XDP_PACKET_HEADROOM); } =20 /* Fill up the buffer */ @@ -728,6 +709,17 @@ int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, = void *ptr, u32 len) next_dcb_buf->ptp =3D false; next_dcb_buf->dev =3D port->dev; =20 + __fdma_dcb_add(&tx->fdma, + next_to_use, + 0, + FDMA_DCB_STATUS_INTR | + FDMA_DCB_STATUS_SOF | + FDMA_DCB_STATUS_EOF | + FDMA_DCB_STATUS_BLOCKO(0) | + FDMA_DCB_STATUS_BLOCKL(next_dcb_buf->len), + &fdma_nextptr_cb, + &lan966x_fdma_xdp_tx_dataptr_cb); + /* Start the transmission */ lan966x_fdma_tx_start(tx, next_to_use); =20 @@ -787,9 +779,6 @@ int lan966x_fdma_xmit(struct sk_buff *skb, __be32 *ifh,= struct net_device *dev) goto release; } =20 - /* Setup next dcb */ - lan966x_fdma_tx_setup_dcb(tx, next_to_use, skb->len, dma_addr); - /* Fill up the buffer */ next_dcb_buf =3D &tx->dcbs_buf[next_to_use]; next_dcb_buf->use_skb =3D true; @@ -801,6 +790,15 @@ int lan966x_fdma_xmit(struct sk_buff *skb, __be32 *ifh= , struct net_device *dev) next_dcb_buf->ptp =3D false; next_dcb_buf->dev =3D dev; =20 + fdma_dcb_add(&tx->fdma, + next_to_use, + 0, + FDMA_DCB_STATUS_INTR | + FDMA_DCB_STATUS_SOF | + FDMA_DCB_STATUS_EOF | + FDMA_DCB_STATUS_BLOCKO(0) | + FDMA_DCB_STATUS_BLOCKL(skb->len)); + if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && LAN966X_SKB_CB(skb)->rew_op =3D=3D IFH_REW_OP_TWO_STEP_PTP) next_dcb_buf->ptp =3D true; --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35393198A01; Thu, 5 Sep 2024 08:07:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523659; cv=none; b=aE7smvP4scMkC/OprWxtBm1PK/BdmUEXjOzdG2ydOodd7wLJDPXw1wxWuZJxT648JeKIqjS8gT7QvUJFva83Sk9qWauuPP+0HM1XJNqebUTy2dfCCzf/oNL8nTC+0y6Ohx3x7/G06qlOgoq/QJy8ulHTJCM7kETWnJL5Egx6gwg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523659; c=relaxed/simple; bh=b62wxCPphkMNdqIp8IIYXA+kiVBzUNTWDMg2d+BTP+4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=rwNoxLakPHkxNRsG0LgQhr+rXxVi4IVZCUBzjZEFY2nonpywDNVMmLz1RO0TxNfu7Wd9QX6EwWsOoGOFA6i0hGlIFPMEU8dpf/fuL75UBhvWkflPGnB/KFCD168DkwOcMDY89hP07Oze6KF0DG7IptlAXccr1xwNJZrZscT7790= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=UPgth385; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="UPgth385" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523658; x=1757059658; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=b62wxCPphkMNdqIp8IIYXA+kiVBzUNTWDMg2d+BTP+4=; b=UPgth385ZtJZcc93KE7JsnVaQ0P8FYQxdhsCqBBD6JWjxUkYGicBBEW4 LS+ys/pg0e8xQTYxiWvAGV/4ngMgJOFW8No+UNaM0Nbz/4n8wxpG68RK7 VCOy7UxyBAiW1Nv4Ns2zteFMKdfDREqmUYr8qJU2+syiCu8yAARQC5WVT /Gcx5WOIwPl2hme7Lzb76mFx3BdTKa6kcSXsGn1iDqfvLt7e305ujWlf4 fze14P+WkgqpB0/Nitnt5uy4szvnRlDsH3ykZP7hrWtgadV+gmUYszgdq 3D2ulD8ueYSdW8gdJvn9R2OolXhp/BXI5dTEuXUvi2PYnnJ/m57OANNU0 A==; X-CSE-ConnectionGUID: gT0AKMfBTO+XOzKg9t5R6Q== X-CSE-MsgGUID: gq38b+0mTuCmHABD4cTGww== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="262316465" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:37 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:14 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:12 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:37 +0200 Subject: [PATCH net-next 09/12] net: lan966x: use library helper for freeing tx buffers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-9-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev The library has the helper fdma_free_phys() for freeing physical FDMA memory. Use it in the exit path. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 1beafadce87a..6f7e3c27c1a7 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -229,14 +229,9 @@ static int lan966x_fdma_tx_alloc(struct lan966x_tx *tx) static void lan966x_fdma_tx_free(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; - struct fdma *fdma =3D &tx->fdma; - int size; =20 kfree(tx->dcbs_buf); - - size =3D sizeof(struct fdma_dcb) * fdma->n_dcbs; - size =3D ALIGN(size, PAGE_SIZE); - dma_free_coherent(lan966x->dev, size, fdma->dcbs, fdma->dma); + fdma_free_coherent(lan966x->dev, &tx->fdma); } =20 static void lan966x_fdma_tx_activate(struct lan966x_tx *tx) --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FDED1991CA; Thu, 5 Sep 2024 08:07:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523671; cv=none; b=oLTb4jw4wW8wLeMskkv7wpIV9MS/uEmthoEJUB5GnQsKWmUio+bW6GtGbEoyxil7zWD73ZFOvynLzYV/ikgNNtXmPhhcvHUkz+L1Ejp9NnefeFyQJgWxIiUuhgxjWu1+W2pKBxpXH5SK+pyKkbcLhSonAU4ri3GPiO0MPniUFsc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523671; c=relaxed/simple; bh=4SWvhSG7TJHT1LJwDw37nF7hc4dbd0N3qUSKXp5KcLk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=fW3cS7qaf6C2RHap652fPcZ88mpyvk3Cc6Ee9FHrgDgxcyje2VJmwNBLJsirazDYACR281n27lw+iVRBizXxr0amIlvqU4j2gHK8xFxO+nueiQNZ+B9vYz68FM8zWPoq3UdisRWzMJgFc7p3i81PVUubv0IA8Boyc5gxRDXnQZ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=tr0CV1ky; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="tr0CV1ky" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523669; x=1757059669; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=4SWvhSG7TJHT1LJwDw37nF7hc4dbd0N3qUSKXp5KcLk=; b=tr0CV1kygcFxOHeXETov4jyo58p4j6gPmUB5YxY0f7oJBiOxudUx40xz 5XqsURaQGfBt993nSWEKJgLgNa9zjYblQmq+nfKKi9u9K9vvUTW9MxMip GdMZt9IncLYQYO87Zf4R55VWxvQUDr8aIIgRsrAKTyrAr47p3umMVWa/t hWDEsxiepzlilioGsLA3BwdDhtFR+k+SNBi0sgtFcJjfY4bFokrla4hZw 77kWeZKHP0RF4Fzyd6Gj9zfbPmqwF5yh3lA8zxQ90WLetPICwsrluMFDH 7eulNPFBLLTuAmfDlLDMwMmpXsuMcWx2bTL2m5gJ8SVM4CZUNT7F457BD Q==; X-CSE-ConnectionGUID: 7ewQ9CGBRIuJm60AkmofCw== X-CSE-MsgGUID: dhkEme0bSz6YMamOZOP7bg== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="34454187" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:48 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:17 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:14 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:38 +0200 Subject: [PATCH net-next 10/12] net: lan966x: ditch tx->last_in_use variable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-10-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev This variable is used in the tx path to determine the last used DCB. The library has the variable last_dcb for the exact same purpose. Ditch the last_in_use variable throughout. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 20 ++++------------= ---- .../net/ethernet/microchip/lan966x/lan966x_main.h | 2 -- 2 files changed, 4 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 6f7e3c27c1a7..b5a97c5a2e1b 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -293,7 +293,6 @@ static void lan966x_fdma_tx_disable(struct lan966x_tx *= tx) lan966x, FDMA_CH_DB_DISCARD); =20 tx->activated =3D false; - tx->last_in_use =3D -1; } =20 static void lan966x_fdma_tx_reload(struct lan966x_tx *tx) @@ -598,34 +597,24 @@ static int lan966x_fdma_get_next_dcb(struct lan966x_t= x *tx) =20 for (i =3D 0; i < fdma->n_dcbs; ++i) { dcb_buf =3D &tx->dcbs_buf[i]; - if (!dcb_buf->used && i !=3D tx->last_in_use) + if (!dcb_buf->used && &fdma->dcbs[i] !=3D fdma->last_dcb) return i; } =20 return -1; } =20 -static void lan966x_fdma_tx_start(struct lan966x_tx *tx, int next_to_use) +static void lan966x_fdma_tx_start(struct lan966x_tx *tx) { struct lan966x *lan966x =3D tx->lan966x; - struct fdma *fdma =3D &tx->fdma; - struct fdma_dcb *dcb; =20 if (likely(lan966x->tx.activated)) { - /* Connect current dcb to the next db */ - dcb =3D &fdma->dcbs[tx->last_in_use]; - dcb->nextptr =3D fdma->dma + (next_to_use * - sizeof(struct fdma_dcb)); - lan966x_fdma_tx_reload(tx); } else { /* Because it is first time, then just activate */ lan966x->tx.activated =3D true; lan966x_fdma_tx_activate(tx); } - - /* Move to next dcb because this last in use */ - tx->last_in_use =3D next_to_use; } =20 int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, void *ptr, u32 len) @@ -716,7 +705,7 @@ int lan966x_fdma_xmit_xdpf(struct lan966x_port *port, v= oid *ptr, u32 len) &lan966x_fdma_xdp_tx_dataptr_cb); =20 /* Start the transmission */ - lan966x_fdma_tx_start(tx, next_to_use); + lan966x_fdma_tx_start(tx); =20 out: spin_unlock(&lan966x->tx_lock); @@ -799,7 +788,7 @@ int lan966x_fdma_xmit(struct sk_buff *skb, __be32 *ifh,= struct net_device *dev) next_dcb_buf->ptp =3D true; =20 /* Start the transmission */ - lan966x_fdma_tx_start(tx, next_to_use); + lan966x_fdma_tx_start(tx); =20 return NETDEV_TX_OK; =20 @@ -985,7 +974,6 @@ int lan966x_fdma_init(struct lan966x *lan966x) lan966x->tx.fdma.db_size =3D PAGE_SIZE << lan966x->rx.page_order; lan966x->tx.fdma.ops.nextptr_cb =3D &fdma_nextptr_cb; lan966x->tx.fdma.ops.dataptr_cb =3D &lan966x_fdma_tx_dataptr_cb; - lan966x->tx.last_in_use =3D -1; =20 err =3D lan966x_fdma_rx_alloc(&lan966x->rx); if (err) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/driver= s/net/ethernet/microchip/lan966x/lan966x_main.h index 99efc596c9e6..25cb2f61986f 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h @@ -232,8 +232,6 @@ struct lan966x_tx { =20 struct fdma fdma; =20 - u16 last_in_use; - /* Array of dcbs that are given to the HW */ struct lan966x_tx_dcb_buf *dcbs_buf; =20 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8657B1991D9; Thu, 5 Sep 2024 08:07:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523672; cv=none; b=lGMpekIXCBK33vcCn34BpCrIPyel5q+qdk1bQWcTTYq7wHIDxbVAb6fDTlIxf97+eah6nDcvjB0fbc32J5J7E2CQVsqkSdgMlPeVQYiwnMbFstFIx6pGJwTH9dsg+eJB1Sul81dxXs7ADf9k1dRr0DEGaPgdzLTrgeCy9SZ+7Rg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523672; c=relaxed/simple; bh=M2TwK1cJ9yncTsoISBdNRRNCZrwjb2y9dw1H8CTcJxs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=HJxcdp58tjb3FdH4K3UaOfbSXv+Otj6h8YKZk8yY22I8uclIpj1zKG5hsQZxBLf/qZbkpOpcl75QNfOjfibuqsn3DifkBbZ1RwSZ3ZR6/4wzUsvRjYwGleXW5e6dUfxEezb4e0zTKxOLtaGJw+RUkwOr98pEl0VEoB6WrKDWrxc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=EA40rSQF; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="EA40rSQF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523670; x=1757059670; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=M2TwK1cJ9yncTsoISBdNRRNCZrwjb2y9dw1H8CTcJxs=; b=EA40rSQFKHDgtBpgnVgFQVvalUVNaLGmSPy95uGRIMonjlXfaey6MxKR uu97D44xOkSaohWKhwucEztDFxo5ChW9PCHcpE7H75qR5np2Ilw00rS2l a2NrXbWX8BIqz8J+IH+VnvavfgR67NHMZyUv1QIqiYwPjU1Q2BjY7kL8l pYDzymn6v0LkRjMSV3Fp7AZtfZjb2ddzIS1PbB0c51efalqnGygpObkPG qdsmCuvUnNovL627y+Q/kPgIgo3YT2B70Oz4lRn2MbGc2t16GvFMrhn9T rVIeoas7XVkCqkOPYfn0SD6XICDL3869TgOzyaHIw6w+YplkqFb28VSMF g==; X-CSE-ConnectionGUID: 7ewQ9CGBRIuJm60AkmofCw== X-CSE-MsgGUID: DhKSG2F5SmW+R/YLwklhMw== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="34454188" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:48 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:19 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:17 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:39 +0200 Subject: [PATCH net-next 11/12] net: lan966x: use a few FDMA helpers throughout Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-11-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev The library provides helpers for a number of DCB and DB operations. Use these throughout the code and remove the old ones. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- .../net/ethernet/microchip/lan966x/lan966x_fdma.c | 42 ++++++------------= ---- 1 file changed, 11 insertions(+), 31 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index b5a97c5a2e1b..4c8f83e4c5de 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -126,14 +126,6 @@ static int lan966x_fdma_rx_alloc(struct lan966x_rx *rx) return 0; } =20 -static void lan966x_fdma_rx_advance_dcb(struct lan966x_rx *rx) -{ - struct fdma *fdma =3D &rx->fdma; - - fdma->dcb_index++; - fdma->dcb_index &=3D fdma->n_dcbs - 1; -} - static void lan966x_fdma_rx_start(struct lan966x_rx *rx) { struct lan966x *lan966x =3D rx->lan966x; @@ -355,8 +347,8 @@ static void lan966x_fdma_tx_clear_buf(struct lan966x *l= an966x, int weight) if (!dcb_buf->used) continue; =20 - db =3D &fdma->dcbs[i].db[0]; - if (!(db->status & FDMA_DCB_STATUS_DONE)) + db =3D fdma_db_get(fdma, i, 0); + if (!fdma_db_is_done(db)) continue; =20 dcb_buf->dev->stats.tx_packets++; @@ -396,19 +388,6 @@ static void lan966x_fdma_tx_clear_buf(struct lan966x *= lan966x, int weight) spin_unlock_irqrestore(&lan966x->tx_lock, flags); } =20 -static bool lan966x_fdma_rx_more_frames(struct lan966x_rx *rx) -{ - struct fdma *fdma =3D &rx->fdma; - struct fdma_db *db; - - /* Check if there is any data */ - db =3D &fdma->dcbs[fdma->dcb_index].db[fdma->db_index]; - if (unlikely(!(db->status & FDMA_DCB_STATUS_DONE))) - return false; - - return true; -} - static int lan966x_fdma_rx_check_frame(struct lan966x_rx *rx, u64 *src_por= t) { struct lan966x *lan966x =3D rx->lan966x; @@ -417,7 +396,7 @@ static int lan966x_fdma_rx_check_frame(struct lan966x_r= x *rx, u64 *src_port) struct fdma_db *db; struct page *page; =20 - db =3D &fdma->dcbs[fdma->dcb_index].db[fdma->db_index]; + db =3D fdma_db_next_get(fdma); page =3D rx->page[fdma->dcb_index][fdma->db_index]; if (unlikely(!page)) return FDMA_ERROR; @@ -450,7 +429,7 @@ static struct sk_buff *lan966x_fdma_rx_get_frame(struct= lan966x_rx *rx, u64 timestamp; =20 /* Get the received frame and unmap it */ - db =3D &fdma->dcbs[fdma->dcb_index].db[fdma->db_index]; + db =3D fdma_db_next_get(fdma); page =3D rx->page[fdma->dcb_index][fdma->db_index]; =20 skb =3D build_skb(page_address(page), fdma->db_size); @@ -508,7 +487,7 @@ static int lan966x_fdma_napi_poll(struct napi_struct *n= api, int weight) =20 /* Get all received skb */ while (counter < weight) { - if (!lan966x_fdma_rx_more_frames(rx)) + if (!fdma_has_frames(fdma)) break; =20 counter++; @@ -518,22 +497,22 @@ static int lan966x_fdma_napi_poll(struct napi_struct = *napi, int weight) break; case FDMA_ERROR: lan966x_fdma_rx_free_page(rx); - lan966x_fdma_rx_advance_dcb(rx); + fdma_dcb_advance(fdma); goto allocate_new; case FDMA_REDIRECT: redirect =3D true; fallthrough; case FDMA_TX: - lan966x_fdma_rx_advance_dcb(rx); + fdma_dcb_advance(fdma); continue; case FDMA_DROP: lan966x_fdma_rx_free_page(rx); - lan966x_fdma_rx_advance_dcb(rx); + fdma_dcb_advance(fdma); continue; } =20 skb =3D lan966x_fdma_rx_get_frame(rx, src_port); - lan966x_fdma_rx_advance_dcb(rx); + fdma_dcb_advance(fdma); if (!skb) goto allocate_new; =20 @@ -597,7 +576,8 @@ static int lan966x_fdma_get_next_dcb(struct lan966x_tx = *tx) =20 for (i =3D 0; i < fdma->n_dcbs; ++i) { dcb_buf =3D &tx->dcbs_buf[i]; - if (!dcb_buf->used && &fdma->dcbs[i] !=3D fdma->last_dcb) + if (!dcb_buf->used && + !fdma_is_last(&tx->fdma, &tx->fdma.dcbs[i])) return i; } =20 --=20 2.34.1 From nobody Fri Dec 19 16:44:56 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1231E199235; Thu, 5 Sep 2024 08:07:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523672; cv=none; b=mHx71tSaNKwmCUo/i8954gNfUcPWYB1bZ8BhfkfipQZDOsYRfTd+xQohlqDJkU9PlZQVHqsmtSTwuRMS/+8I86jd4fLw0Q1U28YydVt3swgeokm2o8lJJVFCxrHIwdzmEDIsLXccTjMGbb4BwxkOhN0DRcz+nFlVAX+oTZYAUa0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725523672; c=relaxed/simple; bh=enBgGVDxXDeOvUWp9Qkmhe33qeG2l9fMYt0BhW+oop0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=o70eCRycixFG3EJDG2+sYxlpdxj8zSnn7u2APXdj9w92Q5AVNUEw9A11pXxUsA7VOIGuf4lwuYvHGQApv3CWnG1cXJRPlSUqrf34+ZO6/GaMIgvQ3r9cjYpKu1uE2KGvJa+1hqd/wdL6FtzEHAinhb6Wy2ZuV3AFg0QHqYRuHkQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=IUOifNLX; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="IUOifNLX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725523670; x=1757059670; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=enBgGVDxXDeOvUWp9Qkmhe33qeG2l9fMYt0BhW+oop0=; b=IUOifNLXvca7jmWFsALdPVQODGZXh7EOGRyPWMTIZru6cdv5Vy0sbioh p9DbW0HKt3lAipqA/sZNnF+Zr6isLTZ74TPyD+h7tw4k3JfX2m7ZThbJs IIHojpSQBH620Hr66Nnvu9FIQRJuhRxS+Ug5allY0wgDBGjgG1UpUjvjY WnQqa/sc91ZjpkDVxB/bOzLa8ayKRr4w0CBJdbiNLtN/FLPHrTVlVMxPh l6+QlbdzahRPYs/WrdGwW6fipe9GSsDSo7MysczVLZsLsKGR0QIq3+YX6 Nsb5wsU089GJorm6L7I5SeBAUltlpC7TdnhPOGT0ZZDbNZ08BHL8jvu6x Q==; X-CSE-ConnectionGUID: 7ewQ9CGBRIuJm60AkmofCw== X-CSE-MsgGUID: njXZDGOkQmqXJF8nseyeEA== X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="34454189" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Sep 2024 01:07:48 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 5 Sep 2024 01:07:22 -0700 Received: from [10.205.21.108] (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 5 Sep 2024 01:07:19 -0700 From: Daniel Machon Date: Thu, 5 Sep 2024 10:06:40 +0200 Subject: [PATCH net-next 12/12] net: lan966x: refactor buffer reload function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240905-fdma-lan966x-v1-12-e083f8620165@microchip.com> References: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> In-Reply-To: <20240905-fdma-lan966x-v1-0-e083f8620165@microchip.com> To: Horatiu Vultur , , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , "John Fastabend" CC: , , X-Mailer: b4 0.14-dev Now that we store everything in the fdma structs, refactor lan966x_fdma_reload() to store and restore the entire struct. Signed-off-by: Daniel Machon Reviewed-by: Horatiu Vultur --- drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c b/driver= s/net/ethernet/microchip/lan966x/lan966x_fdma.c index 4c8f83e4c5de..502670718104 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c @@ -810,14 +810,11 @@ static int lan966x_qsys_sw_status(struct lan966x *lan= 966x) static int lan966x_fdma_reload(struct lan966x *lan966x, int new_mtu) { struct page_pool *page_pool; - dma_addr_t rx_dma; - void *rx_dcbs; - u32 size; + struct fdma fdma_rx_old; int err; =20 /* Store these for later to free them */ - rx_dma =3D lan966x->rx.fdma.dma; - rx_dcbs =3D lan966x->rx.fdma.dcbs; + memcpy(&fdma_rx_old, &lan966x->rx.fdma, sizeof(struct fdma)); page_pool =3D lan966x->rx.page_pool; =20 napi_synchronize(&lan966x->napi); @@ -833,9 +830,7 @@ static int lan966x_fdma_reload(struct lan966x *lan966x,= int new_mtu) goto restore; lan966x_fdma_rx_start(&lan966x->rx); =20 - size =3D sizeof(struct fdma_dcb) * lan966x->rx.fdma.n_dcbs; - size =3D ALIGN(size, PAGE_SIZE); - dma_free_coherent(lan966x->dev, size, rx_dcbs, rx_dma); + fdma_free_coherent(lan966x->dev, &fdma_rx_old); =20 page_pool_destroy(page_pool); =20 @@ -845,8 +840,7 @@ static int lan966x_fdma_reload(struct lan966x *lan966x,= int new_mtu) return err; restore: lan966x->rx.page_pool =3D page_pool; - lan966x->rx.fdma.dma =3D rx_dma; - lan966x->rx.fdma.dcbs =3D rx_dcbs; + memcpy(&lan966x->rx.fdma, &fdma_rx_old, sizeof(struct fdma)); lan966x_fdma_rx_start(&lan966x->rx); =20 return err; --=20 2.34.1