From nobody Fri Dec 19 16:45:09 2025 Received: from mail-io1-f73.google.com (mail-io1-f73.google.com [209.85.166.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1ED431487C5 for ; Wed, 4 Sep 2024 20:42:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725482549; cv=none; b=BT3ODYrvupDMvo/W0jR8d1XQT1HFYFR16aHvfRH4RSa3XN4UUqzw5BWR/UECUvM9WUyYFg6k5G3/oJj5QqLBs5a1L03gap9qhELPJvdPaZBLNRXHofRWfSdUX9f1Z/pWWzj37FZn2otpxUXMoD7gSnsqtpKhpV1Qs8iuc8Fk4UQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725482549; c=relaxed/simple; bh=Bc+G/ABmIxicp+Ktu0Km0LfXC9Azpt75Q+13cZSyLUo=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=IivZy/fmnMrWWt+IeXwH3C561xySkteXyuAZgYu+JKx5sW0l1MdU7jaWFn6K4D3sK9gOl5kAh5suw5wsUt57VDdgURtcHKHZ5sFGmzSOEU+3EpexdziaCH2iWV4L5KE3/VR4gfKH2L9yE/zl6t250dBDLdDrRDoUnZ7uU4OkIlg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--coltonlewis.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=fRVjl29G; arc=none smtp.client-ip=209.85.166.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--coltonlewis.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="fRVjl29G" Received: by mail-io1-f73.google.com with SMTP id ca18e2360f4ac-82a2109c355so869695139f.2 for ; Wed, 04 Sep 2024 13:42:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1725482547; x=1726087347; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=da1VGWoVEM0srL8pak+5iYqVi4U1+WdMmmo+Uby7jLQ=; b=fRVjl29Gbc5EuZdxjwe6FzYonommB2vGrzHkHMwvG0ziX4Sk1vvXALNeZf6ivORasQ ox7wzpm46qKqTIc7W8zvBWgV2as80ZtZ9Gzggr05PWUOv9Zo35Ld1C6W1njrJtyKftC2 5pX6lz7IlIDxRx95LpZ1s2q5mJ0b1kVN7JJB1Q3HxWa6a7m0aYi4E3jKct7dj8vo/+dg VPRdLp6dH3MQFeR/Fn7cyAmKeMnPevOpnZsA6rf3sBcOznaZmOf0ZJEwvsU2XA1CEspS vN/Y3dGFlkzU8+pnBrq1G6INbnSEJGHqw4/bPeK/XpFtdU/pCGSQkos2istE+DnJGoOM uHnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725482547; x=1726087347; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=da1VGWoVEM0srL8pak+5iYqVi4U1+WdMmmo+Uby7jLQ=; b=ds6rKVvRiHoll8tRNRuigsV2njMv88UhIa8ot4dB2LnHZJTjynLnnjwnt/O9stlTNq 6VSP0QMoDy0zAnb81T4J/7NjZknJlsU5MKElNha8QF9s91VqZAMatNAm6TYqKr5J7nP/ EkPP846qjIH2tHQiI8nuadd1k5ND8Nc34lLAHlj0Hs6/rREAUWXUxPRcJ+1QGHUbncbE XXA7EFtQGQkTichq+fX/GWtOcLtAwidFyfrpfldR+2BDiYLCpiPUpukVLxsZ1XsGUtoA ph0OozgiDc+Ge0RpGjPOBaVRZ1IkTxCLQJYQw6c1ghkHKoMjVNDZbv4dOKEZvIhe8AiH Xwmg== X-Forwarded-Encrypted: i=1; AJvYcCVptX1r9mWyhwOYS20qxqC8nLvaihHDfB4E8StACtAQAM51UhYkjqS75hfuBtoL9uE3gKCzbV427Xmgt/k=@vger.kernel.org X-Gm-Message-State: AOJu0YyzJFMrygOaBu+4Mm3e7FjoPtTNKThfaQsBRWgN1Y8fSo3nzQbU nxnigWEyXVrO7FzEVXMUVvnn3B2JB7/TZ5Y1EoqJBP9eCWCrdflHhMN+GvHyVPGOF+OzJPtYK+W Tocfky/Y54lhxsHduKfQhNg== X-Google-Smtp-Source: AGHT+IF5VwhfDwFkkz0RNP4hdicHfuNY6pJqQwTSSeUmfbLEP1/IRR0I2ApAClPpKugjZhskT8IDcbh94c8otLZ8KA== X-Received: from coltonlewis-kvm.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:14ce]) (user=coltonlewis job=sendgmr) by 2002:a05:6638:2396:b0:4c0:9a05:44d0 with SMTP id 8926c6da1cb9f-4d017d7b001mr570237173.1.1725482547230; Wed, 04 Sep 2024 13:42:27 -0700 (PDT) Date: Wed, 4 Sep 2024 20:41:29 +0000 In-Reply-To: <20240904204133.1442132-1-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240904204133.1442132-1-coltonlewis@google.com> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog Message-ID: <20240904204133.1442132-2-coltonlewis@google.com> Subject: [PATCH 1/5] arm: perf: Drop unused functions From: Colton Lewis To: kvm@vger.kernel.org Cc: Oliver Upton , Sean Christopherson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , Will Deacon , Russell King , Catalin Marinas , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Colton Lewis Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" perf_instruction_pointer() and perf_misc_flags() aren't used anywhere in this particular perf implementation. Drop them. Signed-off-by: Colton Lewis Acked-by: Mark Rutland --- arch/arm/include/asm/perf_event.h | 7 ------- arch/arm/kernel/perf_callchain.c | 17 ----------------- 2 files changed, 24 deletions(-) diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_= event.h index bdbc1e590891..c08f16f2e243 100644 --- a/arch/arm/include/asm/perf_event.h +++ b/arch/arm/include/asm/perf_event.h @@ -8,13 +8,6 @@ #ifndef __ARM_PERF_EVENT_H__ #define __ARM_PERF_EVENT_H__ =20 -#ifdef CONFIG_PERF_EVENTS -struct pt_regs; -extern unsigned long perf_instruction_pointer(struct pt_regs *regs); -extern unsigned long perf_misc_flags(struct pt_regs *regs); -#define perf_misc_flags(regs) perf_misc_flags(regs) -#endif - #define perf_arch_fetch_caller_regs(regs, __ip) { \ (regs)->ARM_pc =3D (__ip); \ frame_pointer((regs)) =3D (unsigned long) __builtin_frame_address(0); \ diff --git a/arch/arm/kernel/perf_callchain.c b/arch/arm/kernel/perf_callch= ain.c index 1d230ac9d0eb..a2601b1ef318 100644 --- a/arch/arm/kernel/perf_callchain.c +++ b/arch/arm/kernel/perf_callchain.c @@ -96,20 +96,3 @@ perf_callchain_kernel(struct perf_callchain_entry_ctx *e= ntry, struct pt_regs *re arm_get_current_stackframe(regs, &fr); walk_stackframe(&fr, callchain_trace, entry); } - -unsigned long perf_instruction_pointer(struct pt_regs *regs) -{ - return instruction_pointer(regs); -} - -unsigned long perf_misc_flags(struct pt_regs *regs) -{ - int misc =3D 0; - - if (user_mode(regs)) - misc |=3D PERF_RECORD_MISC_USER; - else - misc |=3D PERF_RECORD_MISC_KERNEL; - - return misc; -} --=20 2.46.0.469.g59c65b2a67-goog From nobody Fri Dec 19 16:45:09 2025 Received: from mail-io1-f73.google.com (mail-io1-f73.google.com [209.85.166.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3123514A09F for ; Wed, 4 Sep 2024 20:42:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725482551; cv=none; b=GLyomjYKJ/98BWNJQiiwEA3BqpHD7mUPjlpFIHryShoJGaN92zXbmvLuqYNuH35hw43yHLd5bzrTKZxdOtzKeegYO3/Nou98vS0HTBwHBZchl5nqE4EGe8z8Txmjn78ABkTv/DxtW5Rj7wkKHhKpSrrzKgEvVwB0tdZ6B/gSxiM= ARC-Message-Signature: i=1; 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AJvYcCWeUEacjQBBBfs/4U3nDFndJGTyCWAn4pTn7/BVBaiAZLXC+Fh/yBLz1WffQZsqUyV344RZCfKHKbkwblM=@vger.kernel.org X-Gm-Message-State: AOJu0YxArZIwN1t24fCfXgNrWS50Kq0MI7ahrFHaMVT8sWLjRFR3gB/1 JvJ1OjnwX2bNa0qC33zZ/CK0PUA+m9CaIeNzVL+aqjnG/RcEXqY/vk0peNHeaSZUHgxqW7wxLD8 AC6/9VRHIyl4O1gavpoo8Kg== X-Google-Smtp-Source: AGHT+IHPF+sZuedNT/jMh+JCzWvvgTeTbKWh6yVWIbPtF10R4fPBteXez+IZX/IIgxw2NVpdi4FMQd2TV471KaO8wg== X-Received: from coltonlewis-kvm.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:14ce]) (user=coltonlewis job=sendgmr) by 2002:a05:6602:13ce:b0:829:eeca:d4b8 with SMTP id ca18e2360f4ac-82a262ff6f1mr64966839f.4.1725482548414; Wed, 04 Sep 2024 13:42:28 -0700 (PDT) Date: Wed, 4 Sep 2024 20:41:30 +0000 In-Reply-To: <20240904204133.1442132-1-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240904204133.1442132-1-coltonlewis@google.com> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog Message-ID: <20240904204133.1442132-3-coltonlewis@google.com> Subject: [PATCH 2/5] perf: Hoist perf_instruction_pointer() and perf_misc_flags() From: Colton Lewis To: kvm@vger.kernel.org Cc: Oliver Upton , Sean Christopherson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , Will Deacon , Russell King , Catalin Marinas , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Colton Lewis Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For clarity, rename the arch-specific definitions of these functions to perf_arch_* to denote they are arch-specifc. Define the generic-named functions in one place where they can call the arch-specific ones as needed. Signed-off-by: Colton Lewis --- arch/arm64/include/asm/perf_event.h | 6 +++--- arch/arm64/kernel/perf_callchain.c | 4 ++-- arch/powerpc/include/asm/perf_event_server.h | 6 +++--- arch/powerpc/perf/core-book3s.c | 4 ++-- arch/s390/include/asm/perf_event.h | 6 +++--- arch/s390/kernel/perf_event.c | 4 ++-- arch/x86/events/core.c | 4 ++-- arch/x86/include/asm/perf_event.h | 10 +++++----- include/linux/perf_event.h | 9 ++++++--- kernel/events/core.c | 10 ++++++++++ 10 files changed, 38 insertions(+), 25 deletions(-) diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/p= erf_event.h index eb7071c9eb34..31a5584ed423 100644 --- a/arch/arm64/include/asm/perf_event.h +++ b/arch/arm64/include/asm/perf_event.h @@ -11,9 +11,9 @@ =20 #ifdef CONFIG_PERF_EVENTS struct pt_regs; -extern unsigned long perf_instruction_pointer(struct pt_regs *regs); -extern unsigned long perf_misc_flags(struct pt_regs *regs); -#define perf_misc_flags(regs) perf_misc_flags(regs) +extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs); +extern unsigned long perf_arch_misc_flags(struct pt_regs *regs); +#define perf_arch_misc_flags(regs) perf_misc_flags(regs) #define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs #endif =20 diff --git a/arch/arm64/kernel/perf_callchain.c b/arch/arm64/kernel/perf_ca= llchain.c index e8ed5673f481..01a9d08fc009 100644 --- a/arch/arm64/kernel/perf_callchain.c +++ b/arch/arm64/kernel/perf_callchain.c @@ -39,7 +39,7 @@ void perf_callchain_kernel(struct perf_callchain_entry_ct= x *entry, arch_stack_walk(callchain_trace, entry, current, regs); } =20 -unsigned long perf_instruction_pointer(struct pt_regs *regs) +unsigned long perf_arch_instruction_pointer(struct pt_regs *regs) { if (perf_guest_state()) return perf_guest_get_ip(); @@ -47,7 +47,7 @@ unsigned long perf_instruction_pointer(struct pt_regs *re= gs) return instruction_pointer(regs); } =20 -unsigned long perf_misc_flags(struct pt_regs *regs) +unsigned long perf_arch_misc_flags(struct pt_regs *regs) { unsigned int guest_state =3D perf_guest_state(); int misc =3D 0; diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/in= clude/asm/perf_event_server.h index 5995614e9062..41587d3f8446 100644 --- a/arch/powerpc/include/asm/perf_event_server.h +++ b/arch/powerpc/include/asm/perf_event_server.h @@ -102,8 +102,8 @@ struct power_pmu { int __init register_power_pmu(struct power_pmu *pmu); =20 struct pt_regs; -extern unsigned long perf_misc_flags(struct pt_regs *regs); -extern unsigned long perf_instruction_pointer(struct pt_regs *regs); +extern unsigned long perf_arch_misc_flags(struct pt_regs *regs); +extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs); extern unsigned long int read_bhrb(int n); =20 /* @@ -111,7 +111,7 @@ extern unsigned long int read_bhrb(int n); * if we have hardware PMU support. */ #ifdef CONFIG_PPC_PERF_CTRS -#define perf_misc_flags(regs) perf_misc_flags(regs) +#define perf_arch_misc_flags(regs) perf_misc_flags(regs) #endif =20 /* diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3= s.c index 42867469752d..dc01aa604cc1 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -2332,7 +2332,7 @@ static void record_and_restart(struct perf_event *eve= nt, unsigned long val, * Called from generic code to get the misc flags (i.e. processor mode) * for an event_id. */ -unsigned long perf_misc_flags(struct pt_regs *regs) +unsigned long perf_arch_misc_flags(struct pt_regs *regs) { u32 flags =3D perf_get_misc_flags(regs); =20 @@ -2346,7 +2346,7 @@ unsigned long perf_misc_flags(struct pt_regs *regs) * Called from generic code to get the instruction pointer * for an event_id. */ -unsigned long perf_instruction_pointer(struct pt_regs *regs) +unsigned long perf_arch_instruction_pointer(struct pt_regs *regs) { unsigned long siar =3D mfspr(SPRN_SIAR); =20 diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/per= f_event.h index 9917e2717b2b..f2d83289ec7a 100644 --- a/arch/s390/include/asm/perf_event.h +++ b/arch/s390/include/asm/perf_event.h @@ -37,9 +37,9 @@ extern ssize_t cpumf_events_sysfs_show(struct device *dev, =20 /* Perf callbacks */ struct pt_regs; -extern unsigned long perf_instruction_pointer(struct pt_regs *regs); -extern unsigned long perf_misc_flags(struct pt_regs *regs); -#define perf_misc_flags(regs) perf_misc_flags(regs) +extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs); +extern unsigned long perf_arch_misc_flags(struct pt_regs *regs); +#define perf_arch_misc_flags(regs) perf_misc_flags(regs) #define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs =20 /* Perf pt_regs extension for sample-data-entry indicators */ diff --git a/arch/s390/kernel/perf_event.c b/arch/s390/kernel/perf_event.c index 5fff629b1a89..f9000ab49f4a 100644 --- a/arch/s390/kernel/perf_event.c +++ b/arch/s390/kernel/perf_event.c @@ -57,7 +57,7 @@ static unsigned long instruction_pointer_guest(struct pt_= regs *regs) return sie_block(regs)->gpsw.addr; } =20 -unsigned long perf_instruction_pointer(struct pt_regs *regs) +unsigned long perf_arch_instruction_pointer(struct pt_regs *regs) { return is_in_guest(regs) ? instruction_pointer_guest(regs) : instruction_pointer(regs); @@ -84,7 +84,7 @@ static unsigned long perf_misc_flags_sf(struct pt_regs *r= egs) return flags; } =20 -unsigned long perf_misc_flags(struct pt_regs *regs) +unsigned long perf_arch_misc_flags(struct pt_regs *regs) { /* Check if the cpum_sf PMU has created the pt_regs structure. * In this case, perf misc flags can be easily extracted. Otherwise, diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index be01823b1bb4..760ad067527c 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -2940,7 +2940,7 @@ static unsigned long code_segment_base(struct pt_regs= *regs) return 0; } =20 -unsigned long perf_instruction_pointer(struct pt_regs *regs) +unsigned long perf_arch_instruction_pointer(struct pt_regs *regs) { if (perf_guest_state()) return perf_guest_get_ip(); @@ -2948,7 +2948,7 @@ unsigned long perf_instruction_pointer(struct pt_regs= *regs) return regs->ip + code_segment_base(regs); } =20 -unsigned long perf_misc_flags(struct pt_regs *regs) +unsigned long perf_arch_misc_flags(struct pt_regs *regs) { unsigned int guest_state =3D perf_guest_state(); int misc =3D 0; diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_= event.h index 91b73571412f..feb87bf3d2e9 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -536,15 +536,15 @@ struct x86_perf_regs { u64 *xmm_regs; }; =20 -extern unsigned long perf_instruction_pointer(struct pt_regs *regs); -extern unsigned long perf_misc_flags(struct pt_regs *regs); -#define perf_misc_flags(regs) perf_misc_flags(regs) +extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs); +extern unsigned long perf_arch_misc_flags(struct pt_regs *regs); +#define perf_arch_misc_flags(regs) perf_arch_misc_flags(regs) =20 #include =20 /* - * We abuse bit 3 from flags to pass exact information, see perf_misc_flags - * and the comment with PERF_EFLAGS_EXACT. + * We abuse bit 3 from flags to pass exact information, see + * perf_arch_misc_flags() and the comment with PERF_EFLAGS_EXACT. */ #define perf_arch_fetch_caller_regs(regs, __ip) { \ (regs)->ip =3D (__ip); \ diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 1a8942277dda..d061e327ad54 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1633,10 +1633,13 @@ extern void perf_tp_event(u16 event_type, u64 count= , void *record, struct task_struct *task); extern void perf_bp_event(struct perf_event *event, void *data); =20 -#ifndef perf_misc_flags -# define perf_misc_flags(regs) \ +extern unsigned long perf_misc_flags(struct pt_regs *regs); +extern unsigned long perf_instruction_pointer(struct pt_regs *regs); + +#ifndef perf_arch_misc_flags +# define perf_arch_misc_flags(regs) \ (user_mode(regs) ? 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Wed, 04 Sep 2024 13:42:29 -0700 (PDT) Date: Wed, 4 Sep 2024 20:41:31 +0000 In-Reply-To: <20240904204133.1442132-1-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240904204133.1442132-1-coltonlewis@google.com> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog Message-ID: <20240904204133.1442132-4-coltonlewis@google.com> Subject: [PATCH 3/5] powerpc: perf: Use perf_arch_instruction_pointer() From: Colton Lewis To: kvm@vger.kernel.org Cc: Oliver Upton , Sean Christopherson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , Will Deacon , Russell King , Catalin Marinas , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Colton Lewis Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make sure powerpc uses the arch-specific function now that those have been reorganized. Signed-off-by: Colton Lewis --- arch/powerpc/perf/callchain.c | 2 +- arch/powerpc/perf/callchain_32.c | 2 +- arch/powerpc/perf/callchain_64.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c index 6b4434dd0ff3..26aa26482c9a 100644 --- a/arch/powerpc/perf/callchain.c +++ b/arch/powerpc/perf/callchain.c @@ -51,7 +51,7 @@ perf_callchain_kernel(struct perf_callchain_entry_ctx *en= try, struct pt_regs *re =20 lr =3D regs->link; sp =3D regs->gpr[1]; - perf_callchain_store(entry, perf_instruction_pointer(regs)); + perf_callchain_store(entry, perf_arch_instruction_pointer(regs)); =20 if (!validate_sp(sp, current)) return; diff --git a/arch/powerpc/perf/callchain_32.c b/arch/powerpc/perf/callchain= _32.c index ea8cfe3806dc..ddcc2d8aa64a 100644 --- a/arch/powerpc/perf/callchain_32.c +++ b/arch/powerpc/perf/callchain_32.c @@ -139,7 +139,7 @@ void perf_callchain_user_32(struct perf_callchain_entry= _ctx *entry, long level =3D 0; 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Wed, 04 Sep 2024 13:42:30 -0700 (PDT) Date: Wed, 4 Sep 2024 20:41:32 +0000 In-Reply-To: <20240904204133.1442132-1-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240904204133.1442132-1-coltonlewis@google.com> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog Message-ID: <20240904204133.1442132-5-coltonlewis@google.com> Subject: [PATCH 4/5] x86: perf: Refactor misc flag assignments From: Colton Lewis To: kvm@vger.kernel.org Cc: Oliver Upton , Sean Christopherson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , Will Deacon , Russell King , Catalin Marinas , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Colton Lewis Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Break the assignment logic for misc flags into their own respective functions to reduce the complexity of the nested logic. Signed-off-by: Colton Lewis --- arch/x86/events/core.c | 31 +++++++++++++++++++++++-------- arch/x86/include/asm/perf_event.h | 2 ++ 2 files changed, 25 insertions(+), 8 deletions(-) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 760ad067527c..87457e5d7f65 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -2948,16 +2948,34 @@ unsigned long perf_arch_instruction_pointer(struct = pt_regs *regs) return regs->ip + code_segment_base(regs); } =20 +static unsigned long common_misc_flags(struct pt_regs *regs) +{ + if (regs->flags & PERF_EFLAGS_EXACT) + return PERF_RECORD_MISC_EXACT_IP; + + return 0; +} + +unsigned long perf_arch_guest_misc_flags(struct pt_regs *regs) +{ + unsigned long guest_state =3D perf_guest_state(); + unsigned long flags =3D common_misc_flags(); + + if (guest_state & PERF_GUEST_USER) + flags |=3D PERF_RECORD_MISC_GUEST_USER; + else if (guest_state & PERF_GUEST_ACTIVE) + flags |=3D PERF_RECORD_MISC_GUEST_KERNEL; + + return flags; +} + unsigned long perf_arch_misc_flags(struct pt_regs *regs) { unsigned int guest_state =3D perf_guest_state(); - int misc =3D 0; + unsigned long misc =3D common_misc_flags(); =20 if (guest_state) { - if (guest_state & PERF_GUEST_USER) - misc |=3D PERF_RECORD_MISC_GUEST_USER; - else - misc |=3D PERF_RECORD_MISC_GUEST_KERNEL; + misc |=3D perf_arch_guest_misc_flags(regs); } else { if (user_mode(regs)) misc |=3D PERF_RECORD_MISC_USER; @@ -2965,9 +2983,6 @@ unsigned long perf_arch_misc_flags(struct pt_regs *re= gs) misc |=3D PERF_RECORD_MISC_KERNEL; } =20 - if (regs->flags & PERF_EFLAGS_EXACT) - misc |=3D PERF_RECORD_MISC_EXACT_IP; - return misc; } =20 diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_= event.h index feb87bf3d2e9..d95f902acc52 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -538,7 +538,9 @@ struct x86_perf_regs { =20 extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs); extern unsigned long perf_arch_misc_flags(struct pt_regs *regs); +extern unsigned long perf_arch_guest_misc_flags(struct pt_regs *regs); #define perf_arch_misc_flags(regs) perf_arch_misc_flags(regs) +#define perf_arch_guest_misc_flags(regs) perf_arch_guest_misc_flags(regs) =20 #include =20 --=20 2.46.0.469.g59c65b2a67-goog From nobody Fri Dec 19 16:45:09 2025 Received: from mail-io1-f73.google.com (mail-io1-f73.google.com [209.85.166.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18F5416F287 for ; Wed, 4 Sep 2024 20:42:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725482554; cv=none; b=DDTK1nhcFYzpT4OkXu3NxnST7+HLcFzKzzFqEhvAMoMrtBsKGcjWDuNmA6QjbUhCG0VFZiL0y45ie1iZwL70fg9dFi8jLKZuSfaTMbcBOIa8rd5H6fNqc37rkJvibBfDJTsgWLwNfBB+Q6wkJfHmN9lAw/CArFDKMLHnV7ctWlQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725482554; c=relaxed/simple; bh=+AZhzeE+TZ65vAr8u0N0Wleqi4qKXSh9vbq6Xw4afuc=; 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AJvYcCVCjdrbTrQAxyz+qchKF96RfG0kH90HirZytkBTAhchaJhpXcYs4T4xnEbTLPYsJGi11bAXgnunJQG8ToU=@vger.kernel.org X-Gm-Message-State: AOJu0YxEdt5oIw0lMjwgNDG0+63D087aTBn4or3VMoBox1EUfOHa3qyn pkdI7LlH3P0nsD7P6Vm22eOMQqouAFXP6fhPsmZk4qy0Fw/WVZY6HIuvvlvYizEuYegfCDIq3/J +GhxO6jQD2CGUsMp9/XZMpQ== X-Google-Smtp-Source: AGHT+IH9EBCT8+ykT+OpvYVmgAL1GejG/P9BrG7iuA2P0w+bQDK+bVWQxO99M8Ql2oemuKA/7xEPoMWRBeRAyi1Jng== X-Received: from coltonlewis-kvm.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:14ce]) (user=coltonlewis job=sendgmr) by 2002:a05:6638:40a3:b0:4b9:ad96:2adc with SMTP id 8926c6da1cb9f-4d017e9afc4mr1111520173.4.1725482551325; Wed, 04 Sep 2024 13:42:31 -0700 (PDT) Date: Wed, 4 Sep 2024 20:41:33 +0000 In-Reply-To: <20240904204133.1442132-1-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240904204133.1442132-1-coltonlewis@google.com> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog Message-ID: <20240904204133.1442132-6-coltonlewis@google.com> Subject: [PATCH 5/5] perf: Correct perf sampling with guest VMs From: Colton Lewis To: kvm@vger.kernel.org Cc: Oliver Upton , Sean Christopherson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , Will Deacon , Russell King , Catalin Marinas , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Colton Lewis Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Previously any PMU overflow interrupt that fired while a VCPU was loaded was recorded as a guest event whether it truly was or not. This resulted in nonsense perf recordings that did not honor perf_event_attr.exclude_guest and recorded guest IPs where it should have recorded host IPs. Reorganize that plumbing to record perf events correctly even when VCPUs are loaded. Signed-off-by: Colton Lewis --- arch/arm64/include/asm/perf_event.h | 4 ---- arch/arm64/kernel/perf_callchain.c | 28 ---------------------------- arch/x86/events/core.c | 16 ++++------------ include/linux/perf_event.h | 21 +++++++++++++++++++-- kernel/events/core.c | 21 +++++++++++++++++---- 5 files changed, 40 insertions(+), 50 deletions(-) diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/p= erf_event.h index 31a5584ed423..ee45b4e77347 100644 --- a/arch/arm64/include/asm/perf_event.h +++ b/arch/arm64/include/asm/perf_event.h @@ -10,10 +10,6 @@ #include =20 #ifdef CONFIG_PERF_EVENTS -struct pt_regs; -extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs); -extern unsigned long perf_arch_misc_flags(struct pt_regs *regs); -#define perf_arch_misc_flags(regs) perf_misc_flags(regs) #define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs #endif =20 diff --git a/arch/arm64/kernel/perf_callchain.c b/arch/arm64/kernel/perf_ca= llchain.c index 01a9d08fc009..9b7f26b128b5 100644 --- a/arch/arm64/kernel/perf_callchain.c +++ b/arch/arm64/kernel/perf_callchain.c @@ -38,31 +38,3 @@ void perf_callchain_kernel(struct perf_callchain_entry_c= tx *entry, =20 arch_stack_walk(callchain_trace, entry, current, regs); } - -unsigned long perf_arch_instruction_pointer(struct pt_regs *regs) -{ - if (perf_guest_state()) - return perf_guest_get_ip(); - - return instruction_pointer(regs); -} - -unsigned long perf_arch_misc_flags(struct pt_regs *regs) -{ - unsigned int guest_state =3D perf_guest_state(); - int misc =3D 0; - - if (guest_state) { - if (guest_state & PERF_GUEST_USER) - misc |=3D PERF_RECORD_MISC_GUEST_USER; - else - misc |=3D PERF_RECORD_MISC_GUEST_KERNEL; - } else { - if (user_mode(regs)) - misc |=3D PERF_RECORD_MISC_USER; - else - misc |=3D PERF_RECORD_MISC_KERNEL; - } - - return misc; -} diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 87457e5d7f65..2049b70c5af7 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -2942,9 +2942,6 @@ static unsigned long code_segment_base(struct pt_regs= *regs) =20 unsigned long perf_arch_instruction_pointer(struct pt_regs *regs) { - if (perf_guest_state()) - return perf_guest_get_ip(); - return regs->ip + code_segment_base(regs); } =20 @@ -2971,17 +2968,12 @@ unsigned long perf_arch_guest_misc_flags(struct pt_= regs *regs) =20 unsigned long perf_arch_misc_flags(struct pt_regs *regs) { - unsigned int guest_state =3D perf_guest_state(); unsigned long misc =3D common_misc_flags(); =20 - if (guest_state) { - misc |=3D perf_arch_guest_misc_flags(regs); - } else { - if (user_mode(regs)) - misc |=3D PERF_RECORD_MISC_USER; - else - misc |=3D PERF_RECORD_MISC_KERNEL; - } + if (user_mode(regs)) + misc |=3D PERF_RECORD_MISC_USER; + else + misc |=3D PERF_RECORD_MISC_KERNEL; =20 return misc; } diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index d061e327ad54..968f3edd95e4 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1633,8 +1633,9 @@ extern void perf_tp_event(u16 event_type, u64 count, = void *record, struct task_struct *task); extern void perf_bp_event(struct perf_event *event, void *data); =20 -extern unsigned long perf_misc_flags(struct pt_regs *regs); -extern unsigned long perf_instruction_pointer(struct pt_regs *regs); +extern unsigned long perf_misc_flags(struct perf_event *event, struct pt_r= egs *regs); +extern unsigned long perf_instruction_pointer(struct perf_event *event, + struct pt_regs *regs); =20 #ifndef perf_arch_misc_flags # define perf_arch_misc_flags(regs) \ @@ -1645,6 +1646,22 @@ extern unsigned long perf_instruction_pointer(struct= pt_regs *regs); # define perf_arch_bpf_user_pt_regs(regs) regs #endif =20 +#ifndef perf_arch_guest_misc_flags +static inline unsigned long perf_arch_guest_misc_flags(struct pt_regs *reg= s) +{ + unsigned long guest_state =3D perf_guest_state(); + + if (guest_state & PERF_GUEST_USER) + return PERF_RECORD_MISC_GUEST_USER; + + if (guest_state & PERF_GUEST_ACTIVE) + return PERF_RECORD_MISC_GUEST_KERNEL; + + return 0; +} +# define perf_arch_guest_misc_flags(regs) perf_arch_guest_misc_flags(regs) +#endif + static inline bool has_branch_stack(struct perf_event *event) { return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; diff --git a/kernel/events/core.c b/kernel/events/core.c index 4384f6c49930..e1a66c9c3773 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -6915,13 +6915,26 @@ void perf_unregister_guest_info_callbacks(struct pe= rf_guest_info_callbacks *cbs) EXPORT_SYMBOL_GPL(perf_unregister_guest_info_callbacks); #endif =20 -unsigned long perf_misc_flags(unsigned long pt_regs *regs) +static bool is_guest_event(struct perf_event *event) { + return !event->attr.exclude_guest && perf_guest_state(); +} + +unsigned long perf_misc_flags(struct perf_event *event, + struct pt_regs *regs) +{ + if (is_guest_event(event)) + return perf_arch_guest_misc_flags(regs); + return perf_arch_misc_flags(regs); } =20 -unsigned long perf_instruction_pointer(unsigned long pt_regs *regs) +unsigned long perf_instruction_pointer(struct perf_event *event, + struct pt_regs *regs) { + if (is_guest_event(event)) + return perf_guest_get_ip(); + return perf_arch_instruction_pointer(regs); } =20 @@ -7737,7 +7750,7 @@ void perf_prepare_sample(struct perf_sample_data *dat= a, __perf_event_header__init_id(data, event, filtered_sample_type); =20 if (filtered_sample_type & PERF_SAMPLE_IP) { - data->ip =3D perf_instruction_pointer(regs); + data->ip =3D perf_instruction_pointer(event, regs); data->sample_flags |=3D PERF_SAMPLE_IP; } =20 @@ -7901,7 +7914,7 @@ void perf_prepare_header(struct perf_event_header *he= ader, { header->type =3D PERF_RECORD_SAMPLE; header->size =3D perf_sample_data_size(data, event); - header->misc =3D perf_misc_flags(regs); + header->misc =3D perf_misc_flags(event, regs); =20 /* * If you're adding more sample types here, you likely need to do --=20 2.46.0.469.g59c65b2a67-goog