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[75.72.166.104]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-39f3afc4ff6sm34556175ab.37.2024.09.03.19.33.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 19:33:44 -0700 (PDT) From: Adam Ford To: linux-phy@lists.infradead.org Cc: dominique.martinet@atmark-techno.com, linux-imx@nxp.com, festevam@gmail.com, frieder.schrempf@kontron.de, aford@beaconembedded.com, Sandor.yu@nxp.com, Adam Ford , Vinod Koul , Kishon Vijay Abraham I , Marco Felsch , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Lucas Stach , linux-kernel@vger.kernel.org Subject: [PATCH V5 5/5] phy: freescale: fsl-samsung-hdmi: Remove unnecessary LUT entries Date: Tue, 3 Sep 2024 21:32:44 -0500 Message-ID: <20240904023310.163371-6-aford173@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240904023310.163371-1-aford173@gmail.com> References: <20240904023310.163371-1-aford173@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The lookup table contains entries which use the integer divider instead of just the fractional divider. Since the set and round functions check both the integer divider values and the LUT values, it's no longer necessary to keep the integer divder values in the, as they are able to by dynamically calcuated. Signed-off-by: Adam Ford Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf --- V5: No Change V4: New to series --- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 83 +++----------------- 1 file changed, 13 insertions(+), 70 deletions(-) diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/fre= escale/phy-fsl-samsung-hdmi.c index 56b08e684179..a37d7b989552 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -69,25 +69,16 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 23750000, .pll_div_regs =3D { 0xd1, 0x50, 0xf1, 0x86, 0x85, 0x80, 0x40 }, - }, { - .pixclk =3D 24000000, - .pll_div_regs =3D { 0xd1, 0x50, 0xf0, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk =3D 24024000, .pll_div_regs =3D { 0xd1, 0x50, 0xf1, 0x99, 0x02, 0x80, 0x40 }, }, { .pixclk =3D 25175000, .pll_div_regs =3D { 0xd1, 0x54, 0xfc, 0xcc, 0x91, 0x80, 0x40 }, - }, { - .pixclk =3D 25200000, - .pll_div_regs =3D { 0xd1, 0x54, 0xf0, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 26750000, .pll_div_regs =3D { 0xd1, 0x5a, 0xf2, 0x89, 0x88, 0x80, 0x40 }, - }, { - .pixclk =3D 27000000, - .pll_div_regs =3D { 0xd1, 0x5a, 0xf0, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 27027000, .pll_div_regs =3D { 0xd1, 0x5a, 0xf2, 0xfd, 0x0c, 0x80, 0x40 }, }, { @@ -105,18 +96,9 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 35000000, .pll_div_regs =3D { 0xd1, 0x58, 0xb8, 0x8b, 0x88, 0x80, 0x40 }, - }, { - .pixclk =3D 36000000, - .pll_div_regs =3D { 0xd1, 0x5a, 0xb0, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 36036000, .pll_div_regs =3D { 0xd1, 0x5a, 0xb2, 0xfd, 0x0c, 0x80, 0x40 }, - }, { - .pixclk =3D 40000000, - .pll_div_regs =3D { 0xd1, 0x64, 0xb0, 0x00, 0x00, 0x80, 0x00 }, - }, { - .pixclk =3D 43200000, - .pll_div_regs =3D { 0xd1, 0x5a, 0x90, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk =3D 43243200, .pll_div_regs =3D { 0xd1, 0x5a, 0x92, 0xfd, 0x0c, 0x80, 0x40 }, @@ -132,19 +114,13 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 50349650, .pll_div_regs =3D { 0xd1, 0x54, 0x7c, 0xc3, 0x8f, 0x80, 0x40 }, - }, { - .pixclk =3D 50400000, - .pll_div_regs =3D { 0xd1, 0x54, 0x70, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk =3D 53250000, .pll_div_regs =3D { 0xd1, 0x58, 0x72, 0x84, 0x03, 0x82, 0x41 }, }, { .pixclk =3D 53500000, .pll_div_regs =3D { 0xd1, 0x5a, 0x72, 0x89, 0x88, 0x80, 0x40 }, - }, { - .pixclk =3D 54000000, - .pll_div_regs =3D { 0xd1, 0x5a, 0x70, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 54054000, .pll_div_regs =3D { 0xd1, 0x5a, 0x72, 0xfd, 0x0c, 0x80, 0x40 }, }, { @@ -153,10 +129,7 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 59340659, .pll_div_regs =3D { 0xd1, 0x62, 0x74, 0xdb, 0x52, 0x88, 0x47 }, - }, { - .pixclk =3D 59400000, - .pll_div_regs =3D { 0xd1, 0x63, 0x70, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 61500000, .pll_div_regs =3D { 0xd1, 0x66, 0x74, 0x82, 0x01, 0x88, 0x45 }, }, { @@ -168,10 +141,7 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 70000000, .pll_div_regs =3D { 0xd1, 0x58, 0x58, 0x8b, 0x88, 0x80, 0x40 }, - }, { - .pixclk =3D 72000000, - .pll_div_regs =3D { 0xd1, 0x5a, 0x50, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 72072000, .pll_div_regs =3D { 0xd1, 0x5a, 0x52, 0xfd, 0x0c, 0x80, 0x40 }, }, { @@ -183,10 +153,7 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 78500000, .pll_div_regs =3D { 0xd1, 0x62, 0x54, 0x87, 0x01, 0x80, 0x40 }, - }, { - .pixclk =3D 80000000, - .pll_div_regs =3D { 0xd1, 0x64, 0x50, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 82000000, .pll_div_regs =3D { 0xd1, 0x66, 0x54, 0x82, 0x01, 0x88, 0x45 }, }, { @@ -213,10 +180,7 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 100699300, .pll_div_regs =3D { 0xd1, 0x54, 0x3c, 0xc3, 0x8f, 0x80, 0x40 }, - }, { - .pixclk =3D 100800000, - .pll_div_regs =3D { 0xd1, 0x54, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 102500000, .pll_div_regs =3D { 0xd1, 0x55, 0x32, 0x8c, 0x05, 0x90, 0x4b }, }, { @@ -228,19 +192,13 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 107000000, .pll_div_regs =3D { 0xd1, 0x5a, 0x32, 0x89, 0x88, 0x80, 0x40 }, - }, { - .pixclk =3D 108000000, - .pll_div_regs =3D { 0xd1, 0x5a, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 108108000, .pll_div_regs =3D { 0xd1, 0x5a, 0x32, 0xfd, 0x0c, 0x80, 0x40 }, }, { .pixclk =3D 118000000, .pll_div_regs =3D { 0xd1, 0x62, 0x34, 0x95, 0x08, 0x80, 0x40 }, - }, { - .pixclk =3D 118800000, - .pll_div_regs =3D { 0xd1, 0x63, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 123000000, .pll_div_regs =3D { 0xd1, 0x66, 0x34, 0x82, 0x01, 0x88, 0x45 }, }, { @@ -261,10 +219,7 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 140000000, .pll_div_regs =3D { 0xd1, 0x75, 0x36, 0xa7, 0x90, 0x80, 0x40 }, - }, { - .pixclk =3D 144000000, - .pll_div_regs =3D { 0xd1, 0x78, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 148352000, .pll_div_regs =3D { 0xd1, 0x7b, 0x35, 0xdb, 0x39, 0x90, 0x45 }, }, { @@ -288,9 +243,6 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 165000000, .pll_div_regs =3D { 0xd1, 0x45, 0x11, 0x84, 0x81, 0x90, 0x4b }, - }, { - .pixclk =3D 180000000, - .pll_div_regs =3D { 0xd1, 0x4b, 0x10, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk =3D 185625000, .pll_div_regs =3D { 0xd1, 0x4e, 0x12, 0x9a, 0x95, 0x80, 0x40 }, @@ -309,25 +261,16 @@ static const struct phy_config phy_pll_cfg[] =3D { }, { .pixclk =3D 213000000, .pll_div_regs =3D { 0xd1, 0x58, 0x12, 0x84, 0x03, 0x82, 0x41 }, - }, { - .pixclk =3D 216000000, - .pll_div_regs =3D { 0xd1, 0x5a, 0x10, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk =3D 216216000, .pll_div_regs =3D { 0xd1, 0x5a, 0x12, 0xfd, 0x0c, 0x80, 0x40 }, - }, { - .pixclk =3D 237600000, - .pll_div_regs =3D { 0xd1, 0x63, 0x10, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 254000000, .pll_div_regs =3D { 0xd1, 0x69, 0x14, 0x89, 0x08, 0x80, 0x40 }, }, { .pixclk =3D 277500000, .pll_div_regs =3D { 0xd1, 0x73, 0x15, 0x88, 0x05, 0x90, 0x4d }, - }, { - .pixclk =3D 288000000, - .pll_div_regs =3D { 0xd1, 0x78, 0x10, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk =3D 297000000, .pll_div_regs =3D { 0xd1, 0x7b, 0x15, 0x84, 0x03, 0x90, 0x45 }, }, --=20 2.43.0