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charset="utf-8" Document and describe the compatibles for Apple A7-A11 SoCs. There are three feature levels: - apple,aic: No fast IPI, for A7-A10 - apple,t8015-aic: fast IPI, global only, for A11 - apple,t8103-aic: fast IPI with local and global support, for M1 Each feature level is an extension of the previous, for example, M1 will also work with the A7 feature level. All of A7-M1 gets its own SoC-specific compatible, and the "apple,aic" compatible as a fallback. Acked-by: Krzysztof Kozlowski Reviewed-by: Sven Peter Signed-off-by: Nick Chan --- .../bindings/interrupt-controller/apple,aic.yaml | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.= yaml index 698588e9aa86..4be9b596a790 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml @@ -31,13 +31,25 @@ description: | This device also represents the FIQ interrupt sources on platforms using= AIC, which do not go through a discrete interrupt controller. =20 + IPIs may be performed via MMIO registers on all variants of AIC. Starting + from A11, system registers may also be used for "fast" IPIs. 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Sat, 31 Aug 2024 20:42:40 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Nick Chan Subject: [PATCH v3 2/4] irqchip/apple-aic: Skip unnecessary setting of use_fast_ipi Date: Sun, 1 Sep 2024 11:40:05 +0800 Message-ID: <20240901034143.12731-3-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240901034143.12731-1-towinchenmi@gmail.com> References: <20240901034143.12731-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" use_fast_ipi is true by default and there is no need to "enable" it. Reviewed-by: Sven Peter Signed-off-by: Nick Chan --- drivers/irqchip/irq-apple-aic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-ai= c.c index 5c534d9fd2b0..8d81d5fb3c50 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -987,9 +987,7 @@ static int __init aic_of_ic_init(struct device_node *no= de, struct device_node *p off +=3D sizeof(u32) * (irqc->max_irq >> 5); /* MASK_CLR */ off +=3D sizeof(u32) * (irqc->max_irq >> 5); /* HW_STATE */ =20 - if (irqc->info.fast_ipi) - static_branch_enable(&use_fast_ipi); - else + if (!irqc->info.fast_ipi) static_branch_disable(&use_fast_ipi); =20 irqc->info.die_stride =3D off - start_off; --=20 2.46.0 From nobody Sun Feb 8 15:58:23 2026 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAA092BAE2; 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Sat, 31 Aug 2024 20:42:47 -0700 (PDT) Received: from localhost.localdomain ([49.130.72.113]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-715e55771ccsm4826767b3a.43.2024.08.31.20.42.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Aug 2024 20:42:46 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Nick Chan Subject: [PATCH v3 3/4] irqchip/apple-aic: Add a new "Global fast IPIs only" feature level Date: Sun, 1 Sep 2024 11:40:06 +0800 Message-ID: <20240901034143.12731-4-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240901034143.12731-1-towinchenmi@gmail.com> References: <20240901034143.12731-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Starting with the A11 (T8015) SoC, Apple began using arm64 sysregs for fast IPIs. However, on A11, there is no such things as "Local" fast IPIs, as the SYS_IMP_APL_IPI_RR_LOCAL_EL1 register does not seem to exist. Add a new feature level, used by the compatible "apple,t8015-aic", controlled by a static branch key named use_local_fast_ipi. When use_fast_ipi is true and use_local_fast_ipi is false, fast IPIs are used but all IPIs goes through the register SYS_IMP_APL_IPI_RR_GLOBAL_EL1, as "global" IPIs. Reviewed-by: Sven Peter Signed-off-by: Nick Chan --- drivers/irqchip/irq-apple-aic.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-ai= c.c index 8d81d5fb3c50..01a3c79054f5 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -235,6 +235,8 @@ enum fiq_hwirq { }; =20 static DEFINE_STATIC_KEY_TRUE(use_fast_ipi); +/* True if SYS_IMP_APL_IPI_RR_LOCAL_EL1 exists for local fast IPIs (M1+) */ +static DEFINE_STATIC_KEY_TRUE(use_local_fast_ipi); =20 struct aic_info { int version; @@ -252,6 +254,7 @@ struct aic_info { =20 /* Features */ bool fast_ipi; + bool local_fast_ipi; }; =20 static const struct aic_info aic1_info __initconst =3D { @@ -270,17 +273,32 @@ static const struct aic_info aic1_fipi_info __initcon= st =3D { .fast_ipi =3D true, }; =20 +static const struct aic_info aic1_local_fipi_info __initconst =3D { + .version =3D 1, + + .event =3D AIC_EVENT, + .target_cpu =3D AIC_TARGET_CPU, + + .fast_ipi =3D true, + .local_fast_ipi =3D true, +}; + static const struct aic_info aic2_info __initconst =3D { .version =3D 2, =20 .irq_cfg =3D AIC2_IRQ_CFG, =20 .fast_ipi =3D true, + .local_fast_ipi =3D true, }; =20 static const struct of_device_id aic_info_match[] =3D { { .compatible =3D "apple,t8103-aic", + .data =3D &aic1_local_fipi_info, + }, + { + .compatible =3D "apple,t8015-aic", .data =3D &aic1_fipi_info, }, { @@ -750,7 +768,8 @@ static void aic_ipi_send_fast(int cpu) u64 cluster =3D MPIDR_CLUSTER(mpidr); u64 idx =3D MPIDR_CPU(mpidr); =20 - if (MPIDR_CLUSTER(my_mpidr) =3D=3D cluster) + if (static_branch_likely(&use_local_fast_ipi) && + MPIDR_CLUSTER(my_mpidr) =3D=3D cluster) write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx), SYS_IMP_APL_IPI_RR_LOCAL_EL1); else @@ -990,6 +1009,9 @@ static int __init aic_of_ic_init(struct device_node *n= ode, struct device_node *p if (!irqc->info.fast_ipi) static_branch_disable(&use_fast_ipi); =20 + if (!irqc->info.local_fast_ipi) + static_branch_disable(&use_local_fast_ipi); + irqc->info.die_stride =3D off - start_off; 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charset="utf-8" From: Konrad Dybcio Starting from the A11 (T8015) SoC, Apple introuced system registers for fast IPI and UNCORE PMC control. These sysregs do not exist on earlier A7-A10 SoCs and trying to access them results in an instant crash. Restrict sysreg access within the AIC driver to configurations where use_fast_ipi is true to allow AIC to function properly on A7-A10 SoCs. Reviewed-by: Sven Peter Signed-off-by: Konrad Dybcio Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- drivers/irqchip/irq-apple-aic.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-ai= c.c index 01a3c79054f5..a6d812afb10d 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -234,6 +234,7 @@ enum fiq_hwirq { AIC_NR_FIQ }; =20 +/* True if UNCORE/UNCORE2 and Sn_... IPI registers are present and used (A= 11+) */ static DEFINE_STATIC_KEY_TRUE(use_fast_ipi); /* True if SYS_IMP_APL_IPI_RR_LOCAL_EL1 exists for local fast IPIs (M1+) */ static DEFINE_STATIC_KEY_TRUE(use_local_fast_ipi); @@ -550,14 +551,9 @@ static void __exception_irq_entry aic_handle_fiq(struc= t pt_regs *regs) * we check for everything here, even things we don't support yet. */ =20 - if (read_sysreg_s(SYS_IMP_APL_IPI_SR_EL1) & IPI_SR_PENDING) { - if (static_branch_likely(&use_fast_ipi)) { - aic_handle_ipi(regs); - } else { - pr_err_ratelimited("Fast IPI fired. Acking.\n"); - write_sysreg_s(IPI_SR_PENDING, SYS_IMP_APL_IPI_SR_EL1); - } - } + if (static_branch_likely(&use_fast_ipi) && + (read_sysreg_s(SYS_IMP_APL_IPI_SR_EL1) & IPI_SR_PENDING)) + aic_handle_ipi(regs); =20 if (TIMER_FIRING(read_sysreg(cntp_ctl_el0))) generic_handle_domain_irq(aic_irqc->hw_domain, @@ -592,8 +588,9 @@ static void __exception_irq_entry aic_handle_fiq(struct= pt_regs *regs) AIC_FIQ_HWIRQ(irq)); } =20 - if (FIELD_GET(UPMCR0_IMODE, read_sysreg_s(SYS_IMP_APL_UPMCR0_EL1)) =3D=3D= UPMCR0_IMODE_FIQ && - (read_sysreg_s(SYS_IMP_APL_UPMSR_EL1) & UPMSR_IACT)) { + if (static_branch_likely(&use_fast_ipi) && + (FIELD_GET(UPMCR0_IMODE, read_sysreg_s(SYS_IMP_APL_UPMCR0_EL1)) =3D= =3D UPMCR0_IMODE_FIQ) && + (read_sysreg_s(SYS_IMP_APL_UPMSR_EL1) & UPMSR_IACT)) { /* Same story with uncore PMCs */ pr_err_ratelimited("Uncore PMC FIQ fired. Masking.\n"); sysreg_clear_set_s(SYS_IMP_APL_UPMCR0_EL1, UPMCR0_IMODE, @@ -830,7 +827,8 @@ static int aic_init_cpu(unsigned int cpu) /* Mask all hard-wired per-CPU IRQ/FIQ sources */ =20 /* Pending Fast IPI FIQs */ - write_sysreg_s(IPI_SR_PENDING, SYS_IMP_APL_IPI_SR_EL1); + if (static_branch_likely(&use_fast_ipi)) + write_sysreg_s(IPI_SR_PENDING, SYS_IMP_APL_IPI_SR_EL1); =20 /* Timer FIQs */ sysreg_clear_set(cntp_ctl_el0, 0, ARCH_TIMER_CTRL_IT_MASK); @@ -851,8 +849,9 @@ static int aic_init_cpu(unsigned int cpu) FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_OFF)); =20 /* Uncore PMC FIQ */ - sysreg_clear_set_s(SYS_IMP_APL_UPMCR0_EL1, UPMCR0_IMODE, - FIELD_PREP(UPMCR0_IMODE, UPMCR0_IMODE_OFF)); + if (static_branch_likely(&use_fast_ipi)) + sysreg_clear_set_s(SYS_IMP_APL_UPMCR0_EL1, UPMCR0_IMODE, + FIELD_PREP(UPMCR0_IMODE, UPMCR0_IMODE_OFF)); =20 /* Commit all of the above */ isb(); --=20 2.46.0