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[174.20.195.90]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-39f3b05940asm8853415ab.77.2024.08.30.08.28.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2024 08:28:37 -0700 (PDT) From: Shimrra Shai To: shimrrashai@gmail.com Cc: Laurent.pinchart@ideasonboard.com, aarnoud@me.com, airlied@gmail.com, algea.cao@rock-chips.com, andrzej.hajda@intel.com, andy.yan@rock-chips.com, conor+dt@kernel.org, cristian.ciocaltea@collabora.com, daniel@ffwll.ch, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, heiko@sntech.de, hjc@rock-chips.com, jernej.skrabec@gmail.com, jonas@kwiboo.se, krzk+dt@kernel.org, ldearquer@gmail.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, maarten.lankhorst@linux.intel.com, markyao0591@gmail.com, mripard@kernel.org, neil.armstrong@linaro.org, rfoss@kernel.org, robh@kernel.org, s.hauer@pengutronix.de, tzimmermann@suse.de Subject: [PATCH v5? 3/6] dt-bindings: display: bridge: Add schema for Synopsys DW HDMI QP TX IP Date: Fri, 30 Aug 2024 10:28:24 -0500 Message-ID: <20240830152825.9053-1-shimrrashai@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240830152132.8894-1-shimrrashai@gmail.com> References: <20240830152132.8894-1-shimrrashai@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-h= dmi-qp.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-= hdmi-qp.yaml new file mode 100644 index 000000000..141899ba2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi-qp.= yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi-qp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common Properties for Synopsys DesignWare HDMI QP TX Controller IP + +maintainers: + - Cristian Ciocaltea + - Shimrra Shai + +description: | + The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX Controller IP core + supports the following features, among others: + + * Fixed Rate Link (FRL) + * Display Stream Compression (DSC) + * 4K@120Hz and 8K@60Hz video modes + * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) + * Fast Vactive (FVA) + * SCDC I2C DDC access + * Multi-stream audio + * Enhanced Audio Return Channel (EARC) + + Note this is not a full dt-binding specification, but is meant to be + referenced by platform-specific bindings for this IP core. + +properties: + reg: + maxItems: 1 + + clocks: + minItems: 4 + maxItems: 6 + items: + - description: Peripheral/APB bus clock + - description: EARC RX biphase clock + - description: Reference clock + - description: Audio interface clock + additionalItems: true + + clock-names: + minItems: 4 + maxItems: 6 + items: + - const: pclk + - const: earc + - const: ref + - const: aud + additionalItems: true + + interrupts: + minItems: 4 + maxItems: 5 + items: + - description: AVP Unit interrupt + - description: CEC interrupt + - description: eARC RX interrupt + - description: Main Unit interrupt + additionalItems: true + + interrupt-names: + minItems: 4 + maxItems: 5 + items: + - const: avp + - const: cec + - const: earc + - const: main + additionalItems: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for RGB/YUV input. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for HDMI/eDP output. + + required: + - port@0 + - port@1 + +additionalProperties: true