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[95.233.232.76]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3749ee9978bsm1315042f8f.49.2024.08.29.05.33.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Aug 2024 05:33:21 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Thu, 29 Aug 2024 14:32:03 +0200 Subject: [PATCH RFC 5/8] iio: dac: ad3552r: changes to use FIELD_PREP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240829-wip-bl-ad3552r-axi-v0-v1-5-b6da6015327a@baylibre.com> References: <20240829-wip-bl-ad3552r-axi-v0-v1-0-b6da6015327a@baylibre.com> In-Reply-To: <20240829-wip-bl-ad3552r-axi-v0-v1-0-b6da6015327a@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Olivier Moysan Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dlechner@baylibre.com, Angelo Dureghello X-Mailer: b4 0.14.1 From: Angelo Dureghello Changes to use FIELD_PREP, so that driver-specific ad3552r_field_prep is removed. Variables (arrays) that was used to call ad3552r_field_prep are removerd too. Signed-off-by: Angelo Dureghello --- drivers/iio/dac/ad3552r.c | 126 ++++++++++++++++++------------------------= ---- 1 file changed, 49 insertions(+), 77 deletions(-) diff --git a/drivers/iio/dac/ad3552r.c b/drivers/iio/dac/ad3552r.c index bd37d304ca70..d867de7c90d1 100644 --- a/drivers/iio/dac/ad3552r.c +++ b/drivers/iio/dac/ad3552r.c @@ -285,45 +285,6 @@ struct ad3552r_desc { unsigned int num_ch; }; =20 -static const u16 addr_mask_map[][2] =3D { - [AD3552R_ADDR_ASCENSION] =3D { - AD3552R_REG_ADDR_INTERFACE_CONFIG_A, - AD3552R_MASK_ADDR_ASCENSION - }, - [AD3552R_SDO_DRIVE_STRENGTH] =3D { - AD3552R_REG_ADDR_INTERFACE_CONFIG_D, - AD3552R_MASK_SDO_DRIVE_STRENGTH - }, - [AD3552R_VREF_SELECT] =3D { - AD3552R_REG_ADDR_SH_REFERENCE_CONFIG, - AD3552R_MASK_REFERENCE_VOLTAGE_SEL - }, -}; - -/* 0 -> reg addr, 1->ch0 mask, 2->ch1 mask */ -static const u16 addr_mask_map_ch[][3] =3D { - [AD3552R_CH_DAC_POWERDOWN] =3D { - AD3552R_REG_ADDR_POWERDOWN_CONFIG, - AD3552R_MASK_CH_DAC_POWERDOWN(0), - AD3552R_MASK_CH_DAC_POWERDOWN(1) - }, - [AD3552R_CH_AMPLIFIER_POWERDOWN] =3D { - AD3552R_REG_ADDR_POWERDOWN_CONFIG, - AD3552R_MASK_CH_AMPLIFIER_POWERDOWN(0), - AD3552R_MASK_CH_AMPLIFIER_POWERDOWN(1) - }, - [AD3552R_CH_OUTPUT_RANGE_SEL] =3D { - AD3552R_REG_ADDR_CH0_CH1_OUTPUT_RANGE, - AD3552R_MASK_CH_OUTPUT_RANGE_SEL(0), - AD3552R_MASK_CH_OUTPUT_RANGE_SEL(1) - }, - [AD3552R_CH_SELECT] =3D { - AD3552R_REG_ADDR_CH_SELECT_16B, - AD3552R_MASK_CH(0), - AD3552R_MASK_CH(1) - } -}; - static u8 _ad3552r_reg_len(u8 addr) { switch (addr) { @@ -399,11 +360,6 @@ static int ad3552r_read_reg(struct ad3552r_desc *dac, = u8 addr, u16 *val) return 0; } =20 -static u16 ad3552r_field_prep(u16 val, u16 mask) -{ - return (val << __ffs(mask)) & mask; -} - /* Update field of a register, shift val if needed */ static int ad3552r_update_reg_field(struct ad3552r_desc *dac, u8 addr, u16= mask, u16 val) @@ -416,21 +372,11 @@ static int ad3552r_update_reg_field(struct ad3552r_de= sc *dac, u8 addr, u16 mask, return ret; =20 reg &=3D ~mask; - reg |=3D ad3552r_field_prep(val, mask); + reg |=3D val; =20 return ad3552r_write_reg(dac, addr, reg); } =20 -static int ad3552r_set_ch_value(struct ad3552r_desc *dac, - enum ad3552r_ch_attributes attr, - u8 ch, - u16 val) -{ - /* Update register related to attributes in chip */ - return ad3552r_update_reg_field(dac, addr_mask_map_ch[attr][0], - addr_mask_map_ch[attr][ch + 1], val); -} - #define AD3552R_CH_DAC(_idx) ((struct iio_chan_spec) { \ .type =3D IIO_VOLTAGE, \ .output =3D true, \ @@ -510,8 +456,14 @@ static int ad3552r_write_raw(struct iio_dev *indio_dev, val); break; case IIO_CHAN_INFO_ENABLE: - err =3D ad3552r_set_ch_value(dac, AD3552R_CH_DAC_POWERDOWN, - chan->channel, !val); + if (chan->channel =3D=3D 0) + val =3D FIELD_PREP(AD3552R_MASK_CH_DAC_POWERDOWN(0), !val); + else + val =3D FIELD_PREP(AD3552R_MASK_CH_DAC_POWERDOWN(1), !val); + + err =3D ad3552r_update_reg_field(dac, AD3552R_REG_ADDR_POWERDOWN_CONFIG, + AD3552R_MASK_CH_DAC_POWERDOWN(chan->channel), + val); break; default: err =3D -EINVAL; @@ -715,9 +667,9 @@ static int ad3552r_reset(struct ad3552r_desc *dac) } =20 return ad3552r_update_reg_field(dac, - addr_mask_map[AD3552R_ADDR_ASCENSION][0], - addr_mask_map[AD3552R_ADDR_ASCENSION][1], - val); + AD3552R_REG_ADDR_INTERFACE_CONFIG_A, + AD3552R_MASK_ADDR_ASCENSION, + FIELD_PREP(AD3552R_MASK_ADDR_ASCENSION, val)); } =20 static void ad3552r_get_custom_range(struct ad3552r_desc *dac, s32 i, s32 = *v_min, @@ -812,20 +764,20 @@ static int ad3552r_configure_custom_gain(struct ad355= 2r_desc *dac, "mandatory custom-output-range-config property missing\n"); =20 dac->ch_data[ch].range_override =3D 1; - reg |=3D ad3552r_field_prep(1, AD3552R_MASK_CH_RANGE_OVERRIDE); + reg |=3D FIELD_PREP(AD3552R_MASK_CH_RANGE_OVERRIDE, 1); =20 err =3D fwnode_property_read_u32(gain_child, "adi,gain-scaling-p", &val); if (err) return dev_err_probe(dev, err, "mandatory adi,gain-scaling-p property missing\n"); - reg |=3D ad3552r_field_prep(val, AD3552R_MASK_CH_GAIN_SCALING_P); + reg |=3D FIELD_PREP(AD3552R_MASK_CH_GAIN_SCALING_P, val); dac->ch_data[ch].p =3D val; =20 err =3D fwnode_property_read_u32(gain_child, "adi,gain-scaling-n", &val); if (err) return dev_err_probe(dev, err, "mandatory adi,gain-scaling-n property missing\n"); - reg |=3D ad3552r_field_prep(val, AD3552R_MASK_CH_GAIN_SCALING_N); + reg |=3D FIELD_PREP(AD3552R_MASK_CH_GAIN_SCALING_N, val); dac->ch_data[ch].n =3D val; =20 err =3D fwnode_property_read_u32(gain_child, "adi,rfb-ohms", &val); @@ -841,9 +793,9 @@ static int ad3552r_configure_custom_gain(struct ad3552r= _desc *dac, dac->ch_data[ch].gain_offset =3D val; =20 offset =3D abs((s32)val); - reg |=3D ad3552r_field_prep((offset >> 8), AD3552R_MASK_CH_OFFSET_BIT_8); + reg |=3D FIELD_PREP(AD3552R_MASK_CH_OFFSET_BIT_8, (offset >> 8)); =20 - reg |=3D ad3552r_field_prep((s32)val < 0, AD3552R_MASK_CH_OFFSET_POLARITY= ); + reg |=3D FIELD_PREP(AD3552R_MASK_CH_OFFSET_POLARITY, (s32)val < 0); addr =3D AD3552R_REG_ADDR_CH_GAIN(ch); err =3D ad3552r_write_reg(dac, addr, offset & AD3552R_MASK_CH_OFFSET_BITS_0_7); @@ -886,9 +838,9 @@ static int ad3552r_configure_device(struct ad3552r_desc= *dac) } =20 err =3D ad3552r_update_reg_field(dac, - addr_mask_map[AD3552R_VREF_SELECT][0], - addr_mask_map[AD3552R_VREF_SELECT][1], - val); + AD3552R_REG_ADDR_SH_REFERENCE_CONFIG, + AD3552R_MASK_REFERENCE_VOLTAGE_SEL, + FIELD_PREP(AD3552R_MASK_REFERENCE_VOLTAGE_SEL, val)); if (err) return err; =20 @@ -900,9 +852,9 @@ static int ad3552r_configure_device(struct ad3552r_desc= *dac) } =20 err =3D ad3552r_update_reg_field(dac, - addr_mask_map[AD3552R_SDO_DRIVE_STRENGTH][0], - addr_mask_map[AD3552R_SDO_DRIVE_STRENGTH][1], - val); + AD3552R_REG_ADDR_INTERFACE_CONFIG_D, + AD3552R_MASK_SDO_DRIVE_STRENGTH, + FIELD_PREP(AD3552R_MASK_SDO_DRIVE_STRENGTH, val)); if (err) return err; } @@ -938,9 +890,15 @@ static int ad3552r_configure_device(struct ad3552r_des= c *dac) "Invalid adi,output-range-microvolt value\n"); =20 val =3D err; - err =3D ad3552r_set_ch_value(dac, - AD3552R_CH_OUTPUT_RANGE_SEL, - ch, val); + if (ch =3D=3D 0) + val =3D FIELD_PREP(AD3552R_MASK_CH_OUTPUT_RANGE_SEL(0), val); + else + val =3D FIELD_PREP(AD3552R_MASK_CH_OUTPUT_RANGE_SEL(1), val); + + err =3D ad3552r_update_reg_field(dac, + AD3552R_REG_ADDR_CH0_CH1_OUTPUT_RANGE, + AD3552R_MASK_CH_OUTPUT_RANGE_SEL(ch), + val); if (err) return err; =20 @@ -958,7 +916,14 @@ static int ad3552r_configure_device(struct ad3552r_des= c *dac) ad3552r_calc_gain_and_offset(dac, ch); dac->enabled_ch |=3D BIT(ch); =20 - err =3D ad3552r_set_ch_value(dac, AD3552R_CH_SELECT, ch, 1); + if (ch =3D=3D 0) + val =3D FIELD_PREP(AD3552R_MASK_CH(0), 1); + else + val =3D FIELD_PREP(AD3552R_MASK_CH(1), 1); + + err =3D ad3552r_update_reg_field(dac, + AD3552R_REG_ADDR_CH_SELECT_16B, + AD3552R_MASK_CH(ch), val); if (err < 0) return err; =20 @@ -970,8 +935,15 @@ static int ad3552r_configure_device(struct ad3552r_des= c *dac) /* Disable unused channels */ for_each_clear_bit(ch, &dac->enabled_ch, dac->model_data->num_hw_channels) { - err =3D ad3552r_set_ch_value(dac, AD3552R_CH_AMPLIFIER_POWERDOWN, - ch, 1); + if (ch =3D=3D 0) + val =3D FIELD_PREP(AD3552R_MASK_CH_OUTPUT_RANGE_SEL(0), 1); + else + val =3D FIELD_PREP(AD3552R_MASK_CH_OUTPUT_RANGE_SEL(1), 1); + + err =3D ad3552r_update_reg_field(dac, + AD3552R_REG_ADDR_POWERDOWN_CONFIG, + AD3552R_MASK_CH_OUTPUT_RANGE_SEL(ch), + val); if (err) return err; } --=20 2.45.0.rc1