From nobody Fri Dec 19 13:53:13 2025 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C69C1A0B1D; Tue, 27 Aug 2024 12:26:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761599; cv=none; b=NnaynHUgOTYu7RK05x45Fn9AjSDA8IKRBle/z/IQxyL8iAlT4/VNk9yvzixAo2WShRfq0RwWi5MlMtcE+Io30+gxmAWuDwF3UA9di809PKAgTmN6u11LQJfID4hnZLZpAiOA1gCHfSaMY54bgNrcWLqJSP5COfBU5u+Ekc8AQiI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761599; c=relaxed/simple; bh=6ZPKg3c/nZy3SsBbUWyZTFGPxalmHlOwPa7X9AOyFHU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bNnB5TdAGpwVj2s5pmEvxjB2h792VC8jkCjWfDNBIRsfb9JSJp+gwRmZauGQB3RY+OX3fvcEg7IdnscELTDbgoSu4KlRkwXom2txLp7Wx2A0updjBu+Hzf6OK9ePJYIhodt1vb+OyvXMJXhzId37Sd0Q0RO4YBMbLnOgN2OA5jQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=IZV1lDiA; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="IZV1lDiA" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 47R8jBUN031812; Tue, 27 Aug 2024 14:26:21 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= g8a3O6sXCgxEOg1ucYmMXOTE4I4DT1XHr3DGcQmRTTw=; b=IZV1lDiABLjh8XJ9 fKFv6eyjvuAh/tusSIhUkpEfHmR/QsZ8LzPJcL0xQl+hlk8qC9hNF1GJwITZ4GnM fhRB2nUeuBrv/6Su8cQJzqbJLR5KQ9/o9WWu3kubAAiboCN0pj/fGXDfKRNTer5b RiQ+0A5VfvJOzLjnYXwVc/jMEdU62qbpd7rM4SkXxoY9IPrDXz7at81mfT5/kgHw v2Y9n5lB9pI2xX4dg/WPbZIbIoEHvvrIHoMu+2NIUnYsQthHmQvemGDBtVIeuzIr XdTT4rYdslkOHH3UI0g6V0knT4JgEiE9fek+8Tm/D2q2ZFZxoYNafa5jz5CF2W3S VqdkFw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 41796km64n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 27 Aug 2024 14:26:21 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id CEC4F40048; Tue, 27 Aug 2024 14:26:17 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 774D926333F; Tue, 27 Aug 2024 14:25:28 +0200 (CEST) Received: from localhost (10.129.178.212) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 27 Aug 2024 14:25:28 +0200 From: Christian Bruel To: , , , , , , , CC: , , , , , , Christian Bruel Subject: [PATCH 4/5] arm64: dts: st: Add combophy node on stm32mp251 Date: Tue, 27 Aug 2024 14:24:58 +0200 Message-ID: <20240827122459.1102889-5-christian.bruel@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240827122459.1102889-1-christian.bruel@foss.st.com> References: <20240827122459.1102889-1-christian.bruel@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-27_06,2024-08-27_01,2024-05-17_01 Content-Type: text/plain; charset="utf-8" Add support for COMBOPHY which is used either by the USB3 and PCIe controller. USB3 or PCIe mode is done with phy_set_mode(). PCIe internal reference clock can be generated from the internal clock source or optionnaly from an external 100Mhz pad. Signed-off-by: Christian Bruel --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 1167cf63d7e8..0d38763d9317 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include =20 / { #address-cells =3D <2>; @@ -518,6 +519,22 @@ i2c8: i2c@46040000 { status =3D "disabled"; }; =20 + combophy: phy@480c0000 { + compatible =3D "st,stm32mp25-combophy"; + reg =3D <0x480c0000 0x1000>; + #phy-cells =3D <1>; + clocks =3D <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>; + clock-names =3D "apb", "ker"; + resets =3D <&rcc USB3PCIEPHY_R>; + reset-names =3D "phy"; + st,syscfg =3D <&syscfg>; + access-controllers =3D <&rifsc 67>; + power-domains =3D <&CLUSTER_PD>; + wakeup-source; + interrupts-extended =3D <&exti1 45 IRQ_TYPE_EDGE_FALLING>; + status =3D "disabled"; + }; + sdmmc1: mmc@48220000 { compatible =3D "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid =3D <0x00353180>; --=20 2.34.1