From nobody Fri Sep 12 07:48:26 2025 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1541F17DFE7; Thu, 22 Aug 2024 09:30:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319007; cv=none; b=NVtkNi0e5HJq8i2+SOle/E7FPtnIVM01NCxsLu6qxyCRoknivvjYxjygZFyJNnpK2ijnlM50KzJk/weCpI14M10qHEnzmQzag1WDwpk/Cpoq8Hc4NAeYhwrSVBM9yjNq/Uriu0hYfHCR+Q2xfqaFjPIrwuorxEQHXsphA91EBkY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319007; c=relaxed/simple; bh=Ev6MIRRnbDtLPZ+dBDWrRjRMMQ/PGWkPsGKULWAebec=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eBf1DGtReh69Vu0J3A+rei9baChTY9UIP1CCFKYj9ErPqtGFrwcDgmyyKOknl2JbGxRLSbi97KDKLbXWrbxIWzjhIEXqRvfk4HtsROkGlAmuZTLqDWPZSshHdmP9nmD/4pdItGRvuHy4HOXRvJYVv9CQivHRkljXp+zGpbany+g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=MDxszBD0; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="MDxszBD0" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TuvZ026980; Thu, 22 Aug 2024 04:29:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724318996; bh=N4klKMl3vTnoGxY26T3OWKNpOoXbbbSvsWLAd3ZX3Ds=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MDxszBD0ljuJAN3lp1/Hrh1K5doW1kvo0N8ViGCyl9N5LlQRctNv8i5bgOgJI5Bu0 dDdehTlExp7BWC6FWnLz3IN/zHv89iTWFIdRHvACaeR54+jcZzFH3WlJMCLu2IBaOg 1BjNEglXGNP4+9JvjoUvtfs5vep3q4+4NV4XPA2c= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47M9TuvS010778 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 22 Aug 2024 04:29:56 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 22 Aug 2024 04:29:55 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 22 Aug 2024 04:29:56 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TtKh062477; Thu, 22 Aug 2024 04:29:55 -0500 From: Hari Nagalla To: , , , , , , , CC: , , Subject: [PATCH v5 2/4] arm64: dts: k3-am62a-mcu: Add R5F Remoteproc node Date: Thu, 22 Aug 2024 04:29:53 -0500 Message-ID: <20240822092955.22037-3-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240822092955.22037-1-hnagalla@ti.com> References: <20240822092955.22037-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU core can run safety applications or can also be used as a general purpose MCU. Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts= /ti/k3-am62a-mcu.dtsi index 8c36e56f4138..f0facc9a268c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi @@ -167,4 +167,29 @@ mcu_mcan1: can@4e18000 { bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; status =3D "disabled"; }; + + mcu_r5fss0: r5fss@79000000 { + compatible =3D "ti,am62-r5fss"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x79000000 0x00 0x79000000 0x8000>, + <0x79020000 0x00 0x79020000 0x8000>; + power-domains =3D <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>; + + mcu_r5fss0_core0: r5f@79000000 { + compatible =3D "ti,am62-r5f"; + reg =3D <0x79000000 0x00008000>, + <0x79020000 0x00008000>; + reg-names =3D "atcm", "btcm"; + resets =3D <&k3_reset 9 1>; + firmware-name =3D "am62a-mcu-r5f0_0-fw"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <9>; + ti,sci-proc-ids =3D <0x03 0xff>; + ti,atcm-enable =3D <0>; + ti,btcm-enable =3D <1>; + ti,loczrama =3D <0>; + status =3D "disabled"; + }; + }; }; --=20 2.34.1