From nobody Fri Sep 12 05:42:09 2025 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B69CD183CA4; Thu, 22 Aug 2024 09:30:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.248 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319011; cv=none; b=EPkqF2iMxAi3dIgE2a+iLRiMwbbc+Mxa/KOC3fA9BcAiL1zfmDpOzC825cF6s90SnIMZOG6eDSnoeMPzGZBi/Y5en/lT1SJcVqNhcvpnQ4fbveLOrrnxsqFP9gXfaR9p+tKt6WLxjtcCMj1p7KKEtVvnrkb8scOd81Wz+ZFPCZs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319011; c=relaxed/simple; bh=XsaC0Yllq7EKGOv5j0sgGtTzP9qHGKNCDqRHKFM2InQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KTUprc92+AItaC0s/uVfG0sKd8Dket/OCnq31PyCf8JxDd9CQV4alThQWH3++bb/CApWC3+VvvK6wsnzRmsRBfYyoiA88HCKCIh4KM6NzR6D6MM6fMh6xG8HqGdytgUvoJr/mrZ4BuC4zaARGtgWeEBqwbMixhHcCql52IGJs80= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=oLLeNgIQ; arc=none smtp.client-ip=198.47.23.248 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="oLLeNgIQ" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TuOT048965; Thu, 22 Aug 2024 04:29:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724318996; bh=LXlBucHtW/siugsLpq9W5jRjw6XnoC69c+WZ3x/ngdo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oLLeNgIQus7doF8G37fcvd+mho14/uxfiSw8wBtsYGWjiBo8OMKwL1H5Sc9vM51W4 6RDH9a3asXCrAAn9O8Ii9718VMF5un/YSXP3DvreXwpl5q3eEnhYSr57Dd0txMK9M5 AtFYJeBd8puN5LMTf1U/fcWZX61Ppcib6mVvZ7go= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47M9Tu5A009387 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 22 Aug 2024 04:29:56 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 22 Aug 2024 04:29:56 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 22 Aug 2024 04:29:55 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TtPX044825; Thu, 22 Aug 2024 04:29:55 -0500 From: Hari Nagalla To: , , , , , , , CC: , , Subject: [PATCH v5 1/4] arm64: dts: k3-am62a-main: Add C7xv device node Date: Thu, 22 Aug 2024 04:29:52 -0500 Message-ID: <20240822092955.22037-2-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240822092955.22037-1-hnagalla@ti.com> References: <20240822092955.22037-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jai Luthra AM62A SoCs have a C7xv DSP subsystem with Analytics engine capability. This subsystem is intended for deep learning purposes. Define the device node for C7xv DSP. Signed-off-by: Jai Luthra Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 916fcf3cc57d..8546ed35529b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -1088,4 +1088,16 @@ vpu: video-codec@30210000 { clocks =3D <&k3_clks 204 2>; power-domains =3D <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>; }; + + c7x_0: dsp@7e000000 { + compatible =3D "ti,am62a-c7xv-dsp"; + reg =3D <0x00 0x7e000000 0x00 0x00100000>; + reg-names =3D "l2sram"; + resets =3D <&k3_reset 208 1>; + firmware-name =3D "am62a-c71_0-fw"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <208>; + ti,sci-proc-ids =3D <0x04 0xff>; + status =3D "disabled"; + }; }; --=20 2.34.1 From nobody Fri Sep 12 05:42:09 2025 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1541F17DFE7; Thu, 22 Aug 2024 09:30:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319007; cv=none; b=NVtkNi0e5HJq8i2+SOle/E7FPtnIVM01NCxsLu6qxyCRoknivvjYxjygZFyJNnpK2ijnlM50KzJk/weCpI14M10qHEnzmQzag1WDwpk/Cpoq8Hc4NAeYhwrSVBM9yjNq/Uriu0hYfHCR+Q2xfqaFjPIrwuorxEQHXsphA91EBkY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319007; c=relaxed/simple; bh=Ev6MIRRnbDtLPZ+dBDWrRjRMMQ/PGWkPsGKULWAebec=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eBf1DGtReh69Vu0J3A+rei9baChTY9UIP1CCFKYj9ErPqtGFrwcDgmyyKOknl2JbGxRLSbi97KDKLbXWrbxIWzjhIEXqRvfk4HtsROkGlAmuZTLqDWPZSshHdmP9nmD/4pdItGRvuHy4HOXRvJYVv9CQivHRkljXp+zGpbany+g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=MDxszBD0; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="MDxszBD0" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TuvZ026980; Thu, 22 Aug 2024 04:29:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724318996; bh=N4klKMl3vTnoGxY26T3OWKNpOoXbbbSvsWLAd3ZX3Ds=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MDxszBD0ljuJAN3lp1/Hrh1K5doW1kvo0N8ViGCyl9N5LlQRctNv8i5bgOgJI5Bu0 dDdehTlExp7BWC6FWnLz3IN/zHv89iTWFIdRHvACaeR54+jcZzFH3WlJMCLu2IBaOg 1BjNEglXGNP4+9JvjoUvtfs5vep3q4+4NV4XPA2c= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47M9TuvS010778 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 22 Aug 2024 04:29:56 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 22 Aug 2024 04:29:55 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 22 Aug 2024 04:29:56 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TtKh062477; Thu, 22 Aug 2024 04:29:55 -0500 From: Hari Nagalla To: , , , , , , , CC: , , Subject: [PATCH v5 2/4] arm64: dts: k3-am62a-mcu: Add R5F Remoteproc node Date: Thu, 22 Aug 2024 04:29:53 -0500 Message-ID: <20240822092955.22037-3-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240822092955.22037-1-hnagalla@ti.com> References: <20240822092955.22037-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU core can run safety applications or can also be used as a general purpose MCU. Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts= /ti/k3-am62a-mcu.dtsi index 8c36e56f4138..f0facc9a268c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi @@ -167,4 +167,29 @@ mcu_mcan1: can@4e18000 { bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; status =3D "disabled"; }; + + mcu_r5fss0: r5fss@79000000 { + compatible =3D "ti,am62-r5fss"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x79000000 0x00 0x79000000 0x8000>, + <0x79020000 0x00 0x79020000 0x8000>; + power-domains =3D <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>; + + mcu_r5fss0_core0: r5f@79000000 { + compatible =3D "ti,am62-r5f"; + reg =3D <0x79000000 0x00008000>, + <0x79020000 0x00008000>; + reg-names =3D "atcm", "btcm"; + resets =3D <&k3_reset 9 1>; + firmware-name =3D "am62a-mcu-r5f0_0-fw"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <9>; + ti,sci-proc-ids =3D <0x03 0xff>; + ti,atcm-enable =3D <0>; + ti,btcm-enable =3D <1>; + ti,loczrama =3D <0>; + status =3D "disabled"; + }; + }; }; --=20 2.34.1 From nobody Fri Sep 12 05:42:09 2025 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 294F117DE06; Thu, 22 Aug 2024 09:30:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319006; cv=none; b=sIKHjSJyTP1RKI6l+CFTUuICGsme1+12rrwFR3hrnNQyd5d9DRHTnmWjmBv0zU/VQCmIKyODeMriStn8BGOYGqnLiiEyULPObF190pXXZAqW6iGzi0dnlgSlp1WxSDjUQbUVd1xFpFd1GC0p7Xh0nkt6c3teyJg3Umb6T+pBykY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319006; c=relaxed/simple; bh=PvhJoYsQUHIfkRyv6bBc1Q39WQa5USBVBw95/kTcugo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qtCcpP2rmZXUGUhGO2d9jBoRF0P7EIqK9ndZkdqqGYVIXr+L/xhsTrn2U27uJgoHQUsUymwyLdUOJDO3nhIR2y2e2azvCr5eEW1u+Vlpj5LMD2nzi9xwGHZiStza0sgHExpZEq+qV9IHKZUz5fGQErDjK70PZDc4t2OPloSnqYE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=fWkqeYQ3; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="fWkqeYQ3" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47M9Tu8R125910; Thu, 22 Aug 2024 04:29:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724318996; bh=FQ0rqrV6ISwn+uDbTnFHTFqcqAOCyuz4Hu8mwFfcyvk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fWkqeYQ3YPDxZSJWwHRkAkoUnjIG9ot4UXtgtelg/gnSRjbYgygBKLfKy9R5cu5xb eaRGhV4cNq8BtI/9HKEtQLdPUTb3ldicf+TdUXDFUahabmXXTnAdJL7QyADbQKIjys W5oGAkxv9/z1yDP8htZQ7H8Jr6PDHrZu2JUm5gGA= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47M9Tu25010781 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 22 Aug 2024 04:29:56 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 22 Aug 2024 04:29:55 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 22 Aug 2024 04:29:56 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47M9Tt4p044829; Thu, 22 Aug 2024 04:29:56 -0500 From: Hari Nagalla To: , , , , , , , CC: , , Subject: [PATCH v5 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node Date: Thu, 22 Aug 2024 04:29:54 -0500 Message-ID: <20240822092955.22037-4-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240822092955.22037-1-hnagalla@ti.com> References: <20240822092955.22037-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Devarsh Thakkar AM62A SoCs have a single R5F core in waekup domain. This core is also used as a device manager for the SoC. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 24 +++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/= dts/ti/k3-am62a-wakeup.dtsi index f5ac101a04df..71c2b8bc5cda 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi @@ -76,6 +76,30 @@ wkup_rti0: watchdog@2b000000 { status =3D "reserved"; }; =20 + wkup_r5fss0: r5fss@78000000 { + compatible =3D "ti,am62-r5fss"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x78000000 0x00 0x78000000 0x8000>, + <0x78100000 0x00 0x78100000 0x8000>; + power-domains =3D <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>; + + wkup_r5fss0_core0: r5f@78000000 { + compatible =3D "ti,am62-r5f"; + reg =3D <0x78000000 0x00008000>, + <0x78100000 0x00008000>; + reg-names =3D "atcm", "btcm"; + resets =3D <&k3_reset 121 1>; + firmware-name =3D "am62-wkup-r5f0_0-fw"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <121>; + ti,sci-proc-ids =3D <0x01 0xff>; + ti,atcm-enable =3D <1>; + ti,btcm-enable =3D <1>; + ti,loczrama =3D <1>; + }; + }; + wkup_vtm0: temperature-sensor@b00000 { compatible =3D "ti,j7200-vtm"; reg =3D <0x00 0xb00000 0x00 0x400>, --=20 2.34.1 From nobody Fri Sep 12 05:42:09 2025 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F21617C7DC; Thu, 22 Aug 2024 09:30:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724319008; cv=none; b=PwHyzszxjM8bYW42OekGjFX+0RdRKYa2BabbHYfcOn54GWE6sCAgNUIQ5WJKYWgGsU03KBs7cB0KWeo6jvlZnu7csZdupHp5xJVfdOlEg5WX3pRXe5GvBr0ZrxCdWQUAuXy/boliUFdD8qeKhrKaJwn/pmqD74zD2hxx5jq3a5Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Thu, 22 Aug 2024 04:29:56 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47M9TubJ044832; Thu, 22 Aug 2024 04:29:56 -0500 From: Hari Nagalla To: , , , , , , , CC: , , Subject: [PATCH v5 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with Remoteproc nodes Date: Thu, 22 Aug 2024 04:29:55 -0500 Message-ID: <20240822092955.22037-5-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240822092955.22037-1-hnagalla@ti.com> References: <20240822092955.22037-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Devarsh Thakkar Reserve memory for Remoteproc IPC and bind the mailbox assignments for each Remoteproc. Two memory regions are reserved for each remote processor. The first region of 1MB of memory is used for Vring shared buffers and the second region is used as external memory to the remote processor, resource table and as tracebuffer. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 71 +++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index 67faf46d7a35..c9c504626b14 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -61,11 +61,41 @@ secure_ddr: optee@9e800000 { no-map; }; =20 + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9c800000 0x00 0x100000>; + no-map; + }; + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { compatible =3D "shared-dma-pool"; reg =3D <0x00 0x9c900000 0x00 0x01e00000>; no-map; }; + + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9b800000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9b900000 0x00 0x0f00000>; + no-map; + }; + + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x99800000 0x00 0x100000>; + no-map; + }; + + c7x_0_memory_region: c7x-memory@99900000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x99900000 0x00 0x01f00000>; + no-map; + }; }; =20 vmain_pd: regulator-0 { @@ -728,3 +758,44 @@ dpi1_out: endpoint { }; }; }; + +&mailbox0_cluster0 { + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx =3D <0 0 0>; + ti,mbox-tx =3D <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx =3D <0 0 0>; + ti,mbox-tx =3D <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + mbox_mcu_r5_0: mbox-mcu-r5-0 { + ti,mbox-rx =3D <0 0 0>; + ti,mbox-tx =3D <1 0 0>; + }; +}; + +&c7x_0 { + mboxes =3D <&mailbox0_cluster1 &mbox_c7x_0>; + memory-region =3D <&c7x_0_dma_memory_region>, + <&c7x_0_memory_region>; + status =3D "okay"; +}; + +&wkup_r5fss0_core0 { + mboxes =3D <&mailbox0_cluster0 &mbox_r5_0>; + memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + +&mcu_r5fss0_core0 { + mboxes =3D <&mailbox0_cluster2 &mbox_mcu_r5_0>; + memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; + status =3D "okay"; +}; --=20 2.34.1